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Viewing changes to hw/sh4/sh_pci.c

  • Committer: Package Import Robot
  • Author(s): Serge Hallyn
  • Date: 2013-10-22 22:47:07 UTC
  • mfrom: (1.8.3) (10.1.42 sid)
  • Revision ID: package-import@ubuntu.com-20131022224707-1lya34fw3k3f24tv
Tags: 1.6.0+dfsg-2ubuntu1
http://bugs.debian.org/709241
* Merge 1.6.0~rc0+dfsg-2exp from debian experimental.  Remaining changes:
  - debian/control
    * update maintainer
    * remove libiscsi, usb-redir, vde, vnc-jpeg, and libssh2-1-dev
      from build-deps
    * enable rbd
    * add qemu-system and qemu-common B/R to qemu-keymaps
    * add D:udev, R:qemu, R:qemu-common and B:qemu-common to
      qemu-system-common
    * qemu-system-arm, qemu-system-ppc, qemu-system-sparc:
      - add qemu-kvm to Provides
      - add qemu-common, qemu-kvm, kvm to B/R
      - remove openbios-sparc from qemu-system-sparc D
      - drop openbios-ppc and openhackware Depends to Suggests (for now)
    * qemu-system-x86:
      - add qemu-common to Breaks/Replaces.
      - add cpu-checker to Recommends.
    * qemu-user: add B/R:qemu-kvm
    * qemu-kvm:
      - add armhf armel powerpc sparc to Architecture
      - C/R/P: qemu-kvm-spice
    * add qemu-common package
    * drop qemu-slof which is not packaged in ubuntu
  - add qemu-system-common.links for tap ifup/down scripts and OVMF link.
  - qemu-system-x86.links:
    * remove pxe rom links which are in kvm-ipxe
    * add symlink for kvm.1 manpage
  - debian/rules
    * add kvm-spice symlink to qemu-kvm
    * call dh_installmodules for qemu-system-x86
    * update dh_installinit to install upstart script
    * run dh_installman (Closes: #709241) (cherrypicked from 1.5.0+dfsg-2)
  - Add qemu-utils.links for kvm-* symlinks.
  - Add qemu-system-x86.qemu-kvm.upstart and .default
  - Add qemu-system-x86.modprobe to set nesting=1
  - Add qemu-system-common.preinst to add kvm group
  - qemu-system-common.postinst: remove bad group acl if there, then have
    udev relabel /dev/kvm.
  - New linaro patches from qemu-linaro rebasing branch
  - Dropped patches:
    * xen-simplify-xen_enabled.patch
    * sparc-linux-user-fix-missing-symbols-in-.rel-.rela.plt-sections.patch
    * main_loop-do-not-set-nonblocking-if-xen_enabled.patch
    * xen_machine_pv-do-not-create-a-dummy-CPU-in-machine-.patch
    * virtio-rng-fix-crash
  - Kept patches:
    * expose_vms_qemu64cpu.patch - updated
    * linaro arm patches from qemu-linaro rebasing branch
  - New patches:
    * fix-pci-add: change CONFIG variable in ifdef to make sure that
      pci_add is defined.
* Add linaro patches
* Add experimental mach-virt patches for arm virtualization.
* qemu-system-common.install: add debian/tmp/usr/lib to install the
  qemu-bridge-helper

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Lines of Context:
hw/sh4/sh_pci.c
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#include "qemu/bswap.h"
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#include "exec/address-spaces.h"
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#define TYPE_SH_PCI_HOST_BRIDGE "sh_pci"
 
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#define SH_PCI_HOST_BRIDGE(obj) \
 
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    OBJECT_CHECK(SHPCIState, (obj), TYPE_SH_PCI_HOST_BRIDGE)
 
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typedef struct SHPCIState {
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    SysBusDevice busdev;
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    PCIBus *bus;
 
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    PCIHostState parent_obj;
 
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    PCIDevice *dev;
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    qemu_irq irq[4];
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    MemoryRegion memconfig_p4;
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                              unsigned size)
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{
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    SHPCIState *pcic = p;
 
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    PCIHostState *phb = PCI_HOST_BRIDGE(pcic);
 
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    switch(addr) {
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    case 0 ... 0xfc:
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        cpu_to_le32w((uint32_t*)(pcic->dev->config + addr), val);
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        }
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        break;
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    case 0x220:
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        pci_data_write(pcic->bus, pcic->par, val, 4);
 
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        pci_data_write(phb->bus, pcic->par, val, 4);
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        break;
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    }
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}
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                                 unsigned size)
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{
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    SHPCIState *pcic = p;
 
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    PCIHostState *phb = PCI_HOST_BRIDGE(pcic);
 
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    switch(addr) {
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    case 0 ... 0xfc:
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        return le32_to_cpup((uint32_t*)(pcic->dev->config + addr));
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    case 0x1c8:
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        return pcic->iobr;
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    case 0x220:
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        return pci_data_read(pcic->bus, pcic->par, 4);
 
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        return pci_data_read(phb->bus, pcic->par, 4);
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    }
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    return 0;
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}
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static int sh_pci_device_init(SysBusDevice *dev)
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{
 
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    PCIHostState *phb;
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    SHPCIState *s;
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    int i;
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    s = FROM_SYSBUS(SHPCIState, dev);
 
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    s = SH_PCI_HOST_BRIDGE(dev);
 
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    phb = PCI_HOST_BRIDGE(s);
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    for (i = 0; i < 4; i++) {
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        sysbus_init_irq(dev, &s->irq[i]);
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    }
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    s->bus = pci_register_bus(&s->busdev.qdev, "pci",
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                              sh_pci_set_irq, sh_pci_map_irq,
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                              s->irq,
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                              get_system_memory(),
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                              get_system_io(),
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                              PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
128
 
    memory_region_init_io(&s->memconfig_p4, &sh_pci_reg_ops, s,
 
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    phb->bus = pci_register_bus(DEVICE(dev), "pci",
 
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                                sh_pci_set_irq, sh_pci_map_irq,
 
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                                s->irq,
 
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                                get_system_memory(),
 
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                                get_system_io(),
 
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                                PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS);
 
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    memory_region_init_io(&s->memconfig_p4, OBJECT(s), &sh_pci_reg_ops, s,
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                          "sh_pci", 0x224);
130
 
    memory_region_init_alias(&s->memconfig_a7, "sh_pci.2", &s->memconfig_p4,
131
 
                             0, 0x224);
132
 
    isa_mmio_setup(&s->isa, 0x40000);
 
141
    memory_region_init_alias(&s->memconfig_a7, OBJECT(s), "sh_pci.2",
 
142
                             &s->memconfig_p4, 0, 0x224);
 
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    memory_region_init_alias(&s->isa, OBJECT(s), "sh_pci.isa",
 
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                             get_system_io(), 0, 0x40000);
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    sysbus_init_mmio(dev, &s->memconfig_p4);
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    sysbus_init_mmio(dev, &s->memconfig_a7);
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    s->iobr = 0xfe240000;
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    memory_region_add_subregion(get_system_memory(), s->iobr, &s->isa);
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138
 
    s->dev = pci_create_simple(s->bus, PCI_DEVFN(0, 0), "sh_pci_host");
 
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    s->dev = pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "sh_pci_host");
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    return 0;
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}
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}
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static const TypeInfo sh_pci_device_info = {
174
 
    .name          = "sh_pci",
175
 
    .parent        = TYPE_SYS_BUS_DEVICE,
 
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    .name          = TYPE_SH_PCI_HOST_BRIDGE,
 
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    .parent        = TYPE_PCI_HOST_BRIDGE,
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    .instance_size = sizeof(SHPCIState),
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    .class_init    = sh_pci_device_class_init,
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};