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Viewing changes to tcg/aarch64/tcg-target.h

  • Committer: Package Import Robot
  • Author(s): Serge Hallyn
  • Date: 2013-10-22 22:47:07 UTC
  • mfrom: (1.8.3) (10.1.42 sid)
  • Revision ID: package-import@ubuntu.com-20131022224707-1lya34fw3k3f24tv
Tags: 1.6.0+dfsg-2ubuntu1
* Merge 1.6.0~rc0+dfsg-2exp from debian experimental.  Remaining changes:
  - debian/control
    * update maintainer
    * remove libiscsi, usb-redir, vde, vnc-jpeg, and libssh2-1-dev
      from build-deps
    * enable rbd
    * add qemu-system and qemu-common B/R to qemu-keymaps
    * add D:udev, R:qemu, R:qemu-common and B:qemu-common to
      qemu-system-common
    * qemu-system-arm, qemu-system-ppc, qemu-system-sparc:
      - add qemu-kvm to Provides
      - add qemu-common, qemu-kvm, kvm to B/R
      - remove openbios-sparc from qemu-system-sparc D
      - drop openbios-ppc and openhackware Depends to Suggests (for now)
    * qemu-system-x86:
      - add qemu-common to Breaks/Replaces.
      - add cpu-checker to Recommends.
    * qemu-user: add B/R:qemu-kvm
    * qemu-kvm:
      - add armhf armel powerpc sparc to Architecture
      - C/R/P: qemu-kvm-spice
    * add qemu-common package
    * drop qemu-slof which is not packaged in ubuntu
  - add qemu-system-common.links for tap ifup/down scripts and OVMF link.
  - qemu-system-x86.links:
    * remove pxe rom links which are in kvm-ipxe
    * add symlink for kvm.1 manpage
  - debian/rules
    * add kvm-spice symlink to qemu-kvm
    * call dh_installmodules for qemu-system-x86
    * update dh_installinit to install upstart script
    * run dh_installman (Closes: #709241) (cherrypicked from 1.5.0+dfsg-2)
  - Add qemu-utils.links for kvm-* symlinks.
  - Add qemu-system-x86.qemu-kvm.upstart and .default
  - Add qemu-system-x86.modprobe to set nesting=1
  - Add qemu-system-common.preinst to add kvm group
  - qemu-system-common.postinst: remove bad group acl if there, then have
    udev relabel /dev/kvm.
  - New linaro patches from qemu-linaro rebasing branch
  - Dropped patches:
    * xen-simplify-xen_enabled.patch
    * sparc-linux-user-fix-missing-symbols-in-.rel-.rela.plt-sections.patch
    * main_loop-do-not-set-nonblocking-if-xen_enabled.patch
    * xen_machine_pv-do-not-create-a-dummy-CPU-in-machine-.patch
    * virtio-rng-fix-crash
  - Kept patches:
    * expose_vms_qemu64cpu.patch - updated
    * linaro arm patches from qemu-linaro rebasing branch
  - New patches:
    * fix-pci-add: change CONFIG variable in ifdef to make sure that
      pci_add is defined.
* Add linaro patches
* Add experimental mach-virt patches for arm virtualization.
* qemu-system-common.install: add debian/tmp/usr/lib to install the
  qemu-bridge-helper

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1
/*
 
2
 * Initial TCG Implementation for aarch64
 
3
 *
 
4
 * Copyright (c) 2013 Huawei Technologies Duesseldorf GmbH
 
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 * Written by Claudio Fontana
 
6
 *
 
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 * This work is licensed under the terms of the GNU GPL, version 2 or
 
8
 * (at your option) any later version.
 
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 *
 
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 * See the COPYING file in the top-level directory for details.
 
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 */
 
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#ifndef TCG_TARGET_AARCH64
 
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#define TCG_TARGET_AARCH64 1
 
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#undef TCG_TARGET_WORDS_BIGENDIAN
 
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#undef TCG_TARGET_STACK_GROWSUP
 
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typedef enum {
 
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    TCG_REG_X0, TCG_REG_X1, TCG_REG_X2, TCG_REG_X3, TCG_REG_X4,
 
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    TCG_REG_X5, TCG_REG_X6, TCG_REG_X7, TCG_REG_X8, TCG_REG_X9,
 
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    TCG_REG_X10, TCG_REG_X11, TCG_REG_X12, TCG_REG_X13, TCG_REG_X14,
 
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    TCG_REG_X15, TCG_REG_X16, TCG_REG_X17, TCG_REG_X18, TCG_REG_X19,
 
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    TCG_REG_X20, TCG_REG_X21, TCG_REG_X22, TCG_REG_X23, TCG_REG_X24,
 
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    TCG_REG_X25, TCG_REG_X26, TCG_REG_X27, TCG_REG_X28,
 
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    TCG_REG_FP,  /* frame pointer */
 
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    TCG_REG_LR, /* link register */
 
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    TCG_REG_SP,  /* stack pointer or zero register */
 
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    TCG_REG_XZR = TCG_REG_SP /* same register number */
 
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    /* program counter is not directly accessible! */
 
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} TCGReg;
 
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#define TCG_TARGET_NB_REGS 32
 
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/* used for function call generation */
 
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#define TCG_REG_CALL_STACK              TCG_REG_SP
 
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#define TCG_TARGET_STACK_ALIGN          16
 
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#define TCG_TARGET_CALL_ALIGN_ARGS      1
 
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#define TCG_TARGET_CALL_STACK_OFFSET    0
 
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/* optional instructions */
 
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#define TCG_TARGET_HAS_div_i32          0
 
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#define TCG_TARGET_HAS_rem_i32          0
 
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#define TCG_TARGET_HAS_ext8s_i32        1
 
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#define TCG_TARGET_HAS_ext16s_i32       1
 
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#define TCG_TARGET_HAS_ext8u_i32        1
 
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#define TCG_TARGET_HAS_ext16u_i32       1
 
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#define TCG_TARGET_HAS_bswap16_i32      1
 
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#define TCG_TARGET_HAS_bswap32_i32      1
 
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#define TCG_TARGET_HAS_not_i32          0
 
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#define TCG_TARGET_HAS_neg_i32          0
 
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#define TCG_TARGET_HAS_rot_i32          1
 
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#define TCG_TARGET_HAS_andc_i32         0
 
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#define TCG_TARGET_HAS_orc_i32          0
 
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#define TCG_TARGET_HAS_eqv_i32          0
 
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#define TCG_TARGET_HAS_nand_i32         0
 
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#define TCG_TARGET_HAS_nor_i32          0
 
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#define TCG_TARGET_HAS_deposit_i32      0
 
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#define TCG_TARGET_HAS_movcond_i32      0
 
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#define TCG_TARGET_HAS_add2_i32         0
 
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#define TCG_TARGET_HAS_sub2_i32         0
 
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#define TCG_TARGET_HAS_mulu2_i32        0
 
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#define TCG_TARGET_HAS_muls2_i32        0
 
64
 
 
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#define TCG_TARGET_HAS_div_i64          0
 
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#define TCG_TARGET_HAS_rem_i64          0
 
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#define TCG_TARGET_HAS_ext8s_i64        1
 
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#define TCG_TARGET_HAS_ext16s_i64       1
 
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#define TCG_TARGET_HAS_ext32s_i64       1
 
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#define TCG_TARGET_HAS_ext8u_i64        1
 
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#define TCG_TARGET_HAS_ext16u_i64       1
 
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#define TCG_TARGET_HAS_ext32u_i64       1
 
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#define TCG_TARGET_HAS_bswap16_i64      1
 
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#define TCG_TARGET_HAS_bswap32_i64      1
 
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#define TCG_TARGET_HAS_bswap64_i64      1
 
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#define TCG_TARGET_HAS_not_i64          0
 
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#define TCG_TARGET_HAS_neg_i64          0
 
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#define TCG_TARGET_HAS_rot_i64          1
 
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#define TCG_TARGET_HAS_andc_i64         0
 
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#define TCG_TARGET_HAS_orc_i64          0
 
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#define TCG_TARGET_HAS_eqv_i64          0
 
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#define TCG_TARGET_HAS_nand_i64         0
 
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#define TCG_TARGET_HAS_nor_i64          0
 
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#define TCG_TARGET_HAS_deposit_i64      0
 
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#define TCG_TARGET_HAS_movcond_i64      0
 
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#define TCG_TARGET_HAS_add2_i64         0
 
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#define TCG_TARGET_HAS_sub2_i64         0
 
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#define TCG_TARGET_HAS_mulu2_i64        0
 
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#define TCG_TARGET_HAS_muls2_i64        0
 
90
 
 
91
enum {
 
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    TCG_AREG0 = TCG_REG_X19,
 
93
};
 
94
 
 
95
static inline void flush_icache_range(tcg_target_ulong start,
 
96
                                      tcg_target_ulong stop)
 
97
{
 
98
    __builtin___clear_cache((char *)start, (char *)stop);
 
99
}
 
100
 
 
101
#endif /* TCG_TARGET_AARCH64 */