171
172
case 0x1c: /* SysTick Calibration Value. */
173
174
case 0xd00: /* CPUID Base. */
174
return cpu_single_env->cp15.c0_cpuid;
175
cpu = ARM_CPU(current_cpu);
176
return cpu->env.cp15.c0_cpuid;
175
177
case 0xd04: /* Interrupt Control State. */
177
179
val = s->gic.running_irq[0];
206
208
val |= (1 << 31);
208
210
case 0xd08: /* Vector Table Offset. */
209
return cpu_single_env->v7m.vecbase;
211
cpu = ARM_CPU(current_cpu);
212
return cpu->env.v7m.vecbase;
210
213
case 0xd0c: /* Application Interrupt/Reset Control. */
211
214
return 0xfa05000;
212
215
case 0xd10: /* System Control. */
333
337
case 0xd08: /* Vector Table Offset. */
334
cpu_single_env->v7m.vecbase = value & 0xffffff80;
338
cpu = ARM_CPU(current_cpu);
339
cpu->env.v7m.vecbase = value & 0xffffff80;
336
341
case 0xd0c: /* Application Interrupt/Reset Control. */
337
342
if ((value >> 16) == 0x05fa) {
487
492
* We use overlaying to put the GIC like registers
488
493
* over the top of the system control register region.
490
memory_region_init(&s->container, "nvic", 0x1000);
495
memory_region_init(&s->container, OBJECT(s), "nvic", 0x1000);
491
496
/* The system register region goes at the bottom of the priority
492
497
* stack as it covers the whole page.
494
memory_region_init_io(&s->sysregmem, &nvic_sysreg_ops, s,
499
memory_region_init_io(&s->sysregmem, OBJECT(s), &nvic_sysreg_ops, s,
495
500
"nvic_sysregs", 0x1000);
496
501
memory_region_add_subregion(&s->container, 0, &s->sysregmem);
497
502
/* Alias the GIC region so we can get only the section of it
498
503
* we need, and layer it on top of the system register region.
500
memory_region_init_alias(&s->gic_iomem_alias, "nvic-gic", &s->gic.iomem,
505
memory_region_init_alias(&s->gic_iomem_alias, OBJECT(s),
506
"nvic-gic", &s->gic.iomem,
502
508
memory_region_add_subregion_overlap(&s->container, 0x100,
503
509
&s->gic_iomem_alias, 1);