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From 43d7eb63d5e0569728460e1d78e7d321cf7571e6 Mon Sep 17 00:00:00 2001
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From: Peter Maydell <peter.maydell@linaro.org>
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Date: Mon, 18 Feb 2013 16:58:29 +0000
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Subject: [PATCH 35/71] serial: reset lsr dr/thre upon fcr rfr/xfr
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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further fix serial.c fifo clear
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when receive fifo is requested to be cleared and there is a received byte
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pending to be read, accept the byte while discarding it so it will not stay
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yet another serial tweak
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Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
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hw/char/serial.c | 7 +++++++
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1 file changed, 7 insertions(+)
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diff --git a/hw/char/serial.c b/hw/char/serial.c
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index dd698b3..a35f2c4 100644
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--- a/hw/char/serial.c
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+++ b/hw/char/serial.c
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@@ -332,10 +332,17 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
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qemu_del_timer(s->fifo_timeout_timer);
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s->timeout_ipending=0;
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fifo8_reset(&s->recv_fifo);
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+ if ((s->lsr & UART_LSR_DR)) {
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+ s->lsr &= ~(UART_LSR_DR | UART_LSR_BI | UART_LSR_OE);
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+ if (!(s->mcr & UART_MCR_LOOP)) {
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+ qemu_chr_accept_input(s->chr);
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if (val & UART_FCR_XFR) {
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fifo8_reset(&s->xmit_fifo);
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+ s->lsr |= UART_LSR_THRE;
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if (val & UART_FCR_FE) {