387
388
d->ram->int_pending = cpu_to_le32(0);
388
389
d->ram->int_mask = cpu_to_le32(0);
389
390
d->ram->update_surface = 0;
391
d->ram->monitors_config = 0;
390
392
SPICE_RING_INIT(&d->ram->cmd_ring);
391
393
SPICE_RING_INIT(&d->ram->cursor_ring);
392
394
SPICE_RING_INIT(&d->ram->release_ring);
1725
1727
trace_qxl_send_events_vm_stopped(d->id, events);
1728
old_pending = __sync_fetch_and_or(&d->ram->int_pending, le_events);
1730
old_pending = atomic_fetch_or(&d->ram->int_pending, le_events);
1729
1731
if ((old_pending & le_events) == le_events) {
1980
1982
pci_set_byte(&config[PCI_INTERRUPT_PIN], 1);
1982
1984
qxl->rom_size = qxl_rom_size();
1983
memory_region_init_ram(&qxl->rom_bar, "qxl.vrom", qxl->rom_size);
1985
memory_region_init_ram(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom",
1984
1987
vmstate_register_ram(&qxl->rom_bar, &qxl->pci.qdev);
1985
1988
init_qxl_rom(qxl);
1986
1989
init_qxl_ram(qxl);
1988
1991
qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces);
1989
memory_region_init_ram(&qxl->vram_bar, "qxl.vram", qxl->vram_size);
1992
memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram",
1990
1994
vmstate_register_ram(&qxl->vram_bar, &qxl->pci.qdev);
1991
memory_region_init_alias(&qxl->vram32_bar, "qxl.vram32", &qxl->vram_bar,
1992
0, qxl->vram32_size);
1995
memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32",
1996
&qxl->vram_bar, 0, qxl->vram32_size);
1994
memory_region_init_io(&qxl->io_bar, &qxl_io_ops, qxl,
1998
memory_region_init_io(&qxl->io_bar, OBJECT(qxl), &qxl_io_ops, qxl,
1995
1999
"qxl-ioports", io_size);
1996
2000
if (qxl->id == 0) {
1997
2001
vga_dirty_log_start(&qxl->vga);
2067
2071
qxl_init_ramsize(qxl);
2068
2072
vga->vram_size_mb = qxl->vga.vram_size >> 20;
2069
vga_common_init(vga);
2070
vga_init(vga, pci_address_space(dev), pci_address_space_io(dev), false);
2071
portio_list_init(qxl_vga_port_list, qxl_vga_portio_list, vga, "vga");
2073
vga_common_init(vga, OBJECT(dev));
2074
vga_init(vga, OBJECT(dev),
2075
pci_address_space(dev), pci_address_space_io(dev), false);
2076
portio_list_init(qxl_vga_port_list, OBJECT(dev), qxl_vga_portio_list,
2072
2078
portio_list_add(qxl_vga_port_list, pci_address_space_io(dev), 0x3b0);
2074
2080
vga->con = graphic_console_init(DEVICE(dev), &qxl_ops, qxl);
2093
2099
qxl->id = device_id++;
2094
2100
qxl_init_ramsize(qxl);
2095
memory_region_init_ram(&qxl->vga.vram, "qxl.vgavram", qxl->vga.vram_size);
2101
memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram",
2102
qxl->vga.vram_size);
2096
2103
vmstate_register_ram(&qxl->vga.vram, &qxl->pci.qdev);
2097
2104
qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram);
2098
2105
qxl->vga.con = graphic_console_init(DEVICE(dev), &qxl_ops, qxl);
2316
2323
k->vendor_id = REDHAT_PCI_VENDOR_ID;
2317
2324
k->device_id = QXL_DEVICE_ID_STABLE;
2318
2325
k->class_id = PCI_CLASS_DISPLAY_VGA;
2326
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
2319
2327
dc->desc = "Spice QXL GPU (primary, vga compatible)";
2320
2328
dc->reset = qxl_reset_handler;
2321
2329
dc->vmsd = &qxl_vmstate;
2338
2346
k->vendor_id = REDHAT_PCI_VENDOR_ID;
2339
2347
k->device_id = QXL_DEVICE_ID_STABLE;
2340
2348
k->class_id = PCI_CLASS_DISPLAY_OTHER;
2349
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
2341
2350
dc->desc = "Spice QXL GPU (secondary)";
2342
2351
dc->reset = qxl_reset_handler;
2343
2352
dc->vmsd = &qxl_vmstate;