1
1
#ifndef __ARCH_DOVE_MPP_CODED_H
2
2
#define __ARCH_DOVE_MPP_CODED_H
4
#define MPP(_num, _mode, _pmu, _grp, _au1, _nfc) ( \
5
/* MPP/group number */ ((_num) & 0xff) | \
6
/* MPP select value */ (((_mode) & 0xf) << 8) | \
7
/* MPP PMU */ ((!!(_pmu)) << 12) | \
8
/* group flag */ ((!!(_grp)) << 13) | \
9
/* AU1 flag */ ((!!(_au1)) << 14) | \
10
/* NFCE flag */ ((!!(_nfc)) << 15))
14
#define MPP_NUM(x) ((x) & 0xff)
15
#define MPP_SEL(x) (((x) >> 8) & 0xf)
17
#define MPP_PMU_MASK MPP(0, 0x0, 1, 0, 0, 0)
18
#define MPP_GRP_MASK MPP(0, 0x0, 0, 1, 0, 0)
19
#define MPP_AU1_MASK MPP(0, 0x0, 0, 0, 1, 0)
20
#define MPP_NFC_MASK MPP(0, 0x0, 0, 0, 0, 1)
22
#define MPP_END MPP(0xff, 0xf, 1, 1, 1, 1)
24
#define MPP_PMU_DRIVE_0 0x1
25
#define MPP_PMU_DRIVE_1 0x2
26
#define MPP_PMU_SDI 0x3
27
#define MPP_PMU_CPU_PWRDWN 0x4
28
#define MPP_PMU_STBY_PWRDWN 0x5
29
#define MPP_PMU_CORE_PWR_GOOD 0x8
30
#define MPP_PMU_BAT_FAULT 0xa
31
#define MPP_PMU_EXT0_WU 0xb
32
#define MPP_PMU_EXT1_WU 0xc
33
#define MPP_PMU_EXT2_WU 0xd
34
#define MPP_PMU_BLINK 0xe
35
#define MPP_PMU(_num, _mode) MPP((_num), MPP_PMU_##_mode, 1, 0, 0, 0)
37
#define MPP_PIN(_num, _mode) MPP((_num), (_mode), 0, 0, 0, 0)
38
#define MPP_GRP(_grp, _mode) MPP((_grp), (_mode), 0, 1, 0, 0)
39
#define MPP_GRP_AU1(_mode) MPP(0, (_mode), 0, 0, 1, 0)
40
#define MPP_GRP_NFC(_mode) MPP(0, (_mode), 0, 0, 0, 1)
42
#define MPP0_GPIO0 MPP_PIN(0, 0x0)
43
#define MPP0_UA2_RTSn MPP_PIN(0, 0x2)
44
#define MPP0_SDIO0_CD MPP_PIN(0, 0x3)
45
#define MPP0_LCD0_PWM MPP_PIN(0, 0xf)
47
#define MPP1_GPIO1 MPP_PIN(1, 0x0)
48
#define MPP1_UA2_CTSn MPP_PIN(1, 0x2)
49
#define MPP1_SDIO0_WP MPP_PIN(1, 0x3)
50
#define MPP1_LCD1_PWM MPP_PIN(1, 0xf)
52
#define MPP2_GPIO2 MPP_PIN(2, 0x0)
53
#define MPP2_SATA_PRESENT MPP_PIN(2, 0x1)
54
#define MPP2_UA2_TXD MPP_PIN(2, 0x2)
55
#define MPP2_SDIO0_BUS_POWER MPP_PIN(2, 0x3)
56
#define MPP2_UA_RTSn1 MPP_PIN(2, 0x4)
58
#define MPP3_GPIO3 MPP_PIN(3, 0x0)
59
#define MPP3_SATA_ACT MPP_PIN(3, 0x1)
60
#define MPP3_UA2_RXD MPP_PIN(3, 0x2)
61
#define MPP3_SDIO0_LED_CTRL MPP_PIN(3, 0x3)
62
#define MPP3_UA_CTSn1 MPP_PIN(3, 0x4)
63
#define MPP3_SPI_LCD_CS1 MPP_PIN(3, 0xf)
65
#define MPP4_GPIO4 MPP_PIN(4, 0x0)
66
#define MPP4_UA3_RTSn MPP_PIN(4, 0x2)
67
#define MPP4_SDIO1_CD MPP_PIN(4, 0x3)
68
#define MPP4_SPI_1_MISO MPP_PIN(4, 0x4)
70
#define MPP5_GPIO5 MPP_PIN(5, 0x0)
71
#define MPP5_UA3_CTSn MPP_PIN(5, 0x2)
72
#define MPP5_SDIO1_WP MPP_PIN(5, 0x3)
73
#define MPP5_SPI_1_CS MPP_PIN(5, 0x4)
75
#define MPP6_GPIO6 MPP_PIN(6, 0x0)
76
#define MPP6_UA3_TXD MPP_PIN(6, 0x2)
77
#define MPP6_SDIO1_BUS_POWER MPP_PIN(6, 0x3)
78
#define MPP6_SPI_1_MOSI MPP_PIN(6, 0x4)
80
#define MPP7_GPIO7 MPP_PIN(7, 0x0)
81
#define MPP7_UA3_RXD MPP_PIN(7, 0x2)
82
#define MPP7_SDIO1_LED_CTRL MPP_PIN(7, 0x3)
83
#define MPP7_SPI_1_SCK MPP_PIN(7, 0x4)
85
#define MPP8_GPIO8 MPP_PIN(8, 0x0)
86
#define MPP8_WD_RST_OUT MPP_PIN(8, 0x1)
88
#define MPP9_GPIO9 MPP_PIN(9, 0x0)
89
#define MPP9_PEX1_CLKREQn MPP_PIN(9, 0x5)
91
#define MPP10_GPIO10 MPP_PIN(10, 0x0)
92
#define MPP10_SSP_SCLK MPP_PIN(10, 0x5)
94
#define MPP11_GPIO11 MPP_PIN(11, 0x0)
95
#define MPP11_SATA_PRESENT MPP_PIN(11, 0x1)
96
#define MPP11_SATA_ACT MPP_PIN(11, 0x2)
97
#define MPP11_SDIO0_LED_CTRL MPP_PIN(11, 0x3)
98
#define MPP11_SDIO1_LED_CTRL MPP_PIN(11, 0x4)
99
#define MPP11_PEX0_CLKREQn MPP_PIN(11, 0x5)
101
#define MPP12_GPIO12 MPP_PIN(12, 0x0)
102
#define MPP12_SATA_ACT MPP_PIN(12, 0x1)
103
#define MPP12_UA2_RTSn MPP_PIN(12, 0x2)
104
#define MPP12_AD0_I2S_EXT_MCLK MPP_PIN(12, 0x3)
105
#define MPP12_SDIO1_CD MPP_PIN(12, 0x4)
107
#define MPP13_GPIO13 MPP_PIN(13, 0x0)
108
#define MPP13_UA2_CTSn MPP_PIN(13, 0x2)
109
#define MPP13_AD1_I2S_EXT_MCLK MPP_PIN(13, 0x3)
110
#define MPP13_SDIO1WP MPP_PIN(13, 0x4)
111
#define MPP13_SSP_EXTCLK MPP_PIN(13, 0x5)
113
#define MPP14_GPIO14 MPP_PIN(14, 0x0)
114
#define MPP14_UA2_TXD MPP_PIN(14, 0x2)
115
#define MPP14_SDIO1_BUS_POWER MPP_PIN(14, 0x4)
116
#define MPP14_SSP_RXD MPP_PIN(14, 0x5)
118
#define MPP15_GPIO15 MPP_PIN(15, 0x0)
119
#define MPP15_UA2_RXD MPP_PIN(15, 0x2)
120
#define MPP15_SDIO1_LED_CTRL MPP_PIN(15, 0x4)
121
#define MPP15_SSP_SFRM MPP_PIN(15, 0x5)
123
#define MPP16_GPIO16 MPP_PIN(16, 0x0)
124
#define MPP16_UA3_RTSn MPP_PIN(16, 0x2)
125
#define MPP16_SDIO0_CD MPP_PIN(16, 0x3)
126
#define MPP16_SPI_LCD_CS1 MPP_PIN(16, 0x4)
127
#define MPP16_AC97_SDATA_IN1 MPP_PIN(16, 0x5)
129
#define MPP17_GPIO17 MPP_PIN(17, 0x0)
130
#define MPP17_AC97_SYSCLK_OUT MPP_PIN(17, 0x1)
131
#define MPP17_UA3_CTSn MPP_PIN(17, 0x2)
132
#define MPP17_SDIO0_WP MPP_PIN(17, 0x3)
133
#define MPP17_TW_SDA2 MPP_PIN(17, 0x4)
134
#define MPP17_AC97_SDATA_IN2 MPP_PIN(17, 0x5)
136
#define MPP18_GPIO18 MPP_PIN(18, 0x0)
137
#define MPP18_UA3_TXD MPP_PIN(18, 0x2)
138
#define MPP18_SDIO0_BUS_POWER MPP_PIN(18, 0x3)
139
#define MPP18_LCD0_PWM MPP_PIN(18, 0x4)
140
#define MPP18_AC_SDATA_IN3 MPP_PIN(18, 0x5)
142
#define MPP19_GPIO19 MPP_PIN(19, 0x0)
143
#define MPP19_UA3_RXD MPP_PIN(19, 0x2)
144
#define MPP19_SDIO0_LED_CTRL MPP_PIN(19, 0x3)
145
#define MPP19_TW_SCK2 MPP_PIN(19, 0x4)
147
#define MPP20_GPIO20 MPP_PIN(20, 0x0)
148
#define MPP20_AC97_SYSCLK_OUT MPP_PIN(20, 0x1)
149
#define MPP20_SPI_LCD_MISO MPP_PIN(20, 0x2)
150
#define MPP20_SDIO1_CD MPP_PIN(20, 0x3)
151
#define MPP20_SDIO0_CD MPP_PIN(20, 0x5)
152
#define MPP20_SPI_1_MISO MPP_PIN(20, 0x6)
154
#define MPP21_GPIO21 MPP_PIN(21, 0x0)
155
#define MPP21_UA1_RTSn MPP_PIN(21, 0x1)
156
#define MPP21_SPI_LCD_CS0 MPP_PIN(21, 0x2)
157
#define MPP21_SDIO1_WP MPP_PIN(21, 0x3)
158
#define MPP21_SSP_SFRM MPP_PIN(21, 0x4)
159
#define MPP21_SDIO0_WP MPP_PIN(21, 0x5)
160
#define MPP21_SPI_1_CS MPP_PIN(21, 0x6)
162
#define MPP22_GPIO22 MPP_PIN(22, 0x0)
163
#define MPP22_UA1_CTSn MPP_PIN(22, 0x1)
164
#define MPP22_SPI_LCD_MOSI MPP_PIN(22, 0x2)
165
#define MPP22_SDIO1_BUS_POWER MPP_PIN(22, 0x3)
166
#define MPP22_SSP_TXD MPP_PIN(22, 0x4)
167
#define MPP22_SDIO0_BUS_POWER MPP_PIN(22, 0x5)
168
#define MPP22_SPI_1_MOSI MPP_PIN(22, 0x6)
170
#define MPP23_GPIO23 MPP_PIN(23, 0x0)
171
#define MPP23_SPI_LCD_SCK MPP_PIN(23, 0x2)
172
#define MPP23_SDIO1_LED_CTRL MPP_PIN(23, 0x3)
173
#define MPP23_SSP_SCLK MPP_PIN(23, 0x4)
174
#define MPP23_SDIO0_LED_CTRL MPP_PIN(23, 0x5)
175
#define MPP23_SPI_1_SCK MPP_PIN(23, 0x6)
4
#define MPP(_num, _sel, _in, _out) ( \
5
/* MPP number */ ((_num) & 0xff) | \
6
/* MPP select value */ (((_sel) & 0xf) << 8) | \
7
/* may be input signal */ ((!!(_in)) << 12) | \
8
/* may be output signal */ ((!!(_out)) << 13))
10
#define MPP0_GPIO0 MPP(0, 0x0, 1, 1)
11
#define MPP0_UA2_RTSn MPP(0, 0x2, 0, 0)
12
#define MPP0_SDIO0_CD MPP(0, 0x3, 0, 0)
13
#define MPP0_LCD0_PWM MPP(0, 0xf, 0, 0)
15
#define MPP1_GPIO1 MPP(1, 0x0, 1, 1)
16
#define MPP1_UA2_CTSn MPP(1, 0x2, 0, 0)
17
#define MPP1_SDIO0_WP MPP(1, 0x3, 0, 0)
18
#define MPP1_LCD1_PWM MPP(1, 0xf, 0, 0)
20
#define MPP2_GPIO2 MPP(2, 0x0, 1, 1)
21
#define MPP2_SATA_PRESENT MPP(2, 0x1, 0, 0)
22
#define MPP2_UA2_TXD MPP(2, 0x2, 0, 0)
23
#define MPP2_SDIO0_BUS_POWER MPP(2, 0x3, 0, 0)
24
#define MPP2_UA_RTSn1 MPP(2, 0x4, 0, 0)
26
#define MPP3_GPIO3 MPP(3, 0x0, 1, 1)
27
#define MPP3_SATA_ACT MPP(3, 0x1, 0, 0)
28
#define MPP3_UA2_RXD MPP(3, 0x2, 0, 0)
29
#define MPP3_SDIO0_LED_CTRL MPP(3, 0x3, 0, 0)
30
#define MPP3_UA_CTSn1 MPP(3, 0x4, 0, 0)
31
#define MPP3_SPI_LCD_CS1 MPP(3, 0xf, 0, 0)
33
#define MPP4_GPIO4 MPP(4, 0x0, 1, 1)
34
#define MPP4_UA3_RTSn MPP(4, 0x2, 0, 0)
35
#define MPP4_SDIO1_CD MPP(4, 0x3, 0, 0)
36
#define MPP4_SPI_1_MISO MPP(4, 0x4, 0, 0)
38
#define MPP5_GPIO5 MPP(5, 0x0, 1, 1)
39
#define MPP5_UA3_CTSn MPP(5, 0x2, 0, 0)
40
#define MPP5_SDIO1_WP MPP(5, 0x3, 0, 0)
41
#define MPP5_SPI_1_CS MPP(5, 0x4, 0, 0)
43
#define MPP6_GPIO6 MPP(6, 0x0, 1, 1)
44
#define MPP6_UA3_TXD MPP(6, 0x2, 0, 0)
45
#define MPP6_SDIO1_BUS_POWER MPP(6, 0x3, 0, 0)
46
#define MPP6_SPI_1_MOSI MPP(6, 0x4, 0, 0)
48
#define MPP7_GPIO7 MPP(7, 0x0, 1, 1)
49
#define MPP7_UA3_RXD MPP(7, 0x2, 0, 0)
50
#define MPP7_SDIO1_LED_CTRL MPP(7, 0x3, 0, 0)
51
#define MPP7_SPI_1_SCK MPP(7, 0x4, 0, 0)
53
#define MPP8_GPIO8 MPP(8, 0x0, 1, 1)
54
#define MPP8_WD_RST_OUT MPP(8, 0x1, 0, 0)
56
#define MPP9_GPIO9 MPP(9, 0x0, 1, 1)
57
#define MPP9_PEX1_CLKREQn MPP(9, 0x5, 0, 0)
59
#define MPP10_GPIO10 MPP(10, 0x0, 1, 1)
60
#define MPP10_SSP_SCLK MPP(10, 0x5, 0, 0)
62
#define MPP11_GPIO11 MPP(11, 0x0, 1, 1)
63
#define MPP11_SATA_PRESENT MPP(11, 0x1, 0, 0)
64
#define MPP11_SATA_ACT MPP(11, 0x2, 0, 0)
65
#define MPP11_SDIO0_LED_CTRL MPP(11, 0x3, 0, 0)
66
#define MPP11_SDIO1_LED_CTRL MPP(11, 0x4, 0, 0)
67
#define MPP11_PEX0_CLKREQn MPP(11, 0x5, 0, 0)
69
#define MPP12_GPIO12 MPP(12, 0x0, 1, 1)
70
#define MPP12_SATA_ACT MPP(12, 0x1, 0, 0)
71
#define MPP12_UA2_RTSn MPP(12, 0x2, 0, 0)
72
#define MPP12_AD0_I2S_EXT_MCLK MPP(12, 0x3, 0, 0)
73
#define MPP12_SDIO1_CD MPP(12, 0x4, 0, 0)
75
#define MPP13_GPIO13 MPP(13, 0x0, 1, 1)
76
#define MPP13_UA2_CTSn MPP(13, 0x2, 0, 0)
77
#define MPP13_AD1_I2S_EXT_MCLK MPP(13, 0x3, 0, 0)
78
#define MPP13_SDIO1WP MPP(13, 0x4, 0, 0)
79
#define MPP13_SSP_EXTCLK MPP(13, 0x5, 0, 0)
81
#define MPP14_GPIO14 MPP(14, 0x0, 1, 1)
82
#define MPP14_UA2_TXD MPP(14, 0x2, 0, 0)
83
#define MPP14_SDIO1_BUS_POWER MPP(14, 0x4, 0, 0)
84
#define MPP14_SSP_RXD MPP(14, 0x5, 0, 0)
86
#define MPP15_GPIO15 MPP(15, 0x0, 1, 1)
87
#define MPP15_UA2_RXD MPP(15, 0x2, 0, 0)
88
#define MPP15_SDIO1_LED_CTRL MPP(15, 0x4, 0, 0)
89
#define MPP15_SSP_SFRM MPP(15, 0x5, 0, 0)
91
#define MPP16_GPIO16 MPP(16, 0x0, 1, 1)
92
#define MPP16_UA3_RTSn MPP(16, 0x2, 0, 0)
93
#define MPP16_SDIO0_CD MPP(16, 0x3, 0, 0)
94
#define MPP16_SPI_LCD_CS1 MPP(16, 0x4, 0, 0)
95
#define MPP16_AC97_SDATA_IN1 MPP(16, 0x5, 0, 0)
97
#define MPP17_GPIO17 MPP(17, 0x0, 1, 1)
98
#define MPP17_AC97_SYSCLK_OUT MPP(17, 0x1, 0, 0)
99
#define MPP17_UA3_CTSn MPP(17, 0x2, 0, 0)
100
#define MPP17_SDIO0_WP MPP(17, 0x3, 0, 0)
101
#define MPP17_TW_SDA2 MPP(17, 0x4, 0, 0)
102
#define MPP17_AC97_SDATA_IN2 MPP(17, 0x5, 0, 0)
104
#define MPP18_GPIO18 MPP(18, 0x0, 1, 1)
105
#define MPP18_UA3_TXD MPP(18, 0x2, 0, 0)
106
#define MPP18_SDIO0_BUS_POWER MPP(18, 0x3, 0, 0)
107
#define MPP18_LCD0_PWM MPP(18, 0x4, 0, 0)
108
#define MPP18_AC_SDATA_IN3 MPP(18, 0x5, 0, 0)
110
#define MPP19_GPIO19 MPP(19, 0x0, 1, 1)
111
#define MPP19_UA3_RXD MPP(19, 0x2, 0, 0)
112
#define MPP19_SDIO0_LED_CTRL MPP(19, 0x3, 0, 0)
113
#define MPP19_TW_SCK2 MPP(19, 0x4, 0, 0)
115
#define MPP20_GPIO20 MPP(20, 0x0, 1, 1)
116
#define MPP20_AC97_SYSCLK_OUT MPP(20, 0x1, 0, 0)
117
#define MPP20_SPI_LCD_MISO MPP(20, 0x2, 0, 0)
118
#define MPP20_SDIO1_CD MPP(20, 0x3, 0, 0)
119
#define MPP20_SDIO0_CD MPP(20, 0x5, 0, 0)
120
#define MPP20_SPI_1_MISO MPP(20, 0x6, 0, 0)
122
#define MPP21_GPIO21 MPP(21, 0x0, 1, 1)
123
#define MPP21_UA1_RTSn MPP(21, 0x1, 0, 0)
124
#define MPP21_SPI_LCD_CS0 MPP(21, 0x2, 0, 0)
125
#define MPP21_SDIO1_WP MPP(21, 0x3, 0, 0)
126
#define MPP21_SSP_SFRM MPP(21, 0x4, 0, 0)
127
#define MPP21_SDIO0_WP MPP(21, 0x5, 0, 0)
128
#define MPP21_SPI_1_CS MPP(21, 0x6, 0, 0)
130
#define MPP22_GPIO22 MPP(22, 0x0, 1, 1)
131
#define MPP22_UA1_CTSn MPP(22, 0x1, 0, 0)
132
#define MPP22_SPI_LCD_MOSI MPP(22, 0x2, 0, 0)
133
#define MPP22_SDIO1_BUS_POWER MPP(22, 0x3, 0, 0)
134
#define MPP22_SSP_TXD MPP(22, 0x4, 0, 0)
135
#define MPP22_SDIO0_BUS_POWER MPP(22, 0x5, 0, 0)
136
#define MPP22_SPI_1_MOSI MPP(22, 0x6, 0, 0)
138
#define MPP23_GPIO23 MPP(23, 0x0, 1, 1)
139
#define MPP23_SPI_LCD_SCK MPP(23, 0x2, 0, 0)
140
#define MPP23_SDIO1_LED_CTRL MPP(23, 0x3, 0, 0)
141
#define MPP23_SSP_SCLK MPP(23, 0x4, 0, 0)
142
#define MPP23_SDIO0_LED_CTRL MPP(23, 0x5, 0, 0)
143
#define MPP23_SPI_1_SCK MPP(23, 0x6, 0, 0)
147
#define MPP_GRP(_grp, _mode) MPP((_grp), (_mode), 0, 0)
177
149
/* for MPP groups _num is a group index */
178
150
enum dove_mpp_grp_idx {