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#include <linux/leds-lp5521.h>
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#include <linux/input.h>
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#include <linux/gpio_keys.h>
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#include <linux/delay.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <plat/i2c.h>
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#include <plat/ste_dma40.h>
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#include <plat/pincfg.h>
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#include <mach/hardware.h>
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#include <mach/setup.h>
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#include <mach/devices.h>
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#include <mach/irqs.h>
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#include "pins-db8500.h"
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#include "ste-dma40-db8500.h"
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#include "devices-db8500.h"
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#include "board-mop500.h"
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* on value present in GpioSel1 to GpioSel6 and AlternatFunction
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* register. This is the array of 7 configuration settings.
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* One has to compile time decide these settings. Below is the
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* explaination of these setting
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* explanation of these setting
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* GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
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* GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
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* GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
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#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \
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#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, t_out, _sm) \
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static struct nmk_i2c_controller u8500_i2c##id##_data = { \
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* slave data setup time, which is \
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/* std. mode operation */ \
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.clk_freq = clk, \
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/* Slave response timeout(ms) */\
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* The board uses 4 i2c controllers, initialize all of
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* them with slave data setup time of 250 ns,
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* Tx & Rx FIFO threshold values as 1 and standard
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* Tx & Rx FIFO threshold values as 8 and standard
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* mode of operation
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U8500_I2C_CONTROLLER(0, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
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U8500_I2C_CONTROLLER(1, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
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U8500_I2C_CONTROLLER(2, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
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U8500_I2C_CONTROLLER(3, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD);
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U8500_I2C_CONTROLLER(0, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
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U8500_I2C_CONTROLLER(1, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
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U8500_I2C_CONTROLLER(2, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
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U8500_I2C_CONTROLLER(3, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
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static void __init mop500_i2c_init(void)
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static pin_cfg_t mop500_pins_uart0[] = {
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GPIO0_U0_CTSn | PIN_INPUT_PULLUP,
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GPIO1_U0_RTSn | PIN_OUTPUT_HIGH,
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GPIO2_U0_RXD | PIN_INPUT_PULLUP,
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GPIO3_U0_TXD | PIN_OUTPUT_HIGH,
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#define PRCC_K_SOFTRST_SET 0x18
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#define PRCC_K_SOFTRST_CLEAR 0x1C
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static void ux500_uart0_reset(void)
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void __iomem *prcc_rst_set, *prcc_rst_clr;
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prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
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prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
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PRCC_K_SOFTRST_CLEAR);
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/* Activate soft reset PRCC_K_SOFTRST_CLEAR */
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writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
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/* Release soft reset PRCC_K_SOFTRST_SET */
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writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
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static void ux500_uart0_init(void)
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ret = nmk_config_pins(mop500_pins_uart0,
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ARRAY_SIZE(mop500_pins_uart0));
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pr_err("pl011: uart pins_enable failed\n");
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static void ux500_uart0_exit(void)
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ret = nmk_config_pins_sleep(mop500_pins_uart0,
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ARRAY_SIZE(mop500_pins_uart0));
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pr_err("pl011: uart pins_disable failed\n");
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static struct amba_pl011_data uart0_plat = {
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#ifdef CONFIG_STE_DMA40
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.dma_filter = stedma40_filter,
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.dma_rx_param = &uart0_dma_cfg_rx,
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.dma_tx_param = &uart0_dma_cfg_tx,
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.init = ux500_uart0_init,
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.exit = ux500_uart0_exit,
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.reset = ux500_uart0_reset,
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static struct amba_pl011_data uart1_plat = {