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#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
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#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
32
#define PCI_VENDOR_ID_ETRON 0x1b6f
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#define PCI_DEVICE_ID_ASROCK_P67 0x7023
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35
static const char hcd_name[] = "xhci_hcd";
33
37
/* called after powerup, by probe or system-pm "wakeup" */
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110
/* Look for vendor-specific quirks */
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111
if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
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pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
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pdev->revision == 0x0) {
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pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK) {
113
if (pdev->revision == 0x0) {
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114
xhci->quirks |= XHCI_RESET_EP_QUIRK;
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xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
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116
" endpoint cmd after reset endpoint\n");
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/* Fresco Logic confirms: all revisions of this chip do not
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* support MSI, even though some of them claim to in their PCI
122
xhci->quirks |= XHCI_BROKEN_MSI;
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xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
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"has broken MSI implementation\n",
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128
if (pdev->vendor == PCI_VENDOR_ID_NEC)
115
129
xhci->quirks |= XHCI_NEC_HOST;
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if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
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xhci->quirks |= XHCI_AMD_PLL_FIX;
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if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
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pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
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xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
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xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
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xhci->limit_active_eps = 64;
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if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
141
pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
142
xhci->quirks |= XHCI_RESET_ON_RESUME;
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xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
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146
/* Make sure the HC is halted. */
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147
retval = xhci_halt(xhci);
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266
static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
239
268
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
269
struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
272
/* The BIOS on systems with the Intel Panther Point chipset may or may
273
* not support xHCI natively. That means that during system resume, it
274
* may switch the ports back to EHCI so that users can use their
275
* keyboard to select a kernel from GRUB after resume from hibernate.
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* The BIOS is supposed to remember whether the OS had xHCI ports
278
* enabled before resume, and switch the ports back to xHCI when the
279
* BIOS/OS semaphore is written, but we all know we can't trust BIOS
282
* Unconditionally switch the ports back to xHCI after a system resume.
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* We can't tell whether the EHCI or xHCI controller will be resumed
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* first, so we have to do the port switchover in both drivers. Writing
285
* a '1' to the port switchover registers should have no effect if the
286
* port was already switched over.
288
if (usb_is_intel_switchable_xhci(pdev))
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usb_enable_xhci_ports(pdev);
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retval = xhci_resume(xhci, hibernated);