← Back to branch summary

~ubuntu-branches/ubuntu/precise/linux-ti-omap4/precise

« back to all changes in this revision

Viewing changes to sound/soc/omap/abe/abe_cm_addr.h

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

Show diffs side-by-side

added added

removed removed

Lines of Context:
sound/soc/omap/abe/abe_cm_addr.h
1
1
/*
2
 
 * ALSA SoC OMAP ABE driver
3
 
*
4
 
 * Author:          Laurent Le Faucheur <l-le-faucheur@ti.com>
5
 
 *
6
 
 * This program is free software; you can redistribute it and/or
7
 
 * modify it under the terms of the GNU General Public License
8
 
 * version 2 as published by the Free Software Foundation.
9
 
 *
10
 
 * This program is distributed in the hope that it will be useful, but
11
 
 * WITHOUT ANY WARRANTY; without even the implied warranty of
12
 
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13
 
 * General Public License for more details.
14
 
 *
15
 
 * You should have received a copy of the GNU General Public License
16
 
 * along with this program; if not, write to the Free Software
17
 
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18
 
 * 02110-1301 USA
19
 
 *
20
 
 */
21
 
#ifndef _ABE_CM_ADDR_H_
22
 
#define _ABE_CM_ADDR_H_
23
 
#define init_CM_ADDR                                        0
24
 
#define init_CM_ADDR_END                                    309
25
 
#define init_CM_sizeof                                      310
26
 
#define C_Data_LSB_2_ADDR                                   310
27
 
#define C_Data_LSB_2_ADDR_END                               310
28
 
#define C_Data_LSB_2_sizeof                                 1
29
 
#define C_1_Alpha_ADDR                                      311
30
 
#define C_1_Alpha_ADDR_END                                  328
31
 
#define C_1_Alpha_sizeof                                    18
32
 
#define C_Alpha_ADDR                                        329
33
 
#define C_Alpha_ADDR_END                                    346
34
 
#define C_Alpha_sizeof                                      18
35
 
#define C_GainsWRamp_ADDR                                   347
36
 
#define C_GainsWRamp_ADDR_END                               360
37
 
#define C_GainsWRamp_sizeof                                 14
38
 
#define C_Gains_DL1M_ADDR                                   361
39
 
#define C_Gains_DL1M_ADDR_END                               364
40
 
#define C_Gains_DL1M_sizeof                                 4
41
 
#define C_Gains_DL2M_ADDR                                   365
42
 
#define C_Gains_DL2M_ADDR_END                               368
43
 
#define C_Gains_DL2M_sizeof                                 4
44
 
#define C_Gains_EchoM_ADDR                                  369
45
 
#define C_Gains_EchoM_ADDR_END                              370
46
 
#define C_Gains_EchoM_sizeof                                2
47
 
#define C_Gains_SDTM_ADDR                                   371
48
 
#define C_Gains_SDTM_ADDR_END                               372
49
 
#define C_Gains_SDTM_sizeof                                 2
50
 
#define C_Gains_VxRecM_ADDR                                 373
51
 
#define C_Gains_VxRecM_ADDR_END                             376
52
 
#define C_Gains_VxRecM_sizeof                               4
53
 
#define C_Gains_ULM_ADDR                                    377
54
 
#define C_Gains_ULM_ADDR_END                                380
55
 
#define C_Gains_ULM_sizeof                                  4
56
 
#define C_Gains_unused_ADDR                                 381
57
 
#define C_Gains_unused_ADDR_END                             382
58
 
#define C_Gains_unused_sizeof                               2
59
 
#define C_SDT_Coefs_ADDR                                    383
60
 
#define C_SDT_Coefs_ADDR_END                                391
61
 
#define C_SDT_Coefs_sizeof                                  9
62
 
#define C_CoefASRC1_VX_ADDR                                 392
63
 
#define C_CoefASRC1_VX_ADDR_END                             410
64
 
#define C_CoefASRC1_VX_sizeof                               19
65
 
#define C_CoefASRC2_VX_ADDR                                 411
66
 
#define C_CoefASRC2_VX_ADDR_END                             429
67
 
#define C_CoefASRC2_VX_sizeof                               19
68
 
#define C_CoefASRC3_VX_ADDR                                 430
69
 
#define C_CoefASRC3_VX_ADDR_END                             448
70
 
#define C_CoefASRC3_VX_sizeof                               19
71
 
#define C_CoefASRC4_VX_ADDR                                 449
72
 
#define C_CoefASRC4_VX_ADDR_END                             467
73
 
#define C_CoefASRC4_VX_sizeof                               19
74
 
#define C_CoefASRC5_VX_ADDR                                 468
75
 
#define C_CoefASRC5_VX_ADDR_END                             486
76
 
#define C_CoefASRC5_VX_sizeof                               19
77
 
#define C_CoefASRC6_VX_ADDR                                 487
78
 
#define C_CoefASRC6_VX_ADDR_END                             505
79
 
#define C_CoefASRC6_VX_sizeof                               19
80
 
#define C_CoefASRC7_VX_ADDR                                 506
81
 
#define C_CoefASRC7_VX_ADDR_END                             524
82
 
#define C_CoefASRC7_VX_sizeof                               19
83
 
#define C_CoefASRC8_VX_ADDR                                 525
84
 
#define C_CoefASRC8_VX_ADDR_END                             543
85
 
#define C_CoefASRC8_VX_sizeof                               19
86
 
#define C_CoefASRC9_VX_ADDR                                 544
87
 
#define C_CoefASRC9_VX_ADDR_END                             562
88
 
#define C_CoefASRC9_VX_sizeof                               19
89
 
#define C_CoefASRC10_VX_ADDR                                563
90
 
#define C_CoefASRC10_VX_ADDR_END                            581
91
 
#define C_CoefASRC10_VX_sizeof                              19
92
 
#define C_CoefASRC11_VX_ADDR                                582
93
 
#define C_CoefASRC11_VX_ADDR_END                            600
94
 
#define C_CoefASRC11_VX_sizeof                              19
95
 
#define C_CoefASRC12_VX_ADDR                                601
96
 
#define C_CoefASRC12_VX_ADDR_END                            619
97
 
#define C_CoefASRC12_VX_sizeof                              19
98
 
#define C_CoefASRC13_VX_ADDR                                620
99
 
#define C_CoefASRC13_VX_ADDR_END                            638
100
 
#define C_CoefASRC13_VX_sizeof                              19
101
 
#define C_CoefASRC14_VX_ADDR                                639
102
 
#define C_CoefASRC14_VX_ADDR_END                            657
103
 
#define C_CoefASRC14_VX_sizeof                              19
104
 
#define C_CoefASRC15_VX_ADDR                                658
105
 
#define C_CoefASRC15_VX_ADDR_END                            676
106
 
#define C_CoefASRC15_VX_sizeof                              19
107
 
#define C_CoefASRC16_VX_ADDR                                677
108
 
#define C_CoefASRC16_VX_ADDR_END                            695
109
 
#define C_CoefASRC16_VX_sizeof                              19
110
 
#define C_AlphaCurrent_UL_VX_ADDR                           696
111
 
#define C_AlphaCurrent_UL_VX_ADDR_END                       696
112
 
#define C_AlphaCurrent_UL_VX_sizeof                         1
113
 
#define C_BetaCurrent_UL_VX_ADDR                            697
114
 
#define C_BetaCurrent_UL_VX_ADDR_END                        697
115
 
#define C_BetaCurrent_UL_VX_sizeof                          1
116
 
#define C_AlphaCurrent_DL_VX_ADDR                           698
117
 
#define C_AlphaCurrent_DL_VX_ADDR_END                       698
118
 
#define C_AlphaCurrent_DL_VX_sizeof                         1
119
 
#define C_BetaCurrent_DL_VX_ADDR                            699
120
 
#define C_BetaCurrent_DL_VX_ADDR_END                        699
121
 
#define C_BetaCurrent_DL_VX_sizeof                          1
122
 
#define C_CoefASRC1_MM_ADDR                                 700
123
 
#define C_CoefASRC1_MM_ADDR_END                             717
124
 
#define C_CoefASRC1_MM_sizeof                               18
125
 
#define C_CoefASRC2_MM_ADDR                                 718
126
 
#define C_CoefASRC2_MM_ADDR_END                             735
127
 
#define C_CoefASRC2_MM_sizeof                               18
128
 
#define C_CoefASRC3_MM_ADDR                                 736
129
 
#define C_CoefASRC3_MM_ADDR_END                             753
130
 
#define C_CoefASRC3_MM_sizeof                               18
131
 
#define C_CoefASRC4_MM_ADDR                                 754
132
 
#define C_CoefASRC4_MM_ADDR_END                             771
133
 
#define C_CoefASRC4_MM_sizeof                               18
134
 
#define C_CoefASRC5_MM_ADDR                                 772
135
 
#define C_CoefASRC5_MM_ADDR_END                             789
136
 
#define C_CoefASRC5_MM_sizeof                               18
137
 
#define C_CoefASRC6_MM_ADDR                                 790
138
 
#define C_CoefASRC6_MM_ADDR_END                             807
139
 
#define C_CoefASRC6_MM_sizeof                               18
140
 
#define C_CoefASRC7_MM_ADDR                                 808
141
 
#define C_CoefASRC7_MM_ADDR_END                             825
142
 
#define C_CoefASRC7_MM_sizeof                               18
143
 
#define C_CoefASRC8_MM_ADDR                                 826
144
 
#define C_CoefASRC8_MM_ADDR_END                             843
145
 
#define C_CoefASRC8_MM_sizeof                               18
146
 
#define C_CoefASRC9_MM_ADDR                                 844
147
 
#define C_CoefASRC9_MM_ADDR_END                             861
148
 
#define C_CoefASRC9_MM_sizeof                               18
149
 
#define C_CoefASRC10_MM_ADDR                                862
150
 
#define C_CoefASRC10_MM_ADDR_END                            879
151
 
#define C_CoefASRC10_MM_sizeof                              18
152
 
#define C_CoefASRC11_MM_ADDR                                880
153
 
#define C_CoefASRC11_MM_ADDR_END                            897
154
 
#define C_CoefASRC11_MM_sizeof                              18
155
 
#define C_CoefASRC12_MM_ADDR                                898
156
 
#define C_CoefASRC12_MM_ADDR_END                            915
157
 
#define C_CoefASRC12_MM_sizeof                              18
158
 
#define C_CoefASRC13_MM_ADDR                                916
159
 
#define C_CoefASRC13_MM_ADDR_END                            933
160
 
#define C_CoefASRC13_MM_sizeof                              18
161
 
#define C_CoefASRC14_MM_ADDR                                934
162
 
#define C_CoefASRC14_MM_ADDR_END                            951
163
 
#define C_CoefASRC14_MM_sizeof                              18
164
 
#define C_CoefASRC15_MM_ADDR                                952
165
 
#define C_CoefASRC15_MM_ADDR_END                            969
166
 
#define C_CoefASRC15_MM_sizeof                              18
167
 
#define C_CoefASRC16_MM_ADDR                                970
168
 
#define C_CoefASRC16_MM_ADDR_END                            987
169
 
#define C_CoefASRC16_MM_sizeof                              18
170
 
#define C_AlphaCurrent_MM_EXT_IN_ADDR                       988
171
 
#define C_AlphaCurrent_MM_EXT_IN_ADDR_END                   988
172
 
#define C_AlphaCurrent_MM_EXT_IN_sizeof                     1
173
 
#define C_BetaCurrent_MM_EXT_IN_ADDR                        989
174
 
#define C_BetaCurrent_MM_EXT_IN_ADDR_END                    989
175
 
#define C_BetaCurrent_MM_EXT_IN_sizeof                      1
176
 
#define C_DL2_L_Coefs_ADDR                                  990
177
 
#define C_DL2_L_Coefs_ADDR_END                              1014
178
 
#define C_DL2_L_Coefs_sizeof                                25
179
 
#define C_DL2_R_Coefs_ADDR                                  1015
180
 
#define C_DL2_R_Coefs_ADDR_END                              1039
181
 
#define C_DL2_R_Coefs_sizeof                                25
182
 
#define C_DL1_Coefs_ADDR                                    1040
183
 
#define C_DL1_Coefs_ADDR_END                                1064
184
 
#define C_DL1_Coefs_sizeof                                  25
185
 
#define C_SRC_3_LP_Coefs_ADDR                               1065
186
 
#define C_SRC_3_LP_Coefs_ADDR_END                           1075
187
 
#define C_SRC_3_LP_Coefs_sizeof                             11
188
 
#define C_SRC_3_LP_GAIN_Coefs_ADDR                          1076
189
 
#define C_SRC_3_LP_GAIN_Coefs_ADDR_END                      1086
190
 
#define C_SRC_3_LP_GAIN_Coefs_sizeof                        11
191
 
#define C_SRC_3_HP_Coefs_ADDR                               1087
192
 
#define C_SRC_3_HP_Coefs_ADDR_END                           1091
193
 
#define C_SRC_3_HP_Coefs_sizeof                             5
194
 
#define C_SRC_6_LP_Coefs_ADDR                               1092
195
 
#define C_SRC_6_LP_Coefs_ADDR_END                           1102
196
 
#define C_SRC_6_LP_Coefs_sizeof                             11
197
 
#define C_SRC_6_LP_GAIN_Coefs_ADDR                          1103
198
 
#define C_SRC_6_LP_GAIN_Coefs_ADDR_END                      1113
199
 
#define C_SRC_6_LP_GAIN_Coefs_sizeof                        11
200
 
#define C_SRC_6_HP_Coefs_ADDR                               1114
201
 
#define C_SRC_6_HP_Coefs_ADDR_END                           1120
202
 
#define C_SRC_6_HP_Coefs_sizeof                             7
203
 
#define C_APS_DL1_coeffs1_ADDR                              1121
204
 
#define C_APS_DL1_coeffs1_ADDR_END                          1129
205
 
#define C_APS_DL1_coeffs1_sizeof                            9
206
 
#define C_APS_DL1_M_coeffs2_ADDR                            1130
207
 
#define C_APS_DL1_M_coeffs2_ADDR_END                        1132
208
 
#define C_APS_DL1_M_coeffs2_sizeof                          3
209
 
#define C_APS_DL1_C_coeffs2_ADDR                            1133
210
 
#define C_APS_DL1_C_coeffs2_ADDR_END                        1135
211
 
#define C_APS_DL1_C_coeffs2_sizeof                          3
212
 
#define C_APS_DL2_L_coeffs1_ADDR                            1136
213
 
#define C_APS_DL2_L_coeffs1_ADDR_END                        1144
214
 
#define C_APS_DL2_L_coeffs1_sizeof                          9
215
 
#define C_APS_DL2_R_coeffs1_ADDR                            1145
216
 
#define C_APS_DL2_R_coeffs1_ADDR_END                        1153
217
 
#define C_APS_DL2_R_coeffs1_sizeof                          9
218
 
#define C_APS_DL2_L_M_coeffs2_ADDR                          1154
219
 
#define C_APS_DL2_L_M_coeffs2_ADDR_END                      1156
220
 
#define C_APS_DL2_L_M_coeffs2_sizeof                        3
221
 
#define C_APS_DL2_R_M_coeffs2_ADDR                          1157
222
 
#define C_APS_DL2_R_M_coeffs2_ADDR_END                      1159
223
 
#define C_APS_DL2_R_M_coeffs2_sizeof                        3
224
 
#define C_APS_DL2_L_C_coeffs2_ADDR                          1160
225
 
#define C_APS_DL2_L_C_coeffs2_ADDR_END                      1162
226
 
#define C_APS_DL2_L_C_coeffs2_sizeof                        3
227
 
#define C_APS_DL2_R_C_coeffs2_ADDR                          1163
228
 
#define C_APS_DL2_R_C_coeffs2_ADDR_END                      1165
229
 
#define C_APS_DL2_R_C_coeffs2_sizeof                        3
230
 
#define C_AlphaCurrent_ECHO_REF_ADDR                        1166
231
 
#define C_AlphaCurrent_ECHO_REF_ADDR_END                    1166
232
 
#define C_AlphaCurrent_ECHO_REF_sizeof                      1
233
 
#define C_BetaCurrent_ECHO_REF_ADDR                         1167
234
 
#define C_BetaCurrent_ECHO_REF_ADDR_END                     1167
235
 
#define C_BetaCurrent_ECHO_REF_sizeof                       1
236
 
#define C_APS_DL1_EQ_ADDR                                   1168
237
 
#define C_APS_DL1_EQ_ADDR_END                               1176
238
 
#define C_APS_DL1_EQ_sizeof                                 9
239
 
#define C_APS_DL2_L_EQ_ADDR                                 1177
240
 
#define C_APS_DL2_L_EQ_ADDR_END                             1185
241
 
#define C_APS_DL2_L_EQ_sizeof                               9
242
 
#define C_APS_DL2_R_EQ_ADDR                                 1186
243
 
#define C_APS_DL2_R_EQ_ADDR_END                             1194
244
 
#define C_APS_DL2_R_EQ_sizeof                               9
245
 
#define C_Vibra2_consts_ADDR                                1195
246
 
#define C_Vibra2_consts_ADDR_END                            1198
247
 
#define C_Vibra2_consts_sizeof                              4
248
 
#define C_Vibra1_coeffs_ADDR                                1199
249
 
#define C_Vibra1_coeffs_ADDR_END                            1209
250
 
#define C_Vibra1_coeffs_sizeof                              11
251
 
#define C_48_96_LP_Coefs_ADDR                               1210
252
 
#define C_48_96_LP_Coefs_ADDR_END                           1224
253
 
#define C_48_96_LP_Coefs_sizeof                             15
254
 
#define C_96_48_AMIC_Coefs_ADDR                             1225
255
 
#define C_96_48_AMIC_Coefs_ADDR_END                         1243
256
 
#define C_96_48_AMIC_Coefs_sizeof                           19
257
 
#define C_96_48_DMIC_Coefs_ADDR                             1244
258
 
#define C_96_48_DMIC_Coefs_ADDR_END                         1262
259
 
#define C_96_48_DMIC_Coefs_sizeof                           19
260
 
#define C_INPUT_SCALE_ADDR                                  1263
261
 
#define C_INPUT_SCALE_ADDR_END                              1263
262
 
#define C_INPUT_SCALE_sizeof                                1
263
 
#define C_OUTPUT_SCALE_ADDR                                 1264
264
 
#define C_OUTPUT_SCALE_ADDR_END                             1264
265
 
#define C_OUTPUT_SCALE_sizeof                               1
266
 
#define C_MUTE_SCALING_ADDR                                 1265
267
 
#define C_MUTE_SCALING_ADDR_END                             1265
268
 
#define C_MUTE_SCALING_sizeof                               1
269
 
#define C_GAINS_0DB_ADDR                                    1266
270
 
#define C_GAINS_0DB_ADDR_END                                1267
271
 
#define C_GAINS_0DB_sizeof                                  2
272
 
#define C_AlphaCurrent_BT_UL_ADDR                           1268
273
 
#define C_AlphaCurrent_BT_UL_ADDR_END                       1268
274
 
#define C_AlphaCurrent_BT_UL_sizeof                         1
275
 
#define C_BetaCurrent_BT_UL_ADDR                            1269
276
 
#define C_BetaCurrent_BT_UL_ADDR_END                        1269
277
 
#define C_BetaCurrent_BT_UL_sizeof                          1
278
 
#define C_AlphaCurrent_BT_DL_ADDR                           1270
279
 
#define C_AlphaCurrent_BT_DL_ADDR_END                       1270
280
 
#define C_AlphaCurrent_BT_DL_sizeof                         1
281
 
#define C_BetaCurrent_BT_DL_ADDR                            1271
282
 
#define C_BetaCurrent_BT_DL_ADDR_END                        1271
283
 
#define C_BetaCurrent_BT_DL_sizeof                          1
284
 
#endif/* _ABECM_ADDR_H_ */
 
2
 
 
3
  This file is provided under a dual BSD/GPLv2 license.  When using or
 
4
  redistributing this file, you may do so under either license.
 
5
 
 
6
  GPL LICENSE SUMMARY
 
7
 
 
8
  Copyright(c) 2010-2011 Texas Instruments Incorporated,
 
9
  All rights reserved.
 
10
 
 
11
  This program is free software; you can redistribute it and/or modify
 
12
  it under the terms of version 2 of the GNU General Public License as
 
13
  published by the Free Software Foundation.
 
14
 
 
15
  This program is distributed in the hope that it will be useful, but
 
16
  WITHOUT ANY WARRANTY; without even the implied warranty of
 
17
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 
18
  General Public License for more details.
 
19
 
 
20
  You should have received a copy of the GNU General Public License
 
21
  along with this program; if not, write to the Free Software
 
22
  Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 
23
  The full GNU General Public License is included in this distribution
 
24
  in the file called LICENSE.GPL.
 
25
 
 
26
  BSD LICENSE
 
27
 
 
28
  Copyright(c) 2010-2011 Texas Instruments Incorporated,
 
29
  All rights reserved.
 
30
 
 
31
  Redistribution and use in source and binary forms, with or without
 
32
  modification, are permitted provided that the following conditions
 
33
  are met:
 
34
 
 
35
    * Redistributions of source code must retain the above copyright
 
36
      notice, this list of conditions and the following disclaimer.
 
37
    * Redistributions in binary form must reproduce the above copyright
 
38
      notice, this list of conditions and the following disclaimer in
 
39
      the documentation and/or other materials provided with the
 
40
      distribution.
 
41
    * Neither the name of Texas Instruments Incorporated nor the names of
 
42
      its contributors may be used to endorse or promote products derived
 
43
      from this software without specific prior written permission.
 
44
 
 
45
  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 
46
  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 
47
  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 
48
  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 
49
  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 
50
  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 
51
  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 
52
  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 
53
  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 
54
  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 
55
  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
56
 
 
57
*/
 
58
#define OMAP_ABE_INIT_CM_ADDR                         0x0
 
59
#define OMAP_ABE_INIT_CM_SIZE                         0x4DC
 
60
 
 
61
#define OMAP_ABE_C_DATA_LSB_2_ADDR                    0x4DC
 
62
#define OMAP_ABE_C_DATA_LSB_2_SIZE                    0x4
 
63
 
 
64
#define OMAP_ABE_C_1_ALPHA_ADDR                       0x4E0
 
65
#define OMAP_ABE_C_1_ALPHA_SIZE                       0x48
 
66
 
 
67
#define OMAP_ABE_C_ALPHA_ADDR                         0x528
 
68
#define OMAP_ABE_C_ALPHA_SIZE                         0x48
 
69
 
 
70
#define OMAP_ABE_C_GAINSWRAMP_ADDR                    0x570
 
71
#define OMAP_ABE_C_GAINSWRAMP_SIZE                    0x38
 
72
 
 
73
#define OMAP_ABE_C_GAINS_DL1M_ADDR                    0x5A8
 
74
#define OMAP_ABE_C_GAINS_DL1M_SIZE                    0x10
 
75
 
 
76
#define OMAP_ABE_C_GAINS_DL2M_ADDR                    0x5B8
 
77
#define OMAP_ABE_C_GAINS_DL2M_SIZE                    0x10
 
78
 
 
79
#define OMAP_ABE_C_GAINS_ECHOM_ADDR                   0x5C8
 
80
#define OMAP_ABE_C_GAINS_ECHOM_SIZE                   0x8
 
81
 
 
82
#define OMAP_ABE_C_GAINS_SDTM_ADDR                    0x5D0
 
83
#define OMAP_ABE_C_GAINS_SDTM_SIZE                    0x8
 
84
 
 
85
#define OMAP_ABE_C_GAINS_VXRECM_ADDR                  0x5D8
 
86
#define OMAP_ABE_C_GAINS_VXRECM_SIZE                  0x10
 
87
 
 
88
#define OMAP_ABE_C_GAINS_ULM_ADDR                     0x5E8
 
89
#define OMAP_ABE_C_GAINS_ULM_SIZE                     0x10
 
90
 
 
91
#define OMAP_ABE_C_GAINS_BTUL_ADDR                    0x5F8
 
92
#define OMAP_ABE_C_GAINS_BTUL_SIZE                    0x8
 
93
 
 
94
#define OMAP_ABE_C_SDT_COEFS_ADDR                     0x600
 
95
#define OMAP_ABE_C_SDT_COEFS_SIZE                     0x24
 
96
 
 
97
#define OMAP_ABE_C_COEFASRC1_VX_ADDR                  0x624
 
98
#define OMAP_ABE_C_COEFASRC1_VX_SIZE                  0x4C
 
99
 
 
100
#define OMAP_ABE_C_COEFASRC2_VX_ADDR                  0x670
 
101
#define OMAP_ABE_C_COEFASRC2_VX_SIZE                  0x4C
 
102
 
 
103
#define OMAP_ABE_C_COEFASRC3_VX_ADDR                  0x6BC
 
104
#define OMAP_ABE_C_COEFASRC3_VX_SIZE                  0x4C
 
105
 
 
106
#define OMAP_ABE_C_COEFASRC4_VX_ADDR                  0x708
 
107
#define OMAP_ABE_C_COEFASRC4_VX_SIZE                  0x4C
 
108
 
 
109
#define OMAP_ABE_C_COEFASRC5_VX_ADDR                  0x754
 
110
#define OMAP_ABE_C_COEFASRC5_VX_SIZE                  0x4C
 
111
 
 
112
#define OMAP_ABE_C_COEFASRC6_VX_ADDR                  0x7A0
 
113
#define OMAP_ABE_C_COEFASRC6_VX_SIZE                  0x4C
 
114
 
 
115
#define OMAP_ABE_C_COEFASRC7_VX_ADDR                  0x7EC
 
116
#define OMAP_ABE_C_COEFASRC7_VX_SIZE                  0x4C
 
117
 
 
118
#define OMAP_ABE_C_COEFASRC8_VX_ADDR                  0x838
 
119
#define OMAP_ABE_C_COEFASRC8_VX_SIZE                  0x4C
 
120
 
 
121
#define OMAP_ABE_C_COEFASRC9_VX_ADDR                  0x884
 
122
#define OMAP_ABE_C_COEFASRC9_VX_SIZE                  0x4C
 
123
 
 
124
#define OMAP_ABE_C_COEFASRC10_VX_ADDR                 0x8D0
 
125
#define OMAP_ABE_C_COEFASRC10_VX_SIZE                 0x4C
 
126
 
 
127
#define OMAP_ABE_C_COEFASRC11_VX_ADDR                 0x91C
 
128
#define OMAP_ABE_C_COEFASRC11_VX_SIZE                 0x4C
 
129
 
 
130
#define OMAP_ABE_C_COEFASRC12_VX_ADDR                 0x968
 
131
#define OMAP_ABE_C_COEFASRC12_VX_SIZE                 0x4C
 
132
 
 
133
#define OMAP_ABE_C_COEFASRC13_VX_ADDR                 0x9B4
 
134
#define OMAP_ABE_C_COEFASRC13_VX_SIZE                 0x4C
 
135
 
 
136
#define OMAP_ABE_C_COEFASRC14_VX_ADDR                 0xA00
 
137
#define OMAP_ABE_C_COEFASRC14_VX_SIZE                 0x4C
 
138
 
 
139
#define OMAP_ABE_C_COEFASRC15_VX_ADDR                 0xA4C
 
140
#define OMAP_ABE_C_COEFASRC15_VX_SIZE                 0x4C
 
141
 
 
142
#define OMAP_ABE_C_COEFASRC16_VX_ADDR                 0xA98
 
143
#define OMAP_ABE_C_COEFASRC16_VX_SIZE                 0x4C
 
144
 
 
145
#define OMAP_ABE_C_ALPHACURRENT_UL_VX_ADDR            0xAE4
 
146
#define OMAP_ABE_C_ALPHACURRENT_UL_VX_SIZE            0x4
 
147
 
 
148
#define OMAP_ABE_C_BETACURRENT_UL_VX_ADDR             0xAE8
 
149
#define OMAP_ABE_C_BETACURRENT_UL_VX_SIZE             0x4
 
150
 
 
151
#define OMAP_ABE_C_ALPHACURRENT_DL_VX_ADDR            0xAEC
 
152
#define OMAP_ABE_C_ALPHACURRENT_DL_VX_SIZE            0x4
 
153
 
 
154
#define OMAP_ABE_C_BETACURRENT_DL_VX_ADDR             0xAF0
 
155
#define OMAP_ABE_C_BETACURRENT_DL_VX_SIZE             0x4
 
156
 
 
157
#define OMAP_ABE_C_COEFASRC1_MM_ADDR                  0xAF4
 
158
#define OMAP_ABE_C_COEFASRC1_MM_SIZE                  0x48
 
159
 
 
160
#define OMAP_ABE_C_COEFASRC2_MM_ADDR                  0xB3C
 
161
#define OMAP_ABE_C_COEFASRC2_MM_SIZE                  0x48
 
162
 
 
163
#define OMAP_ABE_C_COEFASRC3_MM_ADDR                  0xB84
 
164
#define OMAP_ABE_C_COEFASRC3_MM_SIZE                  0x48
 
165
 
 
166
#define OMAP_ABE_C_COEFASRC4_MM_ADDR                  0xBCC
 
167
#define OMAP_ABE_C_COEFASRC4_MM_SIZE                  0x48
 
168
 
 
169
#define OMAP_ABE_C_COEFASRC5_MM_ADDR                  0xC14
 
170
#define OMAP_ABE_C_COEFASRC5_MM_SIZE                  0x48
 
171
 
 
172
#define OMAP_ABE_C_COEFASRC6_MM_ADDR                  0xC5C
 
173
#define OMAP_ABE_C_COEFASRC6_MM_SIZE                  0x48
 
174
 
 
175
#define OMAP_ABE_C_COEFASRC7_MM_ADDR                  0xCA4
 
176
#define OMAP_ABE_C_COEFASRC7_MM_SIZE                  0x48
 
177
 
 
178
#define OMAP_ABE_C_COEFASRC8_MM_ADDR                  0xCEC
 
179
#define OMAP_ABE_C_COEFASRC8_MM_SIZE                  0x48
 
180
 
 
181
#define OMAP_ABE_C_COEFASRC9_MM_ADDR                  0xD34
 
182
#define OMAP_ABE_C_COEFASRC9_MM_SIZE                  0x48
 
183
 
 
184
#define OMAP_ABE_C_COEFASRC10_MM_ADDR                 0xD7C
 
185
#define OMAP_ABE_C_COEFASRC10_MM_SIZE                 0x48
 
186
 
 
187
#define OMAP_ABE_C_COEFASRC11_MM_ADDR                 0xDC4
 
188
#define OMAP_ABE_C_COEFASRC11_MM_SIZE                 0x48
 
189
 
 
190
#define OMAP_ABE_C_COEFASRC12_MM_ADDR                 0xE0C
 
191
#define OMAP_ABE_C_COEFASRC12_MM_SIZE                 0x48
 
192
 
 
193
#define OMAP_ABE_C_COEFASRC13_MM_ADDR                 0xE54
 
194
#define OMAP_ABE_C_COEFASRC13_MM_SIZE                 0x48
 
195
 
 
196
#define OMAP_ABE_C_COEFASRC14_MM_ADDR                 0xE9C
 
197
#define OMAP_ABE_C_COEFASRC14_MM_SIZE                 0x48
 
198
 
 
199
#define OMAP_ABE_C_COEFASRC15_MM_ADDR                 0xEE4
 
200
#define OMAP_ABE_C_COEFASRC15_MM_SIZE                 0x48
 
201
 
 
202
#define OMAP_ABE_C_COEFASRC16_MM_ADDR                 0xF2C
 
203
#define OMAP_ABE_C_COEFASRC16_MM_SIZE                 0x48
 
204
 
 
205
#define OMAP_ABE_C_ALPHACURRENT_MM_EXT_IN_ADDR        0xF74
 
206
#define OMAP_ABE_C_ALPHACURRENT_MM_EXT_IN_SIZE        0x4
 
207
 
 
208
#define OMAP_ABE_C_BETACURRENT_MM_EXT_IN_ADDR         0xF78
 
209
#define OMAP_ABE_C_BETACURRENT_MM_EXT_IN_SIZE         0x4
 
210
 
 
211
#define OMAP_ABE_C_DL2_L_COEFS_ADDR                   0xF7C
 
212
#define OMAP_ABE_C_DL2_L_COEFS_SIZE                   0x64
 
213
 
 
214
#define OMAP_ABE_C_DL2_R_COEFS_ADDR                   0xFE0
 
215
#define OMAP_ABE_C_DL2_R_COEFS_SIZE                   0x64
 
216
 
 
217
#define OMAP_ABE_C_DL1_COEFS_ADDR                     0x1044
 
218
#define OMAP_ABE_C_DL1_COEFS_SIZE                     0x64
 
219
 
 
220
#define OMAP_ABE_C_SRC_3_LP_COEFS_ADDR                0x10A8
 
221
#define OMAP_ABE_C_SRC_3_LP_COEFS_SIZE                0x2C
 
222
 
 
223
#define OMAP_ABE_C_SRC_3_LP_GAIN_COEFS_ADDR           0x10D4
 
224
#define OMAP_ABE_C_SRC_3_LP_GAIN_COEFS_SIZE           0x2C
 
225
 
 
226
#define OMAP_ABE_C_SRC_3_HP_COEFS_ADDR                0x1100
 
227
#define OMAP_ABE_C_SRC_3_HP_COEFS_SIZE                0x14
 
228
 
 
229
#define OMAP_ABE_C_SRC_6_LP_COEFS_ADDR                0x1114
 
230
#define OMAP_ABE_C_SRC_6_LP_COEFS_SIZE                0x2C
 
231
 
 
232
#define OMAP_ABE_C_SRC_6_LP_GAIN_COEFS_ADDR           0x1140
 
233
#define OMAP_ABE_C_SRC_6_LP_GAIN_COEFS_SIZE           0x2C
 
234
 
 
235
#define OMAP_ABE_C_SRC_6_HP_COEFS_ADDR                0x116C
 
236
#define OMAP_ABE_C_SRC_6_HP_COEFS_SIZE                0x1C
 
237
 
 
238
#define OMAP_ABE_C_APS_DL1_COEFFS1_ADDR               0x1188
 
239
#define OMAP_ABE_C_APS_DL1_COEFFS1_SIZE               0x24
 
240
 
 
241
#define OMAP_ABE_C_APS_DL1_M_COEFFS2_ADDR             0x11AC
 
242
#define OMAP_ABE_C_APS_DL1_M_COEFFS2_SIZE             0xC
 
243
 
 
244
#define OMAP_ABE_C_APS_DL1_C_COEFFS2_ADDR             0x11B8
 
245
#define OMAP_ABE_C_APS_DL1_C_COEFFS2_SIZE             0xC
 
246
 
 
247
#define OMAP_ABE_C_APS_DL2_L_COEFFS1_ADDR             0x11C4
 
248
#define OMAP_ABE_C_APS_DL2_L_COEFFS1_SIZE             0x24
 
249
 
 
250
#define OMAP_ABE_C_APS_DL2_R_COEFFS1_ADDR             0x11E8
 
251
#define OMAP_ABE_C_APS_DL2_R_COEFFS1_SIZE             0x24
 
252
 
 
253
#define OMAP_ABE_C_APS_DL2_L_M_COEFFS2_ADDR           0x120C
 
254
#define OMAP_ABE_C_APS_DL2_L_M_COEFFS2_SIZE           0xC
 
255
 
 
256
#define OMAP_ABE_C_APS_DL2_R_M_COEFFS2_ADDR           0x1218
 
257
#define OMAP_ABE_C_APS_DL2_R_M_COEFFS2_SIZE           0xC
 
258
 
 
259
#define OMAP_ABE_C_APS_DL2_L_C_COEFFS2_ADDR           0x1224
 
260
#define OMAP_ABE_C_APS_DL2_L_C_COEFFS2_SIZE           0xC
 
261
 
 
262
#define OMAP_ABE_C_APS_DL2_R_C_COEFFS2_ADDR           0x1230
 
263
#define OMAP_ABE_C_APS_DL2_R_C_COEFFS2_SIZE           0xC
 
264
 
 
265
#define OMAP_ABE_C_ALPHACURRENT_ECHO_REF_ADDR         0x123C
 
266
#define OMAP_ABE_C_ALPHACURRENT_ECHO_REF_SIZE         0x4
 
267
 
 
268
#define OMAP_ABE_C_BETACURRENT_ECHO_REF_ADDR          0x1240
 
269
#define OMAP_ABE_C_BETACURRENT_ECHO_REF_SIZE          0x4
 
270
 
 
271
#define OMAP_ABE_C_APS_DL1_EQ_ADDR                    0x1244
 
272
#define OMAP_ABE_C_APS_DL1_EQ_SIZE                    0x24
 
273
 
 
274
#define OMAP_ABE_C_APS_DL2_L_EQ_ADDR                  0x1268
 
275
#define OMAP_ABE_C_APS_DL2_L_EQ_SIZE                  0x24
 
276
 
 
277
#define OMAP_ABE_C_APS_DL2_R_EQ_ADDR                  0x128C
 
278
#define OMAP_ABE_C_APS_DL2_R_EQ_SIZE                  0x24
 
279
 
 
280
#define OMAP_ABE_C_VIBRA2_CONSTS_ADDR                 0x12B0
 
281
#define OMAP_ABE_C_VIBRA2_CONSTS_SIZE                 0x10
 
282
 
 
283
#define OMAP_ABE_C_VIBRA1_COEFFS_ADDR                 0x12C0
 
284
#define OMAP_ABE_C_VIBRA1_COEFFS_SIZE                 0x2C
 
285
 
 
286
#define OMAP_ABE_C_48_96_LP_COEFS_ADDR                0x12EC
 
287
#define OMAP_ABE_C_48_96_LP_COEFS_SIZE                0x3C
 
288
 
 
289
#define OMAP_ABE_C_96_48_AMIC_COEFS_ADDR              0x1328
 
290
#define OMAP_ABE_C_96_48_AMIC_COEFS_SIZE              0x4C
 
291
 
 
292
#define OMAP_ABE_C_96_48_DMIC_COEFS_ADDR              0x1374
 
293
#define OMAP_ABE_C_96_48_DMIC_COEFS_SIZE              0x4C
 
294
 
 
295
#define OMAP_ABE_C_INPUT_SCALE_ADDR                   0x13C0
 
296
#define OMAP_ABE_C_INPUT_SCALE_SIZE                   0x4
 
297
 
 
298
#define OMAP_ABE_C_OUTPUT_SCALE_ADDR                  0x13C4
 
299
#define OMAP_ABE_C_OUTPUT_SCALE_SIZE                  0x4
 
300
 
 
301
#define OMAP_ABE_C_MUTE_SCALING_ADDR                  0x13C8
 
302
#define OMAP_ABE_C_MUTE_SCALING_SIZE                  0x4
 
303
 
 
304
#define OMAP_ABE_C_GAINS_0DB_ADDR                     0x13CC
 
305
#define OMAP_ABE_C_GAINS_0DB_SIZE                     0x8
 
306
 
 
307
#define OMAP_ABE_C_ALPHACURRENT_BT_UL_ADDR            0x13D4
 
308
#define OMAP_ABE_C_ALPHACURRENT_BT_UL_SIZE            0x4
 
309
 
 
310
#define OMAP_ABE_C_BETACURRENT_BT_UL_ADDR             0x13D8
 
311
#define OMAP_ABE_C_BETACURRENT_BT_UL_SIZE             0x4
 
312
 
 
313
#define OMAP_ABE_C_ALPHACURRENT_BT_DL_ADDR            0x13DC
 
314
#define OMAP_ABE_C_ALPHACURRENT_BT_DL_SIZE            0x4
 
315
 
 
316
#define OMAP_ABE_C_BETACURRENT_BT_DL_ADDR             0x13E0
 
317
#define OMAP_ABE_C_BETACURRENT_BT_DL_SIZE             0x4