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* on-motherboard FPGA PIC operations
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static void frv_fpga_mask(unsigned int irq)
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uint16_t imr = __get_IMR();
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imr |= 1 << (irq - IRQ_BASE_FPGA);
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static void frv_fpga_ack(unsigned int irq)
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__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
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static void frv_fpga_mask_ack(unsigned int irq)
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uint16_t imr = __get_IMR();
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imr |= 1 << (irq - IRQ_BASE_FPGA);
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__clr_IFR(1 << (irq - IRQ_BASE_FPGA));
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static void frv_fpga_unmask(unsigned int irq)
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uint16_t imr = __get_IMR();
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imr &= ~(1 << (irq - IRQ_BASE_FPGA));
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static void frv_fpga_mask(struct irq_data *d)
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uint16_t imr = __get_IMR();
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imr |= 1 << (d->irq - IRQ_BASE_FPGA);
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static void frv_fpga_ack(struct irq_data *d)
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__clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
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static void frv_fpga_mask_ack(struct irq_data *d)
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uint16_t imr = __get_IMR();
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imr |= 1 << (d->irq - IRQ_BASE_FPGA);
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__clr_IFR(1 << (d->irq - IRQ_BASE_FPGA));
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static void frv_fpga_unmask(struct irq_data *d)
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uint16_t imr = __get_IMR();
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imr &= ~(1 << (d->irq - IRQ_BASE_FPGA));
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static struct irq_chip frv_fpga_pic = {
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.mask = frv_fpga_mask,
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.mask_ack = frv_fpga_mask_ack,
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.unmask = frv_fpga_unmask,
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.irq_ack = frv_fpga_ack,
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.irq_mask = frv_fpga_mask,
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.irq_mask_ack = frv_fpga_mask_ack,
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.irq_unmask = frv_fpga_unmask,
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__clr_IFR(0x0000);
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for (irq = IRQ_BASE_FPGA + 1; irq <= IRQ_BASE_FPGA + 14; irq++)
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set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq);
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irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq);
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set_irq_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq);
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irq_set_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq);
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/* the FPGA drives the first four external IRQ inputs on the CPU PIC */
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setup_irq(IRQ_CPU_EXTERNAL0, &fpga_irq[0]);