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Viewing changes to drivers/gpu/drm/i915/i915_drv.c

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

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Lines of Context:
drivers/gpu/drm/i915/i915_drv.c
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unsigned int i915_fbpercrtc = 0;
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module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
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46
int i915_panel_ignore_lid = 0;
 
47
module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600);
 
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unsigned int i915_powersave = 1;
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module_param_named(powersave, i915_powersave, int, 0600);
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unsigned int i915_enable_rc6 = 0;
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module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600);
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58
unsigned int i915_enable_fbc = 0;
 
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module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
 
60
 
55
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unsigned int i915_lvds_downclock = 0;
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module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
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unsigned int i915_panel_use_ssc = 1;
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module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
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61
 
bool i915_try_reset = true;
 
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int i915_vbt_sdvo_panel_type = -1;
 
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module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);
 
69
 
 
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static bool i915_try_reset = true;
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module_param_named(reset, i915_try_reset, bool, 0600);
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64
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static struct drm_driver driver;
163
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static const struct intel_device_info intel_ironlake_m_info = {
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        .gen = 5, .is_mobile = 1,
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        .need_gfx_hws = 1, .has_hotplug = 1,
166
 
        .has_fbc = 0, /* disabled due to buggy hardware */
 
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        .has_fbc = 1,
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        .has_bsd_ring = 1,
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};
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        .has_blt_ring = 1,
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};
184
193
 
 
194
static const struct intel_device_info intel_ivybridge_d_info = {
 
195
        .is_ivybridge = 1, .gen = 7,
 
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        .need_gfx_hws = 1, .has_hotplug = 1,
 
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        .has_bsd_ring = 1,
 
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        .has_blt_ring = 1,
 
199
};
 
200
 
 
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static const struct intel_device_info intel_ivybridge_m_info = {
 
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        .is_ivybridge = 1, .gen = 7, .is_mobile = 1,
 
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        .need_gfx_hws = 1, .has_hotplug = 1,
 
204
        .has_fbc = 0,   /* FBC is not enabled on Ivybridge mobile yet */
 
205
        .has_bsd_ring = 1,
 
206
        .has_blt_ring = 1,
 
207
};
 
208
 
185
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static const struct pci_device_id pciidlist[] = {               /* aka */
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        INTEL_VGA_DEVICE(0x3577, &intel_i830_info),             /* I830_M */
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        INTEL_VGA_DEVICE(0x2562, &intel_845g_info),             /* 845_G */
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        INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
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        INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
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        INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
 
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        INTEL_VGA_DEVICE(0x0156, &intel_ivybridge_m_info), /* GT1 mobile */
 
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        INTEL_VGA_DEVICE(0x0166, &intel_ivybridge_m_info), /* GT2 mobile */
 
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        INTEL_VGA_DEVICE(0x0152, &intel_ivybridge_d_info), /* GT1 desktop */
 
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        INTEL_VGA_DEVICE(0x0162, &intel_ivybridge_d_info), /* GT2 desktop */
 
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        INTEL_VGA_DEVICE(0x015a, &intel_ivybridge_d_info), /* GT1 server */
224
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        {0, 0, 0}
225
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};
226
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#endif
230
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231
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#define INTEL_PCH_DEVICE_ID_MASK        0xff00
 
261
#define INTEL_PCH_IBX_DEVICE_ID_TYPE    0x3b00
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#define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
 
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#define INTEL_PCH_PPT_DEVICE_ID_TYPE    0x1e00
233
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234
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void intel_detect_pch (struct drm_device *dev)
235
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{
248
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                        int id;
249
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                        id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
250
281
 
251
 
                        if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
 
282
                        if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
 
283
                                dev_priv->pch_type = PCH_IBX;
 
284
                                DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
 
285
                        } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
252
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                                dev_priv->pch_type = PCH_CPT;
253
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                                DRM_DEBUG_KMS("Found CougarPoint PCH\n");
 
288
                        } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
 
289
                                /* PantherPoint is CPT compatible */
 
290
                                dev_priv->pch_type = PCH_CPT;
 
291
                                DRM_DEBUG_KMS("Found PatherPoint PCH\n");
254
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                        }
255
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                }
256
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                pci_dev_put(pch);
257
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        }
258
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}
259
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260
 
void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
 
298
static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
261
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{
262
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        int count;
263
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273
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                udelay(10);
274
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}
275
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276
 
void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
 
314
/*
 
315
 * Generally this is called implicitly by the register read function. However,
 
316
 * if some sequence requires the GT to not power down then this function should
 
317
 * be called at the beginning of the sequence followed by a call to
 
318
 * gen6_gt_force_wake_put() at the end of the sequence.
 
319
 */
 
320
void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
 
321
{
 
322
        WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
323
 
 
324
        /* Forcewake is atomic in case we get in here without the lock */
 
325
        if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)
 
326
                __gen6_gt_force_wake_get(dev_priv);
 
327
}
 
328
 
 
329
static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
277
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{
278
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        I915_WRITE_NOTRACE(FORCEWAKE, 0);
279
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        POSTING_READ(FORCEWAKE);
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}
281
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335
/*
 
336
 * see gen6_gt_force_wake_get()
 
337
 */
 
338
void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
 
339
{
 
340
        WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
341
 
 
342
        if (atomic_dec_and_test(&dev_priv->forcewake_count))
 
343
                __gen6_gt_force_wake_put(dev_priv);
 
344
}
 
345
 
282
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void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
283
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{
284
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        int loop = 500;
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        if (get_seconds() - dev_priv->last_gpu_reset < 5) {
514
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                DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
515
579
        } else switch (INTEL_INFO(dev)->gen) {
 
580
        case 7:
516
581
        case 6:
517
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                ret = gen6_do_reset(dev, flags);
 
583
                /* If reset with a user forcewake, try to restore */
 
584
                if (atomic_read(&dev_priv->forcewake_count))
 
585
                        __gen6_gt_force_wake_get(dev_priv);
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                break;
519
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        case 5:
520
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                ret = ironlake_do_reset(dev, flags);
698
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        .resume = i915_resume,
699
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700
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        .device_is_agp = i915_driver_device_is_agp,
701
 
        .enable_vblank = i915_enable_vblank,
702
 
        .disable_vblank = i915_disable_vblank,
703
 
        .get_vblank_timestamp = i915_get_vblank_timestamp,
704
 
        .get_scanout_position = i915_get_crtc_scanoutpos,
705
 
        .irq_preinstall = i915_driver_irq_preinstall,
706
 
        .irq_postinstall = i915_driver_irq_postinstall,
707
 
        .irq_uninstall = i915_driver_irq_uninstall,
708
 
        .irq_handler = i915_driver_irq_handler,
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        .reclaim_buffers = drm_core_reclaim_buffers,
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        .master_create = i915_master_create,
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        .master_destroy = i915_master_destroy,
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        .gem_init_object = i915_gem_init_object,
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        .gem_free_object = i915_gem_free_object,
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        .gem_vm_ops = &i915_gem_vm_ops,
 
779
        .dumb_create = i915_gem_dumb_create,
 
780
        .dumb_map_offset = i915_gem_mmap_gtt,
 
781
        .dumb_destroy = i915_gem_dumb_destroy,
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        .ioctls = i915_ioctls,
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        .fops = {
721
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                 .owner = THIS_MODULE,
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                 .llseek = noop_llseek,
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        },
734
797
 
735
 
        .pci_driver = {
736
 
                 .name = DRIVER_NAME,
737
 
                 .id_table = pciidlist,
738
 
                 .probe = i915_pci_probe,
739
 
                 .remove = i915_pci_remove,
740
 
                 .driver.pm = &i915_pm_ops,
741
 
        },
742
 
 
743
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        .name = DRIVER_NAME,
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        .desc = DRIVER_DESC,
745
800
        .date = DRIVER_DATE,
748
803
        .patchlevel = DRIVER_PATCHLEVEL,
749
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};
750
805
 
 
806
static struct pci_driver i915_pci_driver = {
 
807
        .name = DRIVER_NAME,
 
808
        .id_table = pciidlist,
 
809
        .probe = i915_pci_probe,
 
810
        .remove = i915_pci_remove,
 
811
        .driver.pm = &i915_pm_ops,
 
812
};
 
813
 
751
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static int __init i915_init(void)
752
815
{
753
816
        if (!intel_agp_enabled) {
781
844
        if (!(driver.driver_features & DRIVER_MODESET))
782
845
                driver.get_vblank_timestamp = NULL;
783
846
 
784
 
        return drm_init(&driver);
 
847
        return drm_pci_init(&driver, &i915_pci_driver);
785
848
}
786
849
 
787
850
static void __exit i915_exit(void)
788
851
{
789
 
        drm_exit(&driver);
 
852
        drm_pci_exit(&driver, &i915_pci_driver);
790
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}
791
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792
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module_init(i915_init);