661
642
* threshold events
664
#define IIO_EVENT_CODE_CH1_HIGH IIO_BUFFER_EVENT_CODE(0)
665
#define IIO_EVENT_CODE_CH1_LOW IIO_BUFFER_EVENT_CODE(1)
666
#define IIO_EVENT_CODE_CH2_HIGH IIO_BUFFER_EVENT_CODE(2)
667
#define IIO_EVENT_CODE_CH2_LOW IIO_BUFFER_EVENT_CODE(3)
669
#define IIO_EVENT_ATTR_CH1_HIGH_SH(_evlist, _show, _store, _mask) \
670
IIO_EVENT_ATTR_SH(ch1_high, _evlist, _show, _store, _mask)
672
#define IIO_EVENT_ATTR_CH2_HIGH_SH(_evlist, _show, _store, _mask) \
673
IIO_EVENT_ATTR_SH(ch2_high, _evlist, _show, _store, _mask)
675
#define IIO_EVENT_ATTR_CH1_LOW_SH(_evlist, _show, _store, _mask) \
676
IIO_EVENT_ATTR_SH(ch1_low, _evlist, _show, _store, _mask)
678
#define IIO_EVENT_ATTR_CH2_LOW_SH(_evlist, _show, _store, _mask) \
679
IIO_EVENT_ATTR_SH(ch2_low, _evlist, _show, _store, _mask)
681
static void ad7150_interrupt_handler_bh(struct work_struct *work_s)
645
static irqreturn_t ad7150_event_handler(int irq, void *private)
683
struct ad7150_chip_info *chip =
684
container_of(work_s, struct ad7150_chip_info, thresh_work);
647
struct iio_dev *indio_dev = private;
648
struct ad7150_chip_info *chip = iio_dev_get_devdata(indio_dev);
687
enable_irq(chip->client->irq);
650
s64 timestamp = iio_get_time_ns();
689
652
ad7150_i2c_read(chip, AD7150_STATUS, &int_status, 1);
691
654
if ((int_status & AD7150_STATUS_OUT1) && !(chip->old_state & AD7150_STATUS_OUT1))
692
iio_push_event(chip->indio_dev, 0,
693
IIO_EVENT_CODE_CH1_HIGH,
694
chip->last_timestamp);
655
iio_push_event(indio_dev, 0,
656
IIO_UNMOD_EVENT_CODE(IIO_EV_CLASS_IN,
695
661
else if ((!(int_status & AD7150_STATUS_OUT1)) && (chip->old_state & AD7150_STATUS_OUT1))
696
iio_push_event(chip->indio_dev, 0,
697
IIO_EVENT_CODE_CH1_LOW,
698
chip->last_timestamp);
662
iio_push_event(indio_dev, 0,
663
IIO_UNMOD_EVENT_CODE(IIO_EV_CLASS_IN,
700
669
if ((int_status & AD7150_STATUS_OUT2) && !(chip->old_state & AD7150_STATUS_OUT2))
701
iio_push_event(chip->indio_dev, 0,
702
IIO_EVENT_CODE_CH2_HIGH,
703
chip->last_timestamp);
670
iio_push_event(indio_dev, 0,
671
IIO_UNMOD_EVENT_CODE(IIO_EV_CLASS_IN,
704
676
else if ((!(int_status & AD7150_STATUS_OUT2)) && (chip->old_state & AD7150_STATUS_OUT2))
705
iio_push_event(chip->indio_dev, 0,
706
IIO_EVENT_CODE_CH2_LOW,
707
chip->last_timestamp);
710
static int ad7150_interrupt_handler_th(struct iio_dev *dev_info,
715
struct ad7150_chip_info *chip = dev_info->dev_data;
717
chip->last_timestamp = timestamp;
718
schedule_work(&chip->thresh_work);
723
IIO_EVENT_SH(threshold, &ad7150_interrupt_handler_th);
725
static ssize_t ad7150_query_out_mode(struct device *dev,
726
struct device_attribute *attr,
730
* AD7150 provides two logic output channels, which can be used as interrupt
731
* but the pins are not configurable
733
return sprintf(buf, "1\n");
736
static ssize_t ad7150_set_out_mode(struct device *dev,
737
struct device_attribute *attr,
744
IIO_EVENT_ATTR_CH1_HIGH_SH(iio_event_threshold, ad7150_query_out_mode, ad7150_set_out_mode, 0);
745
IIO_EVENT_ATTR_CH2_HIGH_SH(iio_event_threshold, ad7150_query_out_mode, ad7150_set_out_mode, 0);
746
IIO_EVENT_ATTR_CH1_LOW_SH(iio_event_threshold, ad7150_query_out_mode, ad7150_set_out_mode, 0);
747
IIO_EVENT_ATTR_CH2_LOW_SH(iio_event_threshold, ad7150_query_out_mode, ad7150_set_out_mode, 0);
677
iio_push_event(indio_dev, 0,
678
IIO_UNMOD_EVENT_CODE(IIO_EV_CLASS_IN,
686
static IIO_CONST_ATTR(ch1_high_en, "1");
687
static IIO_CONST_ATTR(ch2_high_en, "1");
688
static IIO_CONST_ATTR(ch1_low_en, "1");
689
static IIO_CONST_ATTR(ch2_low_en, "1");
749
691
static struct attribute *ad7150_event_attributes[] = {
750
&iio_event_attr_ch1_high.dev_attr.attr,
751
&iio_event_attr_ch2_high.dev_attr.attr,
752
&iio_event_attr_ch1_low.dev_attr.attr,
753
&iio_event_attr_ch2_low.dev_attr.attr,
692
&iio_const_attr_ch1_high_en.dev_attr.attr,
693
&iio_const_attr_ch2_high_en.dev_attr.attr,
694
&iio_const_attr_ch1_low_en.dev_attr.attr,
695
&iio_const_attr_ch2_low_en.dev_attr.attr,