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Viewing changes to arch/xtensa/kernel/irq.c

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

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Lines of Context:
arch/xtensa/kernel/irq.c
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asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
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{
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        struct pt_regs *old_regs = set_irq_regs(regs);
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        struct irq_desc *desc = irq_desc + irq;
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        if (irq >= NR_IRQS) {
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                printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
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                               sp - sizeof(struct thread_info));
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        }
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#endif
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        desc->handle_irq(irq, desc);
 
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        generic_handle_irq(irq);
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        irq_exit();
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        set_irq_regs(old_regs);
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}
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/*
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 * Generic, controller-independent functions:
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 */
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int show_interrupts(struct seq_file *p, void *v)
 
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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        int i = *(loff_t *) v, j;
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        struct irqaction * action;
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        unsigned long flags;
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        if (i == 0) {
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                seq_printf(p, "           ");
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                for_each_online_cpu(j)
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                        seq_printf(p, "CPU%d       ",j);
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                seq_putc(p, '\n');
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        }
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        if (i < NR_IRQS) {
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                raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
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                action = irq_desc[i].action;
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                if (!action)
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                        goto skip;
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                seq_printf(p, "%3d: ",i);
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#ifndef CONFIG_SMP
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                seq_printf(p, "%10u ", kstat_irqs(i));
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#else
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                for_each_online_cpu(j)
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                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
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#endif
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                seq_printf(p, " %14s", irq_desc[i].chip->name);
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                seq_printf(p, "  %s", action->name);
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                for (action=action->next; action; action = action->next)
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                        seq_printf(p, ", %s", action->name);
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                seq_putc(p, '\n');
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skip:
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                raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
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        } else if (i == NR_IRQS) {
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                seq_printf(p, "NMI: ");
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                for_each_online_cpu(j)
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                        seq_printf(p, "%10u ", nmi_count(j));
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                seq_putc(p, '\n');
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                seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
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        }
 
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        seq_printf(p, "%*s: ", prec, "ERR");
 
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        seq_printf(p, "%10u\n", atomic_read(&irq_err_count));
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        return 0;
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}
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static void xtensa_irq_mask(unsigned int irq)
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{
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        cached_irq_mask &= ~(1 << irq);
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        set_sr (cached_irq_mask, INTENABLE);
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}
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static void xtensa_irq_unmask(unsigned int irq)
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{
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        cached_irq_mask |= 1 << irq;
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        set_sr (cached_irq_mask, INTENABLE);
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}
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static void xtensa_irq_enable(unsigned int irq)
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{
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        variant_irq_enable(irq);
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        xtensa_irq_unmask(irq);
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}
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static void xtensa_irq_disable(unsigned int irq)
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{
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        xtensa_irq_mask(irq);
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        variant_irq_disable(irq);
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}
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static void xtensa_irq_ack(unsigned int irq)
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{
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        set_sr(1 << irq, INTCLEAR);
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}
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static int xtensa_irq_retrigger(unsigned int irq)
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{
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        set_sr (1 << irq, INTSET);
 
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static void xtensa_irq_mask(struct irq_data *d)
 
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{
 
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        cached_irq_mask &= ~(1 << d->irq);
 
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        set_sr (cached_irq_mask, INTENABLE);
 
76
}
 
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static void xtensa_irq_unmask(struct irq_data *d)
 
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{
 
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        cached_irq_mask |= 1 << d->irq;
 
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        set_sr (cached_irq_mask, INTENABLE);
 
82
}
 
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static void xtensa_irq_enable(struct irq_data *d)
 
85
{
 
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        variant_irq_enable(d->irq);
 
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        xtensa_irq_unmask(d->irq);
 
88
}
 
89
 
 
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static void xtensa_irq_disable(struct irq_data *d)
 
91
{
 
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        xtensa_irq_mask(d->irq);
 
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        variant_irq_disable(d->irq);
 
94
}
 
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static void xtensa_irq_ack(struct irq_data *d)
 
97
{
 
98
        set_sr(1 << d->irq, INTCLEAR);
 
99
}
 
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static int xtensa_irq_retrigger(struct irq_data *d)
 
102
{
 
103
        set_sr (1 << d->irq, INTSET);
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        return 1;
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}
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static struct irq_chip xtensa_irq_chip = {
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        .name           = "xtensa",
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        .enable         = xtensa_irq_enable,
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        .disable        = xtensa_irq_disable,
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        .mask           = xtensa_irq_mask,
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        .unmask         = xtensa_irq_unmask,
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        .ack            = xtensa_irq_ack,
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        .retrigger      = xtensa_irq_retrigger,
 
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        .irq_enable     = xtensa_irq_enable,
 
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        .irq_disable    = xtensa_irq_disable,
 
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        .irq_mask       = xtensa_irq_mask,
 
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        .irq_unmask     = xtensa_irq_unmask,
 
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        .irq_ack        = xtensa_irq_ack,
 
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        .irq_retrigger  = xtensa_irq_retrigger,
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};
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void __init init_IRQ(void)
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                int mask = 1 << index;
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                if (mask & XCHAL_INTTYPE_MASK_SOFTWARE)
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                        set_irq_chip_and_handler(index, &xtensa_irq_chip,
 
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                        irq_set_chip_and_handler(index, &xtensa_irq_chip,
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                                                 handle_simple_irq);
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                else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE)
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                        set_irq_chip_and_handler(index, &xtensa_irq_chip,
 
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                        irq_set_chip_and_handler(index, &xtensa_irq_chip,
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                                                 handle_edge_irq);
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                else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL)
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                        set_irq_chip_and_handler(index, &xtensa_irq_chip,
 
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                        irq_set_chip_and_handler(index, &xtensa_irq_chip,
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                                                 handle_level_irq);
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                else if (mask & XCHAL_INTTYPE_MASK_TIMER)
180
 
                        set_irq_chip_and_handler(index, &xtensa_irq_chip,
 
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                        irq_set_chip_and_handler(index, &xtensa_irq_chip,
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                                                 handle_edge_irq);
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                else    /* XCHAL_INTTYPE_MASK_WRITE_ERROR */
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                        /* XCHAL_INTTYPE_MASK_NMI */
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186
 
                        set_irq_chip_and_handler(index, &xtensa_irq_chip,
 
144
                        irq_set_chip_and_handler(index, &xtensa_irq_chip,
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                                                 handle_level_irq);
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        }
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