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Viewing changes to include/linux/percpu.h

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

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include/linux/percpu.h
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        pscr2_ret__;                                                    \
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})
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/*
 
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 * Special handling for cmpxchg_double.  cmpxchg_double is passed two
 
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 * percpu variables.  The first has to be aligned to a double word
 
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 * boundary and the second has to follow directly thereafter.
 
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 * We enforce this on all architectures even if they don't support
 
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 * a double cmpxchg instruction, since it's a cheap requirement, and it
 
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 * avoids breaking the requirement for architectures with the instruction.
 
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 */
 
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#define __pcpu_double_call_return_bool(stem, pcp1, pcp2, ...)           \
 
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({                                                                      \
 
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        bool pdcrb_ret__;                                               \
 
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        __verify_pcpu_ptr(&pcp1);                                       \
 
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        BUILD_BUG_ON(sizeof(pcp1) != sizeof(pcp2));                     \
 
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        VM_BUG_ON((unsigned long)(&pcp1) % (2 * sizeof(pcp1)));         \
 
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        VM_BUG_ON((unsigned long)(&pcp2) !=                             \
 
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                  (unsigned long)(&pcp1) + sizeof(pcp1));               \
 
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        switch(sizeof(pcp1)) {                                          \
 
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        case 1: pdcrb_ret__ = stem##1(pcp1, pcp2, __VA_ARGS__); break;  \
 
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        case 2: pdcrb_ret__ = stem##2(pcp1, pcp2, __VA_ARGS__); break;  \
 
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        case 4: pdcrb_ret__ = stem##4(pcp1, pcp2, __VA_ARGS__); break;  \
 
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        case 8: pdcrb_ret__ = stem##8(pcp1, pcp2, __VA_ARGS__); break;  \
 
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        default:                                                        \
 
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                __bad_size_call_parameter(); break;                     \
 
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        }                                                               \
 
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        pdcrb_ret__;                                                    \
 
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})
 
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#define __pcpu_size_call(stem, variable, ...)                           \
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do {                                                                    \
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        __verify_pcpu_ptr(&(variable));                                 \
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#endif
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/*
 
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 * cmpxchg_double replaces two adjacent scalars at once.  The first
 
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 * two parameters are per cpu variables which have to be of the same
 
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 * size.  A truth value is returned to indicate success or failure
 
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 * (since a double register result is difficult to handle).  There is
 
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 * very limited hardware support for these operations, so only certain
 
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 * sizes may work.
 
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 */
 
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#define _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)        \
 
539
({                                                                      \
 
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        int ret__;                                                      \
 
541
        preempt_disable();                                              \
 
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        ret__ = __this_cpu_generic_cmpxchg_double(pcp1, pcp2,           \
 
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                        oval1, oval2, nval1, nval2);                    \
 
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        preempt_enable();                                               \
 
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        ret__;                                                          \
 
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})
 
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#ifndef this_cpu_cmpxchg_double
 
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# ifndef this_cpu_cmpxchg_double_1
 
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#  define this_cpu_cmpxchg_double_1(pcp1, pcp2, oval1, oval2, nval1, nval2)     \
 
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        _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
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# endif
 
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# ifndef this_cpu_cmpxchg_double_2
 
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#  define this_cpu_cmpxchg_double_2(pcp1, pcp2, oval1, oval2, nval1, nval2)     \
 
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        _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
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# endif
 
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# ifndef this_cpu_cmpxchg_double_4
 
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#  define this_cpu_cmpxchg_double_4(pcp1, pcp2, oval1, oval2, nval1, nval2)     \
 
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        _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
560
# endif
 
561
# ifndef this_cpu_cmpxchg_double_8
 
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#  define this_cpu_cmpxchg_double_8(pcp1, pcp2, oval1, oval2, nval1, nval2)     \
 
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        _this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
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# endif
 
565
# define this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)        \
 
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        __pcpu_double_call_return_bool(this_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2))
 
567
#endif
 
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569
/*
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 * Generic percpu operations that do not require preemption handling.
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 * Either we do not care about races or the caller has the
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 * responsibility of handling preemptions issues. Arch code can still
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        __pcpu_size_call_return2(__this_cpu_cmpxchg_, pcp, oval, nval)
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#endif
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#define __this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)       \
 
773
({                                                                      \
 
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        int __ret = 0;                                                  \
 
775
        if (__this_cpu_read(pcp1) == (oval1) &&                         \
 
776
                         __this_cpu_read(pcp2)  == (oval2)) {           \
 
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                __this_cpu_write(pcp1, (nval1));                        \
 
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                __this_cpu_write(pcp2, (nval2));                        \
 
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                __ret = 1;                                              \
 
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        }                                                               \
 
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        (__ret);                                                        \
 
782
})
 
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#ifndef __this_cpu_cmpxchg_double
 
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# ifndef __this_cpu_cmpxchg_double_1
 
786
#  define __this_cpu_cmpxchg_double_1(pcp1, pcp2, oval1, oval2, nval1, nval2)   \
 
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        __this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
788
# endif
 
789
# ifndef __this_cpu_cmpxchg_double_2
 
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#  define __this_cpu_cmpxchg_double_2(pcp1, pcp2, oval1, oval2, nval1, nval2)   \
 
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        __this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
792
# endif
 
793
# ifndef __this_cpu_cmpxchg_double_4
 
794
#  define __this_cpu_cmpxchg_double_4(pcp1, pcp2, oval1, oval2, nval1, nval2)   \
 
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        __this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
796
# endif
 
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# ifndef __this_cpu_cmpxchg_double_8
 
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#  define __this_cpu_cmpxchg_double_8(pcp1, pcp2, oval1, oval2, nval1, nval2)   \
 
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        __this_cpu_generic_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
800
# endif
 
801
# define __this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)      \
 
802
        __pcpu_double_call_return_bool(__this_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2))
 
803
#endif
 
804
 
706
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/*
707
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 * IRQ safe versions of the per cpu RMW operations. Note that these operations
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 * are *not* safe against modification of the same variable from another
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        __pcpu_size_call_return2(irqsafe_cpu_cmpxchg_, (pcp), oval, nval)
824
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#endif
825
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925
#define irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)      \
 
926
({                                                                      \
 
927
        int ret__;                                                      \
 
928
        unsigned long flags;                                            \
 
929
        local_irq_save(flags);                                          \
 
930
        ret__ = __this_cpu_generic_cmpxchg_double(pcp1, pcp2,           \
 
931
                        oval1, oval2, nval1, nval2);                    \
 
932
        local_irq_restore(flags);                                       \
 
933
        ret__;                                                          \
 
934
})
 
935
 
 
936
#ifndef irqsafe_cpu_cmpxchg_double
 
937
# ifndef irqsafe_cpu_cmpxchg_double_1
 
938
#  define irqsafe_cpu_cmpxchg_double_1(pcp1, pcp2, oval1, oval2, nval1, nval2)  \
 
939
        irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
940
# endif
 
941
# ifndef irqsafe_cpu_cmpxchg_double_2
 
942
#  define irqsafe_cpu_cmpxchg_double_2(pcp1, pcp2, oval1, oval2, nval1, nval2)  \
 
943
        irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
944
# endif
 
945
# ifndef irqsafe_cpu_cmpxchg_double_4
 
946
#  define irqsafe_cpu_cmpxchg_double_4(pcp1, pcp2, oval1, oval2, nval1, nval2)  \
 
947
        irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
948
# endif
 
949
# ifndef irqsafe_cpu_cmpxchg_double_8
 
950
#  define irqsafe_cpu_cmpxchg_double_8(pcp1, pcp2, oval1, oval2, nval1, nval2)  \
 
951
        irqsafe_generic_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
 
952
# endif
 
953
# define irqsafe_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)     \
 
954
        __pcpu_double_call_return_bool(irqsafe_cpu_cmpxchg_double_, (pcp1), (pcp2), (oval1), (oval2), (nval1), (nval2))
 
955
#endif
 
956
 
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#endif /* __LINUX_PERCPU_H */