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/**********************************************************************
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* Copyright (C) Imagination Technologies Ltd. All rights reserved.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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* This program is distributed in the hope it will be useful but, except
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* as otherwise stated in writing, without any warranty; without even the
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* implied warranty of merchantability or fitness for a particular purpose.
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* See the GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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* Contact Information:
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* Imagination Technologies Ltd. <gpl-support@imgtec.com>
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* Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
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******************************************************************************/
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#if defined(__cplusplus)
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typedef struct _BM_CONTEXT_ BM_CONTEXT;
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typedef struct _MMU_HEAP_ MMU_HEAP;
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typedef struct _MMU_CONTEXT_ MMU_CONTEXT;
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#define PVRSRV_BACKINGSTORE_SYSMEM_CONTIG (1<<(PVRSRV_MEM_BACKINGSTORE_FIELD_SHIFT+0))
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#define PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG (1<<(PVRSRV_MEM_BACKINGSTORE_FIELD_SHIFT+1))
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#define PVRSRV_BACKINGSTORE_LOCALMEM_CONTIG (1<<(PVRSRV_MEM_BACKINGSTORE_FIELD_SHIFT+2))
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#define PVRSRV_BACKINGSTORE_LOCALMEM_NONCONTIG (1<<(PVRSRV_MEM_BACKINGSTORE_FIELD_SHIFT+3))
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typedef IMG_UINT32 DEVICE_MEMORY_HEAP_TYPE;
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#define DEVICE_MEMORY_HEAP_PERCONTEXT 0
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#define DEVICE_MEMORY_HEAP_KERNEL 1
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#define DEVICE_MEMORY_HEAP_SHARED 2
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#define DEVICE_MEMORY_HEAP_SHARED_EXPORTED 3
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#define PVRSRV_DEVICE_NODE_FLAGS_PORT80DISPLAY 1
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#define PVRSRV_DEVICE_NODE_FLAGS_MMU_OPT_INV 2
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typedef struct _DEVICE_MEMORY_HEAP_INFO_
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IMG_UINT32 ui32HeapID;
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IMG_DEV_VIRTADDR sDevVAddrBase;
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IMG_UINT32 ui32HeapSize;
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IMG_UINT32 ui32Attribs;
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DEVICE_MEMORY_HEAP_TYPE DevMemHeapType;
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IMG_HANDLE hDevMemHeap;
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RA_ARENA *psLocalDevMemArena;
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IMG_UINT32 ui32DataPageSize;
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IMG_UINT32 ui32XTileStride;
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} DEVICE_MEMORY_HEAP_INFO;
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typedef struct _DEVICE_MEMORY_INFO_
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IMG_UINT32 ui32AddressSpaceSizeLog2;
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IMG_UINT32 ui32Flags;
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IMG_UINT32 ui32HeapCount;
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IMG_UINT32 ui32SyncHeapID;
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IMG_UINT32 ui32MappingHeapID;
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DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
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BM_CONTEXT *pBMKernelContext;
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BM_CONTEXT *pBMContext;
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} DEVICE_MEMORY_INFO;
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typedef struct DEV_ARENA_DESCRIPTOR_TAG
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IMG_UINT32 ui32HeapID;
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IMG_DEV_VIRTADDR BaseDevVAddr;
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DEVICE_MEMORY_HEAP_TYPE DevMemHeapType;
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IMG_UINT32 ui32DataPageSize;
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DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeapInfo;
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} DEV_ARENA_DESCRIPTOR;
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typedef struct _PDUMP_MMU_ATTRIB_
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PVRSRV_DEVICE_IDENTIFIER sDevId;
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IMG_CHAR *pszPDRegRegion;
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IMG_UINT32 ui32DataPageMask;
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IMG_UINT32 ui32PTEValid;
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IMG_UINT32 ui32PTSize;
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IMG_UINT32 ui32PTEAlignShift;
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IMG_UINT32 ui32PDEMask;
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IMG_UINT32 ui32PDEAlignShift;
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typedef struct _SYS_DATA_TAG_ *PSYS_DATA;
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typedef struct _PVRSRV_DEVICE_NODE_
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PVRSRV_DEVICE_IDENTIFIER sDevId;
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IMG_UINT32 ui32RefCount;
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PVRSRV_ERROR (*pfnInitDevice) (IMG_VOID*);
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PVRSRV_ERROR (*pfnDeInitDevice) (IMG_VOID*);
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PVRSRV_ERROR (*pfnInitDeviceCompatCheck) (struct _PVRSRV_DEVICE_NODE_*);
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PVRSRV_ERROR (*pfnMMUInitialise)(struct _PVRSRV_DEVICE_NODE_*, MMU_CONTEXT**, IMG_DEV_PHYADDR*);
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IMG_VOID (*pfnMMUFinalise)(MMU_CONTEXT*);
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IMG_VOID (*pfnMMUInsertHeap)(MMU_CONTEXT*, MMU_HEAP*);
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MMU_HEAP* (*pfnMMUCreate)(MMU_CONTEXT*,DEV_ARENA_DESCRIPTOR*,RA_ARENA**,PDUMP_MMU_ATTRIB **ppsMMUAttrib);
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IMG_VOID (*pfnMMUDelete)(MMU_HEAP*);
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IMG_BOOL (*pfnMMUAlloc)(MMU_HEAP*pMMU,
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IMG_SIZE_T *pActualSize,
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IMG_UINT32 uDevVAddrAlignment,
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IMG_DEV_VIRTADDR *pDevVAddr);
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IMG_VOID (*pfnMMUFree)(MMU_HEAP*,IMG_DEV_VIRTADDR,IMG_UINT32);
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IMG_VOID (*pfnMMUEnable)(MMU_HEAP*);
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IMG_VOID (*pfnMMUDisable)(MMU_HEAP*);
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IMG_VOID (*pfnMMUMapPages)(MMU_HEAP *pMMU,
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IMG_DEV_VIRTADDR devVAddr,
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IMG_SYS_PHYADDR SysPAddr,
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IMG_UINT32 ui32MemFlags,
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IMG_HANDLE hUniqueTag);
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IMG_VOID (*pfnMMUMapShadow)(MMU_HEAP *pMMU,
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IMG_DEV_VIRTADDR MapBaseDevVAddr,
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IMG_CPU_VIRTADDR CpuVAddr,
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IMG_HANDLE hOSMemHandle,
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IMG_DEV_VIRTADDR *pDevVAddr,
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IMG_UINT32 ui32MemFlags,
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IMG_HANDLE hUniqueTag);
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IMG_VOID (*pfnMMUUnmapPages)(MMU_HEAP *pMMU,
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IMG_DEV_VIRTADDR dev_vaddr,
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IMG_UINT32 ui32PageCount,
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IMG_HANDLE hUniqueTag);
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IMG_VOID (*pfnMMUMapScatter)(MMU_HEAP *pMMU,
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IMG_DEV_VIRTADDR DevVAddr,
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IMG_SYS_PHYADDR *psSysAddr,
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IMG_UINT32 ui32MemFlags,
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IMG_HANDLE hUniqueTag);
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#if defined(SUPPORT_PDUMP_MULTI_PROCESS)
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IMG_BOOL (*pfnMMUIsHeapShared)(MMU_HEAP *);
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IMG_DEV_PHYADDR (*pfnMMUGetPhysPageAddr)(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR sDevVPageAddr);
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IMG_DEV_PHYADDR (*pfnMMUGetPDDevPAddr)(MMU_CONTEXT *pMMUContext);
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IMG_VOID (*pfnMMUGetCacheFlushRange)(MMU_CONTEXT *pMMUContext, IMG_UINT32 *pui32RangeMask);
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IMG_VOID (*pfnMMUGetPDPhysAddr)(MMU_CONTEXT *pMMUContext, IMG_DEV_PHYADDR *psDevPAddr);
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PVRSRV_ERROR (*pfnAllocMemTilingRange)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
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PVRSRV_KERNEL_MEM_INFO *psMemInfo,
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IMG_UINT32 ui32TilingStride,
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IMG_UINT32 *pui32RangeIndex);
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PVRSRV_ERROR (*pfnFreeMemTilingRange)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
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IMG_UINT32 ui32RangeIndex);
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IMG_BOOL (*pfnDeviceISR)(IMG_VOID*);
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IMG_UINT32 ui32SOCInterruptBit;
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IMG_VOID (*pfnDeviceMISR)(IMG_VOID*);
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IMG_VOID (*pfnDeviceCommandComplete)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode);
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IMG_BOOL bReProcessDeviceCommandComplete;
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IMG_VOID (*pfnCacheInvalidate)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode);
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DEVICE_MEMORY_INFO sDevMemoryInfo;
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IMG_UINT32 ui32pvDeviceSize;
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PRESMAN_CONTEXT hResManContext;
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RA_ARENA *psLocalDevMemArena;
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IMG_UINT32 ui32Flags;
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struct _PVRSRV_DEVICE_NODE_ *psNext;
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struct _PVRSRV_DEVICE_NODE_ **ppsThis;
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PVRSRV_ERROR (*pfnPDumpInitDevice)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode);
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IMG_UINT32 (*pfnMMUGetContextID)(IMG_HANDLE hDevMemContext);
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} PVRSRV_DEVICE_NODE;
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PVRSRV_ERROR IMG_CALLCONV PVRSRVRegisterDevice(PSYS_DATA psSysData,
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PVRSRV_ERROR (*pfnRegisterDevice)(PVRSRV_DEVICE_NODE*),
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IMG_UINT32 ui32SOCInterruptBit,
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IMG_UINT32 *pui32DeviceIndex );
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PVRSRV_ERROR IMG_CALLCONV PVRSRVInitialiseDevice(IMG_UINT32 ui32DevIndex);
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PVRSRV_ERROR IMG_CALLCONV PVRSRVFinaliseSystem(IMG_BOOL bInitSuccesful);
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PVRSRV_ERROR IMG_CALLCONV PVRSRVDevInitCompatCheck(PVRSRV_DEVICE_NODE *psDeviceNode);
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PVRSRV_ERROR IMG_CALLCONV PVRSRVDeinitialiseDevice(IMG_UINT32 ui32DevIndex);
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#if !defined(USE_CODE)
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IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV PollForValueKM(volatile IMG_UINT32* pui32LinMemAddr,
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IMG_UINT32 ui32Value,
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IMG_UINT32 ui32Timeoutus,
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IMG_UINT32 ui32PollPeriodus,
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IMG_BOOL bAllowPreemption);
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#if defined (USING_ISR_INTERRUPTS)
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PVRSRV_ERROR IMG_CALLCONV PollForInterruptKM(IMG_UINT32 ui32Value,
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IMG_UINT32 ui32Waitus,
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IMG_UINT32 ui32Tries);
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PVRSRV_ERROR IMG_CALLCONV PVRSRVInit(PSYS_DATA psSysData);
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IMG_VOID IMG_CALLCONV PVRSRVDeInit(PSYS_DATA psSysData);
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IMG_BOOL IMG_CALLCONV PVRSRVDeviceLISR(PVRSRV_DEVICE_NODE *psDeviceNode);
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IMG_BOOL IMG_CALLCONV PVRSRVSystemLISR(IMG_VOID *pvSysData);
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IMG_VOID IMG_CALLCONV PVRSRVMISR(IMG_VOID *pvSysData);
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#if defined(__cplusplus)