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Viewing changes to arch/arm/plat-omap/include/plat/edid.h

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

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arch/arm/plat-omap/include/plat/edid.h
 
1
/*
 
2
 * linux/drivers/video/omap2/dss/edid.c
 
3
 *
 
4
 * Copyright (C) 2009 Texas Instruments
 
5
 * Author: Mythri P K <mythripk@ti.com>
 
6
 *              with some of the ENUM's and structure derived from Yong Zhi's
 
7
 *              hdmi.h(Now obsolete)
 
8
 *
 
9
 * EDID.c to read the EDID content , given the 256 Bytes EDID.
 
10
 *
 
11
 * This program is free software; you can redistribute it and/or modify it
 
12
 * under the terms of the GNU General Public License version 2 as published by
 
13
 * the Free Software Foundation.
 
14
 *
 
15
 * This program is distributed in the hope that it will be useful, but WITHOUT
 
16
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 
17
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 
18
 * more details.
 
19
 *
 
20
 * You should have received a copy of the GNU General Public License along with
 
21
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 
22
 * History:
 
23
 */
 
24
 
 
25
#ifndef _EDID_H_
 
26
#define _EDID_H_
 
27
 
 
28
/* HDMI EDID Extension Data Block Tags  */
 
29
#define HDMI_EDID_EX_DATABLOCK_TAG_MASK         0xE0
 
30
#define HDMI_EDID_EX_DATABLOCK_LEN_MASK         0x1F
 
31
#define HDMI_EDID_EX_SUPPORTS_AI_MASK                   0x80
 
32
 
 
33
#define EDID_TIMING_DESCRIPTOR_SIZE             0x12
 
34
#define EDID_DESCRIPTOR_BLOCK0_ADDRESS          0x36
 
35
#define EDID_DESCRIPTOR_BLOCK1_ADDRESS          0x80
 
36
#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR      4
 
37
#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR      4
 
38
 
 
39
/* EDID Detailed Timing Info 0 begin offset */
 
40
#define HDMI_EDID_DETAILED_TIMING_OFFSET        0x36
 
41
 
 
42
#define HDMI_EDID_PIX_CLK_OFFSET                0
 
43
#define HDMI_EDID_H_ACTIVE_OFFSET               2
 
44
#define HDMI_EDID_H_BLANKING_OFFSET             3
 
45
#define HDMI_EDID_V_ACTIVE_OFFSET               5
 
46
#define HDMI_EDID_V_BLANKING_OFFSET             6
 
47
#define HDMI_EDID_H_SYNC_OFFSET                 8
 
48
#define HDMI_EDID_H_SYNC_PW_OFFSET              9
 
49
#define HDMI_EDID_V_SYNC_OFFSET                 10
 
50
#define HDMI_EDID_V_SYNC_PW_OFFSET              11
 
51
#define HDMI_EDID_H_IMAGE_SIZE_OFFSET           12
 
52
#define HDMI_EDID_V_IMAGE_SIZE_OFFSET           13
 
53
#define HDMI_EDID_H_BORDER_OFFSET               15
 
54
#define HDMI_EDID_V_BORDER_OFFSET               16
 
55
#define HDMI_EDID_FLAGS_OFFSET                  17
 
56
 
 
57
#define HDMI_IEEE_REGISTRATION_ID               0x000c03
 
58
 
 
59
/* HDMI Connected States */
 
60
#define HDMI_STATE_NOMONITOR    0 /* No HDMI monitor connected*/
 
61
#define HDMI_STATE_CONNECTED    1 /* HDMI monitor connected but powered off */
 
62
#define HDMI_STATE_ON           2 /* HDMI monitor connected and powered on*/
 
63
 
 
64
/* HDMI EDID Length */
 
65
#define HDMI_EDID_MAX_LENGTH                    512
 
66
 
 
67
/* HDMI EDID DTDs */
 
68
#define HDMI_EDID_MAX_DTDS                      4
 
69
 
 
70
/* HDMI EDID DTD Tags */
 
71
#define HDMI_EDID_DTD_TAG_MONITOR_NAME          0xFC
 
72
#define HDMI_EDID_DTD_TAG_MONITOR_SERIALNUM     0xFF
 
73
#define HDMI_EDID_DTD_TAG_MONITOR_LIMITS        0xFD
 
74
#define HDMI_EDID_DTD_TAG_STANDARD_TIMING_DATA  0xFA
 
75
#define HDMI_EDID_DTD_TAG_COLOR_POINT_DATA      0xFB
 
76
#define HDMI_EDID_DTD_TAG_ASCII_STRING          0xFE
 
77
 
 
78
#define HDMI_IMG_FORMAT_MAX_LENGTH              20
 
79
#define HDMI_VIDEO_NATIVE_DTDS_MASK             0x0f
 
80
#define HDMI_AUDIO_FORMAT_MAX_LENGTH            10
 
81
#define HDMI_AUDIO_BASIC_MASK                   0x40
 
82
 
 
83
/* HDMI EDID Extenion Data Block Values: Video */
 
84
#define HDMI_EDID_EX_VIDEO_NATIVE               0x80
 
85
#define HDMI_EDID_EX_VIDEO_MASK                 0x7F
 
86
#define HDMI_EDID_EX_VIDEO_MAX                  35
 
87
 
 
88
#define HDMI_EDID_EX_VIDEO_640x480p_60Hz_4_3    1
 
89
#define HDMI_EDID_EX_VIDEO_720x480p_60Hz_4_3    2
 
90
#define HDMI_EDID_EX_VIDEO_720x480p_60Hz_16_9   3
 
91
#define HDMI_EDID_EX_VIDEO_1280x720p_60Hz_16_9  4
 
92
#define HDMI_EDID_EX_VIDEO_1920x1080i_60Hz_16_9 5
 
93
#define HDMI_EDID_EX_VIDEO_720x480i_60Hz_4_3    6
 
94
#define HDMI_EDID_EX_VIDEO_720x480i_60Hz_16_9   7
 
95
#define HDMI_EDID_EX_VIDEO_720x240p_60Hz_4_3    8
 
96
#define HDMI_EDID_EX_VIDEO_720x240p_60Hz_16_9   9
 
97
#define HDMI_EDID_EX_VIDEO_2880x480i_60Hz_4_3   10
 
98
#define HDMI_EDID_EX_VIDEO_2880x480i_60Hz_16_9  11
 
99
#define HDMI_EDID_EX_VIDEO_2880x480p_60Hz_4_3   12
 
100
#define HDMI_EDID_EX_VIDEO_2880x480p_60Hz_16_9  13
 
101
#define HDMI_EDID_EX_VIDEO_1440x480p_60Hz_4_3   14
 
102
#define HDMI_EDID_EX_VIDEO_1440x480p_60Hz_16_9  15
 
103
#define HDMI_EDID_EX_VIDEO_1920x1080p_60Hz_16_9 16
 
104
#define HDMI_EDID_EX_VIDEO_720x576p_50Hz_4_3    17
 
105
#define HDMI_EDID_EX_VIDEO_720x576p_50Hz_16_9   18
 
106
#define HDMI_EDID_EX_VIDEO_1280x720p_50Hz_16_9  19
 
107
#define HDMI_EDID_EX_VIDEO_1920x1080i_50Hz_16_9 20
 
108
#define HDMI_EDID_EX_VIDEO_720x576i_50Hz_4_3    21
 
109
#define HDMI_EDID_EX_VIDEO_720x576i_50Hz_16_9   22
 
110
#define HDMI_EDID_EX_VIDEO_720x288p_50Hz_4_3    23
 
111
#define HDMI_EDID_EX_VIDEO_720x288p_50Hz_16_9   24
 
112
#define HDMI_EDID_EX_VIDEO_2880x576i_50Hz_4_3   25
 
113
#define HDMI_EDID_EX_VIDEO_2880x576i_50Hz_16_9  26
 
114
#define HDMI_EDID_EX_VIDEO_2880x288p_50Hz_4_3   27
 
115
#define HDMI_EDID_EX_VIDEO_2880x288p_50Hz_16_9  28
 
116
#define HDMI_EDID_EX_VIDEO_1440x576p_50Hz_4_3   29
 
117
#define HDMI_EDID_EX_VIDEO_1440x576p_50Hz_16_9  30
 
118
#define HDMI_EDID_EX_VIDEO_1920x1080p_50Hz_16_9 31
 
119
#define HDMI_EDID_EX_VIDEO_1920x1080p_24Hz_16_9 32
 
120
#define HDMI_EDID_EX_VIDEO_1920x1080p_25Hz_16_9 33
 
121
#define HDMI_EDID_EX_VIDEO_1920x1080p_30Hz_16_9 34
 
122
 
 
123
#define OMAP_HDMI_TIMINGS_NB                    34
 
124
#define OMAP_HDMI_TIMINGS_VESA_START            15
 
125
 
 
126
#ifdef __cplusplus
 
127
extern "C" {
 
128
#endif
 
129
 
 
130
enum extension_edid_db {
 
131
        DATABLOCK_AUDIO = 1,
 
132
        DATABLOCK_VIDEO = 2,
 
133
        DATABLOCK_VENDOR = 3,
 
134
        DATABLOCK_SPEAKERS = 4,
 
135
};
 
136
 
 
137
struct img_edid {
 
138
        bool pref;
 
139
        int code;
 
140
};
 
141
 
 
142
struct image_format {
 
143
        int length;
 
144
        struct img_edid fmt[HDMI_IMG_FORMAT_MAX_LENGTH];
 
145
};
 
146
 
 
147
struct audio_edid {
 
148
        int num_of_ch;
 
149
        int format;
 
150
};
 
151
 
 
152
struct audio_format {
 
153
        int length;
 
154
        struct audio_edid fmt[HDMI_AUDIO_FORMAT_MAX_LENGTH];
 
155
};
 
156
 
 
157
struct latency {
 
158
        /* vid: if indicated, value=1+ms/2 with a max of 251 meaning 500ms */
 
159
        int vid_latency;
 
160
 
 
161
        int aud_latency;
 
162
        int int_vid_latency;
 
163
        int int_aud_latency;
 
164
};
 
165
 
 
166
struct deep_color {
 
167
        bool bit_30;
 
168
        bool bit_36;
 
169
        int max_tmds_freq;
 
170
};
 
171
 
 
172
/*  Video Descriptor Block  */
 
173
struct HDMI_EDID_DTD_VIDEO {
 
174
        u16     pixel_clock;            /* 54-55 */
 
175
        u8      horiz_active;           /* 56 */
 
176
        u8      horiz_blanking;         /* 57 */
 
177
        u8      horiz_high;             /* 58 */
 
178
        u8      vert_active;            /* 59 */
 
179
        u8      vert_blanking;          /* 60 */
 
180
        u8      vert_high;              /* 61 */
 
181
        u8      horiz_sync_offset;      /* 62 */
 
182
        u8      horiz_sync_pulse;       /* 63 */
 
183
        u8      vert_sync_pulse;        /* 64 */
 
184
        u8      sync_pulse_high;        /* 65 */
 
185
        u8      horiz_image_size;       /* 66 */
 
186
        u8      vert_image_size;        /* 67 */
 
187
        u8      image_size_high;        /* 68 */
 
188
        u8      horiz_border;           /* 69 */
 
189
        u8      vert_border;            /* 70 */
 
190
        u8      misc_settings;          /* 71 */
 
191
};
 
192
 
 
193
/*      Monitor Limits Descriptor Block */
 
194
struct HDMI_EDID_DTD_MONITOR {
 
195
        u16     pixel_clock;            /* 54-55*/
 
196
        u8      _reserved1;             /* 56 */
 
197
        u8      block_type;             /* 57 */
 
198
        u8      _reserved2;             /* 58 */
 
199
        u8      min_vert_freq;          /* 59 */
 
200
        u8      max_vert_freq;          /* 60 */
 
201
        u8      min_horiz_freq;         /* 61 */
 
202
        u8      max_horiz_freq;         /* 62 */
 
203
        u8      pixel_clock_mhz;        /* 63 */
 
204
        u8      GTF[2];                 /* 64 -65 */
 
205
        u8      start_horiz_freq;       /* 66   */
 
206
        u8      C;                      /* 67 */
 
207
        u8      M[2];                   /* 68-69 */
 
208
        u8      K;                      /* 70 */
 
209
        u8      J;                      /* 71 */
 
210
 
 
211
} __packed;
 
212
 
 
213
/* Text Descriptor Block */
 
214
struct HDMI_EDID_DTD_TEXT {
 
215
        u16     pixel_clock;            /* 54-55 */
 
216
        u8      _reserved1;             /* 56 */
 
217
        u8      block_type;             /* 57 */
 
218
        u8      _reserved2;             /* 58 */
 
219
        u8      text[13];               /* 59-71 */
 
220
} __packed;
 
221
 
 
222
/* DTD Union */
 
223
union HDMI_EDID_DTD {
 
224
        struct HDMI_EDID_DTD_VIDEO      video;
 
225
        struct HDMI_EDID_DTD_TEXT       monitor_name;
 
226
        struct HDMI_EDID_DTD_TEXT       monitor_serial_number;
 
227
        struct HDMI_EDID_DTD_TEXT       ascii;
 
228
        struct HDMI_EDID_DTD_MONITOR    monitor_limits;
 
229
} __packed;
 
230
 
 
231
/*      EDID struct     */
 
232
struct HDMI_EDID {
 
233
        u8      header[8];              /* 00-07 */
 
234
        u16     manufacturerID;         /* 08-09 */
 
235
        u16     product_id;             /* 10-11 */
 
236
        u32     serial_number;          /* 12-15 */
 
237
        u8      week_manufactured;      /* 16 */
 
238
        u8      year_manufactured;      /* 17 */
 
239
        u8      edid_version;           /* 18 */
 
240
        u8      edid_revision;          /* 19 */
 
241
        u8      video_in_definition;    /* 20 */
 
242
        u8      max_horiz_image_size;   /* 21 */
 
243
        u8      max_vert_image_size;    /* 22 */
 
244
        u8      display_gamma;          /* 23 */
 
245
        u8      power_features;         /* 24 */
 
246
        u8      chroma_info[10];        /* 25-34 */
 
247
        u8      timing_1;               /* 35 */
 
248
        u8      timing_2;               /* 36 */
 
249
        u8      timing_3;               /* 37 */
 
250
        u8      std_timings[16];        /* 38-53 */
 
251
 
 
252
        union HDMI_EDID_DTD DTD[4];     /* 54-125 */
 
253
 
 
254
        u8      extension_edid;         /* 126 */
 
255
        u8      checksum;               /* 127 */
 
256
        u8      extension_tag;          /* 00 (extensions follow EDID) */
 
257
        u8      extention_rev;          /* 01 */
 
258
        u8      offset_dtd;             /* 02 */
 
259
        u8      num_dtd;                /* 03 */
 
260
 
 
261
        u8      data_block[123];        /* 04 - 126 */
 
262
        u8      extension_checksum;     /* 127 */
 
263
 
 
264
        u8      ext_datablock[256];
 
265
} __packed;
 
266
 
 
267
#ifdef __cplusplus
 
268
};
 
269
#endif
 
270
 
 
271
#endif
 
272