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Viewing changes to drivers/usb/host/ehci.h

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

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Lines of Context:
drivers/usb/host/ehci.h
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        struct timer_list       watchdog;
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        unsigned long           actions;
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        unsigned                stamp;
 
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        unsigned                periodic_stamp;
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        unsigned                random_frame;
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        unsigned long           next_statechange;
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        ktime_t                 last_periodic_enable;
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        unsigned                has_fsl_port_bug:1; /* FreeScale */
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        unsigned                big_endian_mmio:1;
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        unsigned                big_endian_desc:1;
 
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        unsigned                big_endian_capbase:1;
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        unsigned                has_amcc_usb23:1;
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        unsigned                need_io_watchdog:1;
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        unsigned                broken_periodic:1;
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        unsigned                amd_pll_fix:1;
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        unsigned                fs_i_thresh:1;  /* Intel iso scheduling */
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        unsigned                use_dummy_qh:1; /* AMD Frame List table quirk*/
 
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        unsigned                has_synopsys_hc_bug:1; /* Synopsys HC */
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        /* required for usb32 quirk */
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        #define OHCI_CTRL_HCFS          (3 << 6)
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#ifdef DEBUG
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        struct dentry           *debug_dir;
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#endif
 
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        /*
 
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         * OTG controllers and transceivers need software interaction
 
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         */
 
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        struct otg_transceiver  *transceiver;
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};
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/* convert between an HCD pointer and the corresponding EHCI_HCD */
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 * This attempts to support either format at compile time without a
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 * runtime penalty, or both formats with the additional overhead
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 * of checking a flag bit.
 
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 *
 
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 * ehci_big_endian_capbase is a special quirk for controllers that
 
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 * implement the HC capability registers as separate registers and not
 
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 * as fields of a 32-bit register.
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 */
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#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
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#define ehci_big_endian_mmio(e)         ((e)->big_endian_mmio)
 
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#define ehci_big_endian_capbase(e)      ((e)->big_endian_capbase)
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#else
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#define ehci_big_endian_mmio(e)         0
 
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#define ehci_big_endian_capbase(e)      0
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#endif
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/*
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/*
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 * On certain ppc-44x SoC there is a HW issue, that could only worked around with
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 * explicit suspend/operate of OHCI. This function hereby makes sense only on that arch.
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 * Other common bits are dependant on has_amcc_usb23 quirk flag.
 
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 * Other common bits are dependent on has_amcc_usb23 quirk flag.
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 */
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#ifdef CONFIG_44x
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static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational)