149
149
if (request->request.dma == DMA_ADDR_INVALID) {
150
DBG(20, "not unmapping a never mapped buffer\n");
150
dev_vdbg(musb->controller,
151
"not unmapping a never mapped buffer\n");
153
154
if (request->map_state == MUSB_MAPPED) {
198
199
spin_unlock(&musb->lock);
199
200
unmap_dma_buffer(req, musb);
200
201
if (request->status == 0)
201
DBG(5, "%s done request %p, %d/%d\n",
202
dev_dbg(musb->controller, "%s done request %p, %d/%d\n",
202
203
ep->end_point.name, request,
203
204
req->request.actual, req->request.length);
205
DBG(2, "%s request %p, %d/%d fault %d\n",
206
dev_dbg(musb->controller, "%s request %p, %d/%d fault %d\n",
206
207
ep->end_point.name, request,
207
208
req->request.actual, req->request.length,
208
209
request->status);
220
221
static void nuke(struct musb_ep *ep, const int status)
223
struct musb *musb = ep->musb;
222
224
struct musb_request *req = NULL;
223
225
void __iomem *epio = ep->musb->endpoints[ep->current_epnum].regs;
248
250
value = c->channel_abort(ep->dma);
249
DBG(value ? 1 : 6, "%s: abort DMA --> %d\n", ep->name, value);
251
dev_dbg(musb->controller, "%s: abort DMA --> %d\n",
250
253
c->channel_release(ep->dma);
330
333
/* we shouldn't get here while DMA is active ... but we do ... */
331
334
if (dma_channel_status(musb_ep->dma) == MUSB_DMA_STATUS_BUSY) {
332
DBG(4, "dma pending...\n");
335
dev_dbg(musb->controller, "dma pending...\n");
341
344
(int)(request->length - request->actual));
343
346
if (csr & MUSB_TXCSR_TXPKTRDY) {
344
DBG(5, "%s old packet still ready , txcsr %03x\n",
347
dev_dbg(musb->controller, "%s old packet still ready , txcsr %03x\n",
345
348
musb_ep->end_point.name, csr);
349
352
if (csr & MUSB_TXCSR_P_SENDSTALL) {
350
DBG(5, "%s stalling, txcsr %03x\n",
353
dev_dbg(musb->controller, "%s stalling, txcsr %03x\n",
351
354
musb_ep->end_point.name, csr);
355
DBG(4, "hw_ep%d, maxpacket %d, fifo count %d, txcsr %03x\n",
358
dev_dbg(musb->controller, "hw_ep%d, maxpacket %d, fifo count %d, txcsr %03x\n",
356
359
epnum, musb_ep->packet_sz, fifo_count,
370
373
/* MUSB_TXCSR_P_ISO is still set correctly */
372
#ifdef CONFIG_USB_INVENTRA_DMA
375
#if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_UX500_DMA)
374
377
if (request_size < musb_ep->packet_sz)
375
378
musb_ep->dma->desired_mode = 0;
471
474
/* host may already have the data when this message shows... */
472
DBG(3, "%s TX/IN %s len %d/%d, txcsr %04x, fifo %d/%d\n",
475
dev_dbg(musb->controller, "%s TX/IN %s len %d/%d, txcsr %04x, fifo %d/%d\n",
473
476
musb_ep->end_point.name, use_dma ? "dma" : "pio",
474
477
request->actual, request->length,
475
478
musb_readw(epio, MUSB_TXCSR),
496
499
request = &req->request;
498
501
csr = musb_readw(epio, MUSB_TXCSR);
499
DBG(4, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr);
502
dev_dbg(musb->controller, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr);
501
504
dma = is_dma_capable() ? musb_ep->dma : NULL;
516
519
csr |= MUSB_TXCSR_P_WZC_BITS;
517
520
csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY);
518
521
musb_writew(epio, MUSB_TXCSR, csr);
519
DBG(20, "underrun on ep%d, req %p\n", epnum, request);
522
dev_vdbg(musb->controller, "underrun on ep%d, req %p\n",
522
526
if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
524
528
* SHOULD NOT HAPPEN... has with CPPI though, after
525
529
* changing SENDSTALL (and other cases); harmless?
527
DBG(5, "%s dma still busy?\n", musb_ep->end_point.name);
531
dev_dbg(musb->controller, "%s dma still busy?\n", musb_ep->end_point.name);
536
540
csr |= MUSB_TXCSR_P_WZC_BITS;
537
541
csr &= ~(MUSB_TXCSR_DMAENAB | MUSB_TXCSR_P_UNDERRUN |
538
MUSB_TXCSR_TXPKTRDY);
542
MUSB_TXCSR_TXPKTRDY | MUSB_TXCSR_AUTOSET);
539
543
musb_writew(epio, MUSB_TXCSR, csr);
540
544
/* Ensure writebuffer is empty. */
541
545
csr = musb_readw(epio, MUSB_TXCSR);
542
546
request->actual += musb_ep->dma->actual_len;
543
DBG(4, "TXCSR%d %04x, DMA off, len %zu, req %p\n",
547
dev_dbg(musb->controller, "TXCSR%d %04x, DMA off, len %zu, req %p\n",
544
548
epnum, csr, musb_ep->dma->actual_len, request);
551
555
if ((request->zero && request->length
552
556
&& (request->length % musb_ep->packet_sz == 0)
553
557
&& (request->actual == request->length))
554
#ifdef CONFIG_USB_INVENTRA_DMA
558
#if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_UX500_DMA)
555
559
|| (is_dma && (!dma->desired_mode ||
556
560
(request->actual &
557
561
(musb_ep->packet_sz - 1))))
564
568
if (csr & MUSB_TXCSR_TXPKTRDY)
567
DBG(4, "sending zero pkt\n");
571
dev_dbg(musb->controller, "sending zero pkt\n");
568
572
musb_writew(epio, MUSB_TXCSR, MUSB_TXCSR_MODE
569
573
| MUSB_TXCSR_TXPKTRDY);
570
574
request->zero = 0;
574
578
musb_g_giveback(musb_ep, request, 0);
575
579
req = musb_ep->desc ? next_request(musb_ep) : NULL;
577
DBG(4, "%s idle now\n",
581
dev_dbg(musb->controller, "%s idle now\n",
578
582
musb_ep->end_point.name);
641
645
/* We shouldn't get here while DMA is active, but we do... */
642
646
if (dma_channel_status(musb_ep->dma) == MUSB_DMA_STATUS_BUSY) {
643
DBG(4, "DMA pending...\n");
647
dev_dbg(musb->controller, "DMA pending...\n");
647
651
if (csr & MUSB_RXCSR_P_SENDSTALL) {
648
DBG(5, "%s stalling, RXCSR %04x\n",
652
dev_dbg(musb->controller, "%s stalling, RXCSR %04x\n",
649
653
musb_ep->end_point.name, csr);
761
#elif defined(CONFIG_USB_UX500_DMA)
762
if ((is_buffer_mapped(req)) &&
763
(request->actual < request->length)) {
765
struct dma_controller *c;
766
struct dma_channel *channel;
767
int transfer_size = 0;
769
c = musb->dma_controller;
770
channel = musb_ep->dma;
772
/* In case first packet is short */
773
if (len < musb_ep->packet_sz)
775
else if (request->short_not_ok)
776
transfer_size = min(request->length -
780
transfer_size = min(request->length -
784
csr &= ~MUSB_RXCSR_DMAMODE;
785
csr |= (MUSB_RXCSR_DMAENAB |
786
MUSB_RXCSR_AUTOCLEAR);
788
musb_writew(epio, MUSB_RXCSR, csr);
790
if (transfer_size <= musb_ep->packet_sz) {
791
musb_ep->dma->desired_mode = 0;
793
musb_ep->dma->desired_mode = 1;
794
/* Mode must be set after DMAENAB */
795
csr |= MUSB_RXCSR_DMAMODE;
796
musb_writew(epio, MUSB_RXCSR, csr);
799
if (c->channel_program(channel,
801
channel->desired_mode,
757
808
#endif /* Mentor's DMA */
759
810
fifo_count = request->length - request->actual;
760
DBG(3, "%s OUT/RX pio fifo %d/%d, maxpacket %d\n",
811
dev_dbg(musb->controller, "%s OUT/RX pio fifo %d/%d, maxpacket %d\n",
761
812
musb_ep->end_point.name,
763
814
musb_ep->packet_sz);
846
897
csr = musb_readw(epio, MUSB_RXCSR);
847
898
dma = is_dma_capable() ? musb_ep->dma : NULL;
849
DBG(4, "<== %s, rxcsr %04x%s %p\n", musb_ep->end_point.name,
900
dev_dbg(musb->controller, "<== %s, rxcsr %04x%s %p\n", musb_ep->end_point.name,
850
901
csr, dma ? " (dma)" : "", request);
852
903
if (csr & MUSB_RXCSR_P_SENTSTALL) {
861
912
csr &= ~MUSB_RXCSR_P_OVERRUN;
862
913
musb_writew(epio, MUSB_RXCSR, csr);
864
DBG(3, "%s iso overrun on %p\n", musb_ep->name, request);
915
dev_dbg(musb->controller, "%s iso overrun on %p\n", musb_ep->name, request);
865
916
if (request->status == -EINPROGRESS)
866
917
request->status = -EOVERFLOW;
868
919
if (csr & MUSB_RXCSR_INCOMPRX) {
869
920
/* REVISIT not necessarily an error */
870
DBG(4, "%s, incomprx\n", musb_ep->end_point.name);
921
dev_dbg(musb->controller, "%s, incomprx\n", musb_ep->end_point.name);
873
924
if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
874
925
/* "should not happen"; likely RXPKTRDY pending for DMA */
875
DBG((csr & MUSB_RXCSR_DMAENAB) ? 4 : 1,
876
"%s busy, csr %04x\n",
926
dev_dbg(musb->controller, "%s busy, csr %04x\n",
877
927
musb_ep->end_point.name, csr);
888
938
request->actual += musb_ep->dma->actual_len;
890
DBG(4, "RXCSR%d %04x, dma off, %04x, len %zu, req %p\n",
940
dev_dbg(musb->controller, "RXCSR%d %04x, dma off, %04x, len %zu, req %p\n",
892
942
musb_readw(epio, MUSB_RXCSR),
893
943
musb_ep->dma->actual_len, request);
895
#if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_TUSB_OMAP_DMA)
945
#if defined(CONFIG_USB_INVENTRA_DMA) || defined(CONFIG_USB_TUSB_OMAP_DMA) || \
946
defined(CONFIG_USB_UX500_DMA)
896
947
/* Autoclear doesn't clear RxPktRdy for short packets */
897
948
if ((dma->desired_mode == 0 && !hw_ep->rx_double_buffered)
898
949
|| (dma->actual_len
1156
1208
spin_unlock_irqrestore(&(musb->lock), flags);
1158
DBG(2, "%s\n", musb_ep->end_point.name);
1210
dev_dbg(musb->controller, "%s\n", musb_ep->end_point.name);
1167
1219
struct usb_request *musb_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1169
1221
struct musb_ep *musb_ep = to_musb_ep(ep);
1222
struct musb *musb = musb_ep->musb;
1170
1223
struct musb_request *request = NULL;
1172
1225
request = kzalloc(sizeof *request, gfp_flags);
1173
1226
if (!request) {
1174
DBG(4, "not enough memory\n");
1227
dev_dbg(musb->controller, "not enough memory\n");
1206
1259
void musb_ep_restart(struct musb *musb, struct musb_request *req)
1208
DBG(3, "<== %s request %p len %u on hw_ep%d\n",
1261
dev_dbg(musb->controller, "<== %s request %p len %u on hw_ep%d\n",
1209
1262
req->tx ? "TX/IN" : "RX/OUT",
1210
1263
&req->request, req->request.length, req->epnum);
1239
1292
if (request->ep != musb_ep)
1240
1293
return -EINVAL;
1242
DBG(4, "<== to %s request=%p\n", ep->name, req);
1295
dev_dbg(musb->controller, "<== to %s request=%p\n", ep->name, req);
1244
1297
/* request is mine now... */
1245
1298
request->request.actual = 0;
1254
1307
/* don't queue if the ep is down */
1255
1308
if (!musb_ep->desc) {
1256
DBG(4, "req %p queued to %s while ep %s\n",
1309
dev_dbg(musb->controller, "req %p queued to %s while ep %s\n",
1257
1310
req, ep->name, "disabled");
1258
1311
status = -ESHUTDOWN;
1292
1345
if (r != req) {
1293
DBG(3, "request %p not queued to %s\n", request, ep->name);
1346
dev_dbg(musb->controller, "request %p not queued to %s\n", request, ep->name);
1294
1347
status = -EINVAL;
1298
1351
/* if the hardware doesn't have the request, easy ... */
1299
if (musb_ep->req_list.next != &request->list || musb_ep->busy)
1352
if (musb_ep->req_list.next != &req->list || musb_ep->busy)
1300
1353
musb_g_giveback(musb_ep, request, -ECONNRESET);
1302
1355
/* ... else abort the dma transfer ... */
1356
1409
request = next_request(musb_ep);
1359
DBG(3, "request in progress, cannot halt %s\n",
1412
dev_dbg(musb->controller, "request in progress, cannot halt %s\n",
1361
1414
status = -EAGAIN;
1365
1418
if (musb_ep->is_in) {
1366
1419
csr = musb_readw(epio, MUSB_TXCSR);
1367
1420
if (csr & MUSB_TXCSR_FIFONOTEMPTY) {
1368
DBG(3, "FIFO busy, cannot halt %s\n", ep->name);
1421
dev_dbg(musb->controller, "FIFO busy, cannot halt %s\n", ep->name);
1369
1422
status = -EAGAIN;
1374
1427
musb_ep->wedged = 0;
1376
1429
/* set/clear the stall and toggle bits */
1377
DBG(2, "%s: %s stall\n", ep->name, value ? "set" : "clear");
1430
dev_dbg(musb->controller, "%s: %s stall\n", ep->name, value ? "set" : "clear");
1378
1431
if (musb_ep->is_in) {
1379
1432
csr = musb_readw(epio, MUSB_TXCSR);
1380
1433
csr |= MUSB_TXCSR_P_WZC_BITS
1402
1455
/* maybe start the first request in the queue */
1403
1456
if (!musb_ep->busy && !value && request) {
1404
DBG(3, "restarting the request\n");
1457
dev_dbg(musb->controller, "restarting the request\n");
1405
1458
musb_ep_restart(musb, request);
1471
1524
csr = musb_readw(epio, MUSB_TXCSR);
1472
1525
if (csr & MUSB_TXCSR_FIFONOTEMPTY) {
1473
1526
csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_TXCSR_P_WZC_BITS;
1528
* Setting both TXPKTRDY and FLUSHFIFO makes controller
1529
* to interrupt current FIFO loading, but not flushing
1530
* the already loaded ones.
1532
csr &= ~MUSB_TXCSR_TXPKTRDY;
1474
1533
musb_writew(epio, MUSB_TXCSR, csr);
1475
1534
/* REVISIT may be inappropriate w/o FIFONOTEMPTY ... */
1476
1535
musb_writew(epio, MUSB_TXCSR, csr);
1532
1591
case OTG_STATE_B_IDLE:
1533
1592
/* Start SRP ... OTG not required. */
1534
1593
devctl = musb_readb(mregs, MUSB_DEVCTL);
1535
DBG(2, "Sending SRP: devctl: %02x\n", devctl);
1594
dev_dbg(musb->controller, "Sending SRP: devctl: %02x\n", devctl);
1536
1595
devctl |= MUSB_DEVCTL_SESSION;
1537
1596
musb_writeb(mregs, MUSB_DEVCTL, devctl);
1538
1597
devctl = musb_readb(mregs, MUSB_DEVCTL);
1611
spin_unlock_irqrestore(&musb->lock, flags);
1612
otg_start_srp(musb->xceiv);
1613
spin_lock_irqsave(&musb->lock, flags);
1552
1615
/* Block idling for at least 1s */
1553
1616
musb_platform_try_idle(musb,
1554
1617
jiffies + msecs_to_jiffies(1 * HZ));
1559
DBG(2, "Unhandled wake: %s\n", otg_state_string(musb));
1622
dev_dbg(musb->controller, "Unhandled wake: %s\n",
1623
otg_state_string(musb->xceiv->state));
1565
1629
power = musb_readb(mregs, MUSB_POWER);
1566
1630
power |= MUSB_POWER_RESUME;
1567
1631
musb_writeb(mregs, MUSB_POWER, power);
1568
DBG(2, "issue wakeup\n");
1632
dev_dbg(musb->controller, "issue wakeup\n");
1570
1634
/* FIXME do this next chunk in a timer callback, no udelay */
1600
1664
/* FIXME if on, HdrcStart; if off, HdrcStop */
1602
DBG(3, "gadget %s D+ pullup %s\n",
1666
dev_dbg(musb->controller, "gadget %s D+ pullup %s\n",
1603
1667
musb->gadget_driver->function, is_on ? "on" : "off");
1604
1668
musb_writeb(musb->mregs, MUSB_POWER, power);
1608
1672
static int musb_gadget_vbus_session(struct usb_gadget *gadget, int is_active)
1610
DBG(2, "<= %s =>\n", __func__);
1674
dev_dbg(musb->controller, "<= %s =>\n", __func__);
1613
1677
* FIXME iff driver's softconnect flag is set (as it is during probe,
1817
1881
/* driver must be initialized to support peripheral mode */
1819
DBG(1, "no dev??\n");
1883
dev_dbg(musb->controller, "no dev??\n");
1820
1884
retval = -ENODEV;
1824
1888
pm_runtime_get_sync(musb->controller);
1826
DBG(3, "registering driver %s\n", driver->function);
1890
dev_dbg(musb->controller, "registering driver %s\n", driver->function);
1828
1892
if (musb->gadget_driver) {
1829
DBG(1, "%s is already bound to %s\n",
1893
dev_dbg(musb->controller, "%s is already bound to %s\n",
1830
1894
musb_driver_name,
1831
1895
musb->gadget_driver->driver.name);
1832
1896
retval = -EBUSY;
1843
1907
retval = bind(&musb->g);
1845
DBG(3, "bind to driver %s failed --> %d\n",
1909
dev_dbg(musb->controller, "bind to driver %s failed --> %d\n",
1846
1910
driver->driver.name, retval);
1870
1934
if (is_otg_enabled(musb)) {
1871
1935
struct usb_hcd *hcd = musb_to_hcd(musb);
1873
DBG(3, "OTG startup...\n");
1937
dev_dbg(musb->controller, "OTG startup...\n");
1875
1939
/* REVISIT: funcall to other code, which also
1876
1940
* handles power budgeting ... this way also
1879
1943
retval = usb_add_hcd(musb_to_hcd(musb), -1, 0);
1880
1944
if (retval < 0) {
1881
DBG(1, "add_hcd failed, %d\n", retval);
1945
dev_dbg(musb->controller, "add_hcd failed, %d\n", retval);
1884
if ((musb->xceiv->last_event == USB_EVENT_ID)
1885
&& musb->xceiv->set_vbus)
1886
otg_set_vbus(musb->xceiv, 1);
1949
if ((musb->xceiv->last_event == USB_EVENT_ID)
1950
&& musb->xceiv->set_vbus)
1951
otg_set_vbus(musb->xceiv, 1);
1889
1953
hcd->self.uses_pio_for_control = 1;
1891
if (musb->xceiv->last_event == USB_EVENT_NONE)
1892
pm_runtime_put(musb->controller);
1955
if (musb->xceiv->last_event == USB_EVENT_NONE)
1956
pm_runtime_put(musb->controller);
1987
2049
stop_activity(musb, driver);
1988
2050
otg_set_peripheral(musb->xceiv, NULL);
1990
DBG(3, "unregistering driver %s\n", driver->function);
2052
dev_dbg(musb->controller, "unregistering driver %s\n", driver->function);
1992
2054
spin_unlock_irqrestore(&musb->lock, flags);
1993
2055
driver->unbind(&musb->g);
2051
2113
devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
2052
DBG(3, "devctl %02x\n", devctl);
2114
dev_dbg(musb->controller, "devctl %02x\n", devctl);
2054
2116
switch (musb->xceiv->state) {
2055
2117
case OTG_STATE_B_IDLE:
2085
2147
void __iomem *mregs = musb->mregs;
2086
2148
u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
2088
DBG(3, "devctl %02x\n", devctl);
2150
dev_dbg(musb->controller, "devctl %02x\n", devctl);
2091
2153
musb_writeb(mregs, MUSB_DEVCTL, devctl & MUSB_DEVCTL_SESSION);
2103
2165
switch (musb->xceiv->state) {
2105
2167
#ifdef CONFIG_USB_MUSB_OTG
2106
DBG(2, "Unhandled disconnect %s, setting a_idle\n",
2107
otg_state_string(musb));
2168
dev_dbg(musb->controller, "Unhandled disconnect %s, setting a_idle\n",
2169
otg_state_string(musb->xceiv->state));
2108
2170
musb->xceiv->state = OTG_STATE_A_IDLE;
2109
2171
MUSB_HST_MODE(musb);
2134
2196
u8 devctl = musb_readb(mbase, MUSB_DEVCTL);
2137
DBG(3, "<== %s addr=%x driver '%s'\n",
2199
dev_dbg(musb->controller, "<== %s addr=%x driver '%s'\n",
2138
2200
(devctl & MUSB_DEVCTL_BDEVICE)
2139
2201
? "B-Device" : "A-Device",
2140
2202
musb_readb(mbase, MUSB_FADDR),