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Viewing changes to drivers/i2c/busses/i2c-nomadik.c

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

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drivers/i2c/busses/i2c-nomadik.c
15
15
#include <linux/init.h>
16
16
#include <linux/module.h>
17
17
#include <linux/platform_device.h>
18
 
#include <linux/delay.h>
19
18
#include <linux/slab.h>
20
19
#include <linux/interrupt.h>
21
20
#include <linux/i2c.h>
22
21
#include <linux/err.h>
23
22
#include <linux/clk.h>
24
23
#include <linux/io.h>
 
24
#include <linux/regulator/consumer.h>
 
25
#include <linux/pm_runtime.h>
25
26
 
26
27
#include <plat/i2c.h>
27
28
 
103
104
/* maximum threshold value */
104
105
#define MAX_I2C_FIFO_THRESHOLD  15
105
106
 
106
 
/* per-transfer delay, required for the hardware to stabilize */
107
 
#define I2C_DELAY               150
108
 
 
109
107
enum i2c_status {
110
108
        I2C_NOP,
111
109
        I2C_ON_GOING,
120
118
        I2C_READ = 0x01
121
119
};
122
120
 
123
 
/* controller response timeout in ms */
124
 
#define I2C_TIMEOUT_MS  2000
125
 
 
126
121
/**
127
122
 * struct i2c_nmk_client - client specific data
128
123
 * @slave_adr: 7-bit slave address
129
 
 * @count: no. bytes to be transfered
 
124
 * @count: no. bytes to be transferred
130
125
 * @buffer: client data buffer
131
 
 * @xfer_bytes: bytes transfered till now
 
126
 * @xfer_bytes: bytes transferred till now
132
127
 * @operation: current I2C operation
133
128
 */
134
129
struct i2c_nmk_client {
151
146
 * @stop: stop condition
152
147
 * @xfer_complete: acknowledge completion for a I2C message
153
148
 * @result: controller propogated result
 
149
 * @busy: Busy doing transfer
154
150
 */
155
151
struct nmk_i2c_dev {
156
152
        struct platform_device          *pdev;
163
159
        int                             stop;
164
160
        struct completion               xfer_complete;
165
161
        int                             result;
 
162
        struct regulator                *regulator;
 
163
        bool                            busy;
166
164
};
167
165
 
168
166
/* controller's abort causes */
209
207
        writel((I2C_CR_FTX | I2C_CR_FRX), dev->virtbase + I2C_CR);
210
208
 
211
209
        for (i = 0; i < LOOP_ATTEMPTS; i++) {
212
 
                timeout = jiffies + msecs_to_jiffies(I2C_TIMEOUT_MS);
 
210
                timeout = jiffies + dev->adap.timeout;
213
211
 
214
212
                while (!time_after(jiffies, timeout)) {
215
213
                        if ((readl(dev->virtbase + I2C_CR) &
253
251
{
254
252
        int stat;
255
253
 
256
 
        clk_enable(dev->clk);
257
 
 
258
254
        stat = flush_i2c_fifo(dev);
259
255
        if (stat)
260
 
                return stat;
 
256
                goto exit;
261
257
 
262
258
        /* disable the controller */
263
259
        i2c_clr_bit(dev->virtbase + I2C_CR , I2C_CR_PE);
268
264
 
269
265
        dev->cli.operation = I2C_NO_OPERATION;
270
266
 
271
 
        clk_disable(dev->clk);
272
 
 
273
 
        udelay(I2C_DELAY);
274
 
        return 0;
 
267
exit:
 
268
        return stat;
275
269
}
276
270
 
277
271
/* enable peripheral, master mode operation */
330
324
         * slsu defines the data setup time after SCL clock
331
325
         * stretching in terms of i2c clk cycles. The
332
326
         * needed setup time for the three modes are 250ns,
333
 
         * 100ns, 10ns repectively thus leading to the values
 
327
         * 100ns, 10ns respectively thus leading to the values
334
328
         * of 14, 6, 2 for a 48 MHz i2c clk.
335
329
         */
336
330
        writel(dev->cfg.slsu << 16, dev->virtbase + I2C_SCR);
364
358
        /*
365
359
         * set the speed mode. Currently we support
366
360
         * only standard and fast mode of operation
367
 
         * TODO - support for fast mode plus (upto 1Mb/s)
 
361
         * TODO - support for fast mode plus (up to 1Mb/s)
368
362
         * and high speed (up to 3.4 Mb/s)
369
363
         */
370
364
        if (dev->cfg.sm > I2C_FREQ_MODE_FAST) {
424
418
                        dev->virtbase + I2C_IMSCR);
425
419
 
426
420
        timeout = wait_for_completion_interruptible_timeout(
427
 
                &dev->xfer_complete, msecs_to_jiffies(I2C_TIMEOUT_MS));
 
421
                &dev->xfer_complete, dev->adap.timeout);
428
422
 
429
423
        if (timeout < 0) {
430
424
                dev_err(&dev->pdev->dev,
434
428
        }
435
429
 
436
430
        if (timeout == 0) {
437
 
                /* controller has timedout, re-init the h/w */
438
 
                dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n");
439
 
                (void) init_hw(dev);
 
431
                /* Controller timed out */
 
432
                dev_err(&dev->pdev->dev, "read from slave 0x%x timed out\n",
 
433
                                dev->cli.slave_adr);
440
434
                status = -ETIMEDOUT;
441
435
        }
442
436
        return status;
443
437
}
444
438
 
 
439
static void fill_tx_fifo(struct nmk_i2c_dev *dev, int no_bytes)
 
440
{
 
441
        int count;
 
442
 
 
443
        for (count = (no_bytes - 2);
 
444
                        (count > 0) &&
 
445
                        (dev->cli.count != 0);
 
446
                        count--) {
 
447
                /* write to the Tx FIFO */
 
448
                writeb(*dev->cli.buffer,
 
449
                        dev->virtbase + I2C_TFR);
 
450
                dev->cli.buffer++;
 
451
                dev->cli.count--;
 
452
                dev->cli.xfer_bytes++;
 
453
        }
 
454
 
 
455
}
 
456
 
445
457
/**
446
458
 * write_i2c() - Write data to I2C client.
447
459
 * @dev: private data of I2C Driver
469
481
        init_completion(&dev->xfer_complete);
470
482
 
471
483
        /* enable interrupts by settings the masks */
472
 
        irq_mask = (I2C_IT_TXFNE | I2C_IT_TXFOVR |
473
 
                        I2C_IT_MAL | I2C_IT_BERR);
 
484
        irq_mask = (I2C_IT_TXFOVR | I2C_IT_MAL | I2C_IT_BERR);
 
485
 
 
486
        /* Fill the TX FIFO with transmit data */
 
487
        fill_tx_fifo(dev, MAX_I2C_FIFO_THRESHOLD);
 
488
 
 
489
        if (dev->cli.count != 0)
 
490
                irq_mask |= I2C_IT_TXFNE;
474
491
 
475
492
        /*
476
493
         * check if we want to transfer a single or multiple bytes, if so
488
505
                        dev->virtbase + I2C_IMSCR);
489
506
 
490
507
        timeout = wait_for_completion_interruptible_timeout(
491
 
                &dev->xfer_complete, msecs_to_jiffies(I2C_TIMEOUT_MS));
 
508
                &dev->xfer_complete, dev->adap.timeout);
492
509
 
493
510
        if (timeout < 0) {
494
511
                dev_err(&dev->pdev->dev,
498
515
        }
499
516
 
500
517
        if (timeout == 0) {
501
 
                /* controller has timedout, re-init the h/w */
502
 
                dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n");
 
518
                /* Controller timed out */
 
519
                dev_err(&dev->pdev->dev, "write to slave 0x%x timed out\n",
 
520
                                dev->cli.slave_adr);
 
521
                status = -ETIMEDOUT;
 
522
        }
 
523
 
 
524
        return status;
 
525
}
 
526
 
 
527
/**
 
528
 * nmk_i2c_xfer_one() - transmit a single I2C message
 
529
 * @dev: device with a message encoded into it
 
530
 * @flags: message flags
 
531
 */
 
532
static int nmk_i2c_xfer_one(struct nmk_i2c_dev *dev, u16 flags)
 
533
{
 
534
        int status;
 
535
 
 
536
        if (flags & I2C_M_RD) {
 
537
                /* read operation */
 
538
                dev->cli.operation = I2C_READ;
 
539
                status = read_i2c(dev);
 
540
        } else {
 
541
                /* write operation */
 
542
                dev->cli.operation = I2C_WRITE;
 
543
                status = write_i2c(dev);
 
544
        }
 
545
 
 
546
        if (status || (dev->result)) {
 
547
                u32 i2c_sr;
 
548
                u32 cause;
 
549
 
 
550
                i2c_sr = readl(dev->virtbase + I2C_SR);
 
551
                /*
 
552
                 * Check if the controller I2C operation status
 
553
                 * is set to ABORT(11b).
 
554
                 */
 
555
                if (((i2c_sr >> 2) & 0x3) == 0x3) {
 
556
                        /* get the abort cause */
 
557
                        cause = (i2c_sr >> 4) & 0x7;
 
558
                        dev_err(&dev->pdev->dev, "%s\n", cause
 
559
                                >= ARRAY_SIZE(abort_causes) ?
 
560
                                "unknown reason" :
 
561
                                abort_causes[cause]);
 
562
                }
 
563
 
503
564
                (void) init_hw(dev);
504
 
                status = -ETIMEDOUT;
 
565
 
 
566
                status = status ? status : dev->result;
505
567
        }
506
568
 
507
569
        return status;
559
621
{
560
622
        int status;
561
623
        int i;
562
 
        u32 cause;
563
624
        struct nmk_i2c_dev *dev = i2c_get_adapdata(i2c_adap);
 
625
        int j;
 
626
 
 
627
        dev->busy = true;
 
628
 
 
629
        if (dev->regulator)
 
630
                regulator_enable(dev->regulator);
 
631
        pm_runtime_get_sync(&dev->pdev->dev);
 
632
 
 
633
        clk_enable(dev->clk);
564
634
 
565
635
        status = init_hw(dev);
566
636
        if (status)
567
 
                return status;
568
 
 
569
 
        clk_enable(dev->clk);
570
 
 
571
 
        /* setup the i2c controller */
572
 
        setup_i2c_controller(dev);
573
 
 
574
 
        for (i = 0; i < num_msgs; i++) {
575
 
                if (unlikely(msgs[i].flags & I2C_M_TEN)) {
576
 
                        dev_err(&dev->pdev->dev, "10 bit addressing"
577
 
                                        "not supported\n");
578
 
                        return -EINVAL;
579
 
                }
580
 
                dev->cli.slave_adr      = msgs[i].addr;
581
 
                dev->cli.buffer         = msgs[i].buf;
582
 
                dev->cli.count          = msgs[i].len;
583
 
                dev->stop = (i < (num_msgs - 1)) ? 0 : 1;
584
 
                dev->result = 0;
585
 
 
586
 
                if (msgs[i].flags & I2C_M_RD) {
587
 
                        /* it is a read operation */
588
 
                        dev->cli.operation = I2C_READ;
589
 
                        status = read_i2c(dev);
590
 
                } else {
591
 
                        /* write operation */
592
 
                        dev->cli.operation = I2C_WRITE;
593
 
                        status = write_i2c(dev);
594
 
                }
595
 
                if (status || (dev->result)) {
596
 
                        /* get the abort cause */
597
 
                        cause = (readl(dev->virtbase + I2C_SR) >> 4) & 0x7;
598
 
                        dev_err(&dev->pdev->dev, "error during I2C"
599
 
                                        "message xfer: %d\n", cause);
600
 
                        dev_err(&dev->pdev->dev, "%s\n",
601
 
                                cause >= ARRAY_SIZE(abort_causes)
602
 
                                ? "unknown reason" : abort_causes[cause]);
603
 
                        clk_disable(dev->clk);
604
 
                        return status;
605
 
                }
606
 
                udelay(I2C_DELAY);
 
637
                goto out;
 
638
 
 
639
        /* Attempt three times to send the message queue */
 
640
        for (j = 0; j < 3; j++) {
 
641
                /* setup the i2c controller */
 
642
                setup_i2c_controller(dev);
 
643
 
 
644
                for (i = 0; i < num_msgs; i++) {
 
645
                        if (unlikely(msgs[i].flags & I2C_M_TEN)) {
 
646
                                dev_err(&dev->pdev->dev, "10 bit addressing"
 
647
                                                "not supported\n");
 
648
 
 
649
                                status = -EINVAL;
 
650
                                goto out;
 
651
                        }
 
652
                        dev->cli.slave_adr      = msgs[i].addr;
 
653
                        dev->cli.buffer         = msgs[i].buf;
 
654
                        dev->cli.count          = msgs[i].len;
 
655
                        dev->stop = (i < (num_msgs - 1)) ? 0 : 1;
 
656
                        dev->result = 0;
 
657
 
 
658
                        status = nmk_i2c_xfer_one(dev, msgs[i].flags);
 
659
                        if (status != 0)
 
660
                                break;
 
661
                }
 
662
                if (status == 0)
 
663
                        break;
607
664
        }
 
665
 
 
666
out:
608
667
        clk_disable(dev->clk);
 
668
        pm_runtime_put_sync(&dev->pdev->dev);
 
669
        if (dev->regulator)
 
670
                regulator_disable(dev->regulator);
 
671
 
 
672
        dev->busy = false;
609
673
 
610
674
        /* return the no. messages processed */
611
675
        if (status)
666
730
                         */
667
731
                        disable_interrupts(dev, I2C_IT_TXFNE);
668
732
                } else {
669
 
                        for (count = (MAX_I2C_FIFO_THRESHOLD - tft - 2);
670
 
                                        (count > 0) &&
671
 
                                        (dev->cli.count != 0);
672
 
                                        count--) {
673
 
                                /* write to the Tx FIFO */
674
 
                                writeb(*dev->cli.buffer,
675
 
                                        dev->virtbase + I2C_TFR);
676
 
                                dev->cli.buffer++;
677
 
                                dev->cli.count--;
678
 
                                dev->cli.xfer_bytes++;
679
 
                        }
 
733
                        fill_tx_fifo(dev, (MAX_I2C_FIFO_THRESHOLD - tft));
680
734
                        /*
681
735
                         * if done, close the transfer by disabling the
682
736
                         * corresponding TXFNE interrupt
729
783
                        }
730
784
                }
731
785
 
732
 
                i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MTD);
733
 
                i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MTDWS);
734
 
 
735
 
                disable_interrupts(dev,
736
 
                                (I2C_IT_TXFNE | I2C_IT_TXFE | I2C_IT_TXFF
737
 
                                        | I2C_IT_TXFOVR | I2C_IT_RXFNF
738
 
                                        | I2C_IT_RXFF | I2C_IT_RXFE));
 
786
                disable_all_interrupts(dev);
 
787
                clear_all_interrupts(dev);
739
788
 
740
789
                if (dev->cli.count) {
741
 
                        dev->result = -1;
 
790
                        dev->result = -EIO;
742
791
                        dev_err(&dev->pdev->dev, "%lu bytes still remain to be"
743
792
                                        "xfered\n", dev->cli.count);
744
793
                        (void) init_hw(dev);
749
798
 
750
799
        /* Master Arbitration lost interrupt */
751
800
        case I2C_IT_MAL:
752
 
                dev->result = -1;
 
801
                dev->result = -EIO;
753
802
                (void) init_hw(dev);
754
803
 
755
804
                i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MAL);
763
812
         * during the transaction.
764
813
         */
765
814
        case I2C_IT_BERR:
766
 
                dev->result = -1;
 
815
                dev->result = -EIO;
767
816
                /* get the status */
768
817
                if (((readl(dev->virtbase + I2C_SR) >> 2) & 0x3) == I2C_ABORT)
769
818
                        (void) init_hw(dev);
779
828
         * the Tx FIFO is full.
780
829
         */
781
830
        case I2C_IT_TXFOVR:
782
 
                dev->result = -1;
 
831
                dev->result = -EIO;
783
832
                (void) init_hw(dev);
784
833
 
785
834
                dev_err(&dev->pdev->dev, "Tx Fifo Over run\n");
805
854
        return IRQ_HANDLED;
806
855
}
807
856
 
 
857
 
 
858
#ifdef CONFIG_PM
 
859
static int nmk_i2c_suspend(struct device *dev)
 
860
{
 
861
        struct platform_device *pdev = to_platform_device(dev);
 
862
        struct nmk_i2c_dev *nmk_i2c = platform_get_drvdata(pdev);
 
863
 
 
864
        if (nmk_i2c->busy)
 
865
                return -EBUSY;
 
866
 
 
867
        return 0;
 
868
}
 
869
 
 
870
static int nmk_i2c_resume(struct device *dev)
 
871
{
 
872
        return 0;
 
873
}
 
874
#else
 
875
#define nmk_i2c_suspend NULL
 
876
#define nmk_i2c_resume  NULL
 
877
#endif
 
878
 
 
879
/*
 
880
 * We use noirq so that we suspend late and resume before the wakeup interrupt
 
881
 * to ensure that we do the !pm_runtime_suspended() check in resume before
 
882
 * there has been a regular pm runtime resume (via pm_runtime_get_sync()).
 
883
 */
 
884
static const struct dev_pm_ops nmk_i2c_pm = {
 
885
        .suspend_noirq  = nmk_i2c_suspend,
 
886
        .resume_noirq   = nmk_i2c_resume,
 
887
};
 
888
 
808
889
static unsigned int nmk_i2c_functionality(struct i2c_adapter *adap)
809
890
{
810
891
        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
830
911
                ret = -ENOMEM;
831
912
                goto err_no_mem;
832
913
        }
833
 
 
 
914
        dev->busy = false;
834
915
        dev->pdev = pdev;
835
916
        platform_set_drvdata(pdev, dev);
836
917
 
860
941
                goto err_irq;
861
942
        }
862
943
 
 
944
        dev->regulator = regulator_get(&pdev->dev, "v-i2c");
 
945
        if (IS_ERR(dev->regulator)) {
 
946
                dev_warn(&pdev->dev, "could not get i2c regulator\n");
 
947
                dev->regulator = NULL;
 
948
        }
 
949
 
 
950
        pm_suspend_ignore_children(&pdev->dev, true);
 
951
        pm_runtime_enable(&pdev->dev);
 
952
 
863
953
        dev->clk = clk_get(&pdev->dev, NULL);
864
954
        if (IS_ERR(dev->clk)) {
865
955
                dev_err(&pdev->dev, "could not get i2c clock\n");
872
962
        adap->owner     = THIS_MODULE;
873
963
        adap->class     = I2C_CLASS_HWMON | I2C_CLASS_SPD;
874
964
        adap->algo      = &nmk_i2c_algo;
 
965
        adap->timeout   = pdata->timeout ? msecs_to_jiffies(pdata->timeout) :
 
966
                msecs_to_jiffies(20000);
875
967
        snprintf(adap->name, sizeof(adap->name),
876
968
                 "Nomadik I2C%d at %lx", pdev->id, (unsigned long)res->start);
877
969
 
887
979
 
888
980
        i2c_set_adapdata(adap, dev);
889
981
 
890
 
        ret = init_hw(dev);
891
 
        if (ret != 0) {
892
 
                dev_err(&pdev->dev, "error in initializing i2c hardware\n");
893
 
                goto err_init_hw;
894
 
        }
895
 
 
896
982
        dev_info(&pdev->dev, "initialize %s on virtual "
897
983
                "base %p\n", adap->name, dev->virtbase);
898
984
 
904
990
 
905
991
        return 0;
906
992
 
907
 
 err_init_hw:
908
993
 err_add_adap:
909
994
        clk_put(dev->clk);
910
995
 err_no_clk:
 
996
        if (dev->regulator)
 
997
                regulator_put(dev->regulator);
 
998
        pm_runtime_disable(&pdev->dev);
911
999
        free_irq(dev->irq, dev);
912
1000
 err_irq:
913
1001
        iounmap(dev->virtbase);
938
1026
        if (res)
939
1027
                release_mem_region(res->start, resource_size(res));
940
1028
        clk_put(dev->clk);
 
1029
        if (dev->regulator)
 
1030
                regulator_put(dev->regulator);
 
1031
        pm_runtime_disable(&pdev->dev);
941
1032
        platform_set_drvdata(pdev, NULL);
942
1033
        kfree(dev);
943
1034
 
948
1039
        .driver = {
949
1040
                .owner = THIS_MODULE,
950
1041
                .name = DRIVER_NAME,
 
1042
                .pm = &nmk_i2c_pm,
951
1043
        },
952
1044
        .probe = nmk_i2c_probe,
953
1045
        .remove = __devexit_p(nmk_i2c_remove),