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Viewing changes to drivers/net/wireless/ath/ath9k/ar5008_phy.c

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

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drivers/net/wireless/ath/ath9k/ar5008_phy.c
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/*
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 * Copyright (c) 2008-2010 Atheros Communications Inc.
 
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 * Copyright (c) 2008-2011 Atheros Communications Inc.
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 *
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 * Permission to use, copy, modify, and/or distribute this software for any
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 * purpose with or without fee is hereby granted, provided that the above
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static const int m2ThreshExt_off = 127;
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static void ar5008_rf_bank_setup(u32 *bank, struct ar5416IniArray *array,
 
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                                 int col)
 
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{
 
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        int i;
 
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        for (i = 0; i < array->ia_rows; i++)
 
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                bank[i] = INI_RA(array, i, col);
 
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}
 
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#define REG_WRITE_RF_ARRAY(iniarray, regData, regWr) \
 
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        ar5008_write_rf_array(ah, iniarray, regData, &(regWr))
 
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static void ar5008_write_rf_array(struct ath_hw *ah, struct ar5416IniArray *array,
 
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                                  u32 *data, unsigned int *writecnt)
 
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{
 
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        int r;
 
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        ENABLE_REGWRITE_BUFFER(ah);
 
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        for (r = 0; r < array->ia_rows; r++) {
 
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                REG_WRITE(ah, INI_RA(array, r, 0), data[r]);
 
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                DO_DELAY(*writecnt);
 
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        }
 
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        REGWRITE_BUFFER_FLUSH(ah);
 
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}
 
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/**
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 * ar5008_hw_phy_modify_rx_buffer() - perform analog swizzling of parameters
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 * @rfbuf:
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/**
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 * ar5008_hw_set_channel - tune to a channel on the external AR2133/AR5133 radios
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 * @ah: atheros hardware stucture
 
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 * @ah: atheros hardware structure
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 * @chan:
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 *
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 * For the external AR2133/AR5133 radios, takes the MHz channel value and set
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        eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV);
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        /* Setup Bank 0 Write */
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        RF_BANK_SETUP(ah->analogBank0Data, &ah->iniBank0, 1);
 
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        ar5008_rf_bank_setup(ah->analogBank0Data, &ah->iniBank0, 1);
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        /* Setup Bank 1 Write */
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        RF_BANK_SETUP(ah->analogBank1Data, &ah->iniBank1, 1);
 
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        ar5008_rf_bank_setup(ah->analogBank1Data, &ah->iniBank1, 1);
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        /* Setup Bank 2 Write */
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        RF_BANK_SETUP(ah->analogBank2Data, &ah->iniBank2, 1);
 
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        ar5008_rf_bank_setup(ah->analogBank2Data, &ah->iniBank2, 1);
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        /* Setup Bank 6 Write */
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        RF_BANK_SETUP(ah->analogBank3Data, &ah->iniBank3,
 
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        ar5008_rf_bank_setup(ah->analogBank3Data, &ah->iniBank3,
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                      modesIndex);
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        {
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                int i;
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        }
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        /* Setup Bank 7 Setup */
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        RF_BANK_SETUP(ah->analogBank7Data, &ah->iniBank7, 1);
 
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        ar5008_rf_bank_setup(ah->analogBank7Data, &ah->iniBank7, 1);
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        /* Write Analog registers */
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        REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data,
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                                 struct ath9k_channel *chan)
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{
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        struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
 
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        struct ath_common *common = ath9k_hw_common(ah);
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        int i, regWrites = 0;
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        struct ieee80211_channel *channel = chan->chan;
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        u32 modesIndex, freqIndex;
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                REG_WRITE(ah, reg, val);
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                if (reg >= 0x7800 && reg < 0x78a0
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                    && ah->config.analog_shiftreg) {
 
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                    && ah->config.analog_shiftreg
 
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                    && (common->bus_ops->ath_bus_type != ATH_USB)) {
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                        udelay(100);
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                }
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                REG_WRITE(ah, reg, val);
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                if (reg >= 0x7800 && reg < 0x78a0
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                    && ah->config.analog_shiftreg) {
 
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                    && ah->config.analog_shiftreg
 
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                    && (common->bus_ops->ath_bus_type != ATH_USB)) {
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                        udelay(100);
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                }
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