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// =============================================================================
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// Scilab ( http://www.scilab.org/ ) - This file is part of Scilab
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// Copyright (C) 2012 - DIGITEO - Alexandre HERISSE
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// This file is distributed under the same license as the Scilab package.
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// =============================================================================
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// <-- TEST WITH XCOS -->
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// <-- Non-regression test for bug 10781 -->
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// <-- Bugzilla URL -->
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// http://bugzilla.scilab.org/show_bug.cgi?id=10781
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// <-- Short Description -->
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// DFlipflop should not report problem in port size or type
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assert_checktrue(importXcosDiagram(SCI + "/modules/xcos/tests/nonreg_tests/bug_10781.xcos"));
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// compile and simulate
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xcos_simulate(scs_m, 4);
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lastQ=double(Q.values($));
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lastnonQ=double(nonQ.values($));
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assert_checkequal(lastQ, 1);
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assert_checkequal(lastnonQ, 0);