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Viewing changes to include/hw/ppc/spapr.h

  • Committer: Phil Dennis-Jordan
  • Date: 2017-07-21 08:03:43 UTC
  • mfrom: (1.1.1)
  • Revision ID: phil@philjordan.eu-20170721080343-2yr2vdj7713czahv
New upstream release 2.9.0.

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Lines of Context:
include/hw/ppc/spapr.h
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#define SPAPR_TIMEBASE_FREQ     512000000ULL
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typedef struct sPAPRMachineClass sPAPRMachineClass;
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typedef struct sPAPRMachineState sPAPRMachineState;
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#define TYPE_SPAPR_MACHINE      "spapr-machine"
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#define SPAPR_MACHINE(obj) \
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    struct VIOsPAPRBus *vio_bus;
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    QLIST_HEAD(, sPAPRPHBState) phbs;
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    struct sPAPRNVRAM *nvram;
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    XICSState *xics;
 
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    ICSState *ics;
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    DeviceState *rtc;
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    void *htab;
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    uint32_t htab_shift;
 
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    uint64_t patb_entry; /* Process tbl registed in H_REGISTER_PROCESS_TABLE */
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    hwaddr rma_size;
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    int vrma_adjust;
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    ssize_t rtas_size;
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    /*< public >*/
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    char *kvm_type;
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    MemoryHotplugState hotplug_memory;
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    Object **cores;
 
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    uint32_t nr_servers;
 
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    ICPState *icps;
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};
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#define H_SUCCESS         0
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#define H_XIRR_X                0x2FC
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#define H_RANDOM                0x300
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#define H_SET_MODE              0x31C
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#define MAX_HCALL_OPCODE        H_SET_MODE
 
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#define H_SIGNAL_SYS_RESET      0x380
 
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#define MAX_HCALL_OPCODE        H_SIGNAL_SYS_RESET
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/* The hcalls above are standardized in PAPR and implemented by pHyp
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 * as well.
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void spapr_dt_events(sPAPRMachineState *sm, void *fdt);
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int spapr_h_cas_compose_response(sPAPRMachineState *sm,
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                                 target_ulong addr, target_ulong size,
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                                 bool cpu_update,
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                                 sPAPROptionVector *ov5_updates);
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sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn);
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void spapr_tce_table_enable(sPAPRTCETable *tcet,
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                                            uint32_t count, uint32_t index);
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void spapr_hotplug_req_remove_by_count_indexed(sPAPRDRConnectorType drc_type,
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                                               uint32_t count, uint32_t index);
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void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp);
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void *spapr_populate_hotplug_cpu_dt(CPUState *cs, int *fdt_offset,
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                                    sPAPRMachineState *spapr);
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#define SPAPR_LMB_FLAGS_DRC_INVALID 0x00000020
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#define SPAPR_LMB_FLAGS_RESERVED 0x00000080
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void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg);
 
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#endif /* HW_SPAPR_H */