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/******************************************************************************
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* Copyright (c) 2004, 2011 IBM Corporation
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* This program and the accompanying materials
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* are made available under the terms of the BSD License
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* which accompanies this distribution, and is available at
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* http://www.opensource.org/licenses/bsd-license.php
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* IBM Corporation - initial implementation
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*****************************************************************************/
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/* SLOF for QEMU -- boot code.
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* __start loaded at 0x100
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* CPU 0 starts at 0 with GPR3 pointing to the flat devtree
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* All other CPUs are held in stopped state by qemu and are
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.long relTag - __start
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/* Some exception vectors
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* FIXME: Also need 0280, 0380, 0f20, etc.
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.irp i, 0x0100,0x0180,0x0200,0x0280,0x0300,0x0380,0x0400,0x0500, \
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0x0600,0x0700,0x0800,0x0900,0x0a00,0x0b00,0x0c00,0x0d00, \
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0x0e00,0x0f00,0x1000,0x1100,0x1200,0x1300,0x1400,0x1500, \
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0x1800,0x1900,0x1a00,0x1b00,0x1c00,0x1d00,0x1e00,0x1f00, \
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0x2000,0x2100,0x2200,0x2300,0x2400,0x2500,0x2600,0x2700, \
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0x2800,0x2900,0x2a00,0x2b00,0x2c00,0x2d00,0x2e00
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/* enable this if you get exceptions before the console works */
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/* this will allow using the hardware debugger to see where */
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/* it traps, and with what register values etc. */
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. = XVECT_M_HANDLER - 0x100
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/* Here's the startup code for the master CPU */
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/* Save device-tree pointer */
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/* Switch to 64-bit mode with 64-bit exceptions */
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#define MSR_SF_LG 63 /* Enable 64 bit mode */
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#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */
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#define __MASK(X) (1<<(X))
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#define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */
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#define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode */
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mfmsr r11 /* grab the current MSR */
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li r12,(MSR_SF | MSR_ISF)@highest
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/* write a character to the HV console */
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putc: sldi r6,r3,(24+32)
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C_ENTRY(proceedInterrupt)
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ld r3,exception_stack_frame@got(r2)
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.irp i, 2,3,4,5,6,7,8,9,10,11,12,13,14,15,16, \
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17, 18, 19, 20, 21, 22, 23, 24, 25, 26, \
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ld r\i, 0x30+\i*8 (r1)
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ld 0,XVECT_M_HANDLER(0)
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ld r0,0x30(r1); # restore vector number
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mtctr r1 # save old stack pointer
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.irp i, 2,3,4,5,6,7,8,9,10,11,12,13,14,15,16, \
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17, 18, 19, 20, 21, 22, 23, 24, 25, 26, \
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std r\i, 0x30+\i*8 (r1)
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std r0,0x30(r1); # save vector number
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std r14,0x38(r1); # save old r1
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ld r3,exception_stack_frame@got(r2)
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.irp i, 2,3,4,5,6,7,8,9,10,11,12,13,14,15,16, \
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17, 18, 19, 20, 21, 22, 23, 24, 25, 26, \
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ld r\i, 0x30+\i*8 (r1)
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/* Set exception handler for given exception vector.
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r3: exception vector offset
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r4: exception handler
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.globl .set_exception
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.globl .set_exception_asm
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.globl set_exception_asm
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std r4, 0x60(r3) # fixme diff 1f - 0b