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  • Committer: Phil Dennis-Jordan
  • Date: 2017-07-21 08:03:43 UTC
  • mfrom: (1.1.1)
  • Revision ID: phil@philjordan.eu-20170721080343-2yr2vdj7713czahv
New upstream release 2.9.0.

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/*
 
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 * Maintainer : Prafulla Wadaskar <prafulla@marvell.com>
 
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 *
 
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 * (C) Copyright 2009
 
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 * Marvell Semiconductor <www.marvell.com>
 
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 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
 
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 *
 
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 * SPDX-License-Identifier:     GPL-2.0+
 
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 */
 
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#include <common.h>
 
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#include <netdev.h>
 
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#include <asm/arch/cpu.h>
 
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#include <asm/arch/kirkwood.h>
 
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#include <asm/arch/mpp.h>
 
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#include "mv88f6281gtw_ge.h"
 
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DECLARE_GLOBAL_DATA_PTR;
 
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int board_early_init_f(void)
 
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{
 
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        /*
 
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         * default gpio configuration
 
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         * There are maximum 64 gpios controlled through 2 sets of registers
 
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         * the  below configuration configures mainly initial LED status
 
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         */
 
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        kw_config_gpio(MV88F6281GTW_GE_OE_VAL_LOW,
 
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                        MV88F6281GTW_GE_OE_VAL_HIGH,
 
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                        MV88F6281GTW_GE_OE_LOW, MV88F6281GTW_GE_OE_HIGH);
 
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        /* Multi-Purpose Pins Functionality configuration */
 
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        static const u32 kwmpp_config[] = {
 
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                MPP0_SPI_SCn,
 
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                MPP1_SPI_MOSI,
 
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                MPP2_SPI_SCK,
 
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                MPP3_SPI_MISO,
 
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                MPP4_GPIO,
 
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                MPP5_GPO,
 
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                MPP6_SYSRST_OUTn,
 
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                MPP7_SPI_SCn,
 
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                MPP8_TW_SDA,
 
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                MPP9_TW_SCK,
 
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                MPP10_UART0_TXD,
 
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                MPP11_UART0_RXD,
 
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                MPP12_GPO,
 
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                MPP13_GPIO,
 
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                MPP14_GPIO,
 
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                MPP15_GPIO,
 
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                MPP16_GPIO,
 
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                MPP17_GPIO,
 
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                MPP18_GPO,
 
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                MPP19_GPO,
 
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                MPP20_GPIO,
 
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                MPP21_GPIO,
 
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                MPP22_GPIO,
 
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                MPP23_GPIO,
 
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                MPP24_GPIO,
 
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                MPP25_GPIO,
 
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                MPP26_GPIO,
 
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                MPP27_GPIO,
 
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                MPP28_GPIO,
 
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                MPP29_GPIO,
 
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                MPP30_GPIO,
 
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                MPP31_GPIO,
 
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                MPP32_GPIO,
 
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                MPP33_GPIO,
 
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                MPP34_GPIO,
 
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                MPP35_GPIO,
 
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                MPP36_GPIO,
 
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                MPP37_GPIO,
 
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                MPP38_GPIO,
 
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                MPP39_GPIO,
 
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                MPP40_GPIO,
 
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                MPP41_GPIO,
 
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                MPP42_GPIO,
 
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                MPP43_GPIO,
 
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                MPP44_GPIO,
 
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                MPP45_GPIO,
 
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                MPP46_GPIO,
 
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                MPP47_GPIO,
 
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                MPP48_GPIO,
 
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                MPP49_GPIO,
 
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                0
 
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        };
 
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        kirkwood_mpp_conf(kwmpp_config, NULL);
 
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        return 0;
 
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}
 
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int board_init(void)
 
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{
 
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        /*
 
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         * arch number of board
 
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         */
 
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        gd->bd->bi_arch_number = MACH_TYPE_MV88F6281GTW_GE;
 
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        /* adress of boot parameters */
 
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        gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
 
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        return 0;
 
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}
 
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#ifdef CONFIG_MV88E61XX_SWITCH
 
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void reset_phy(void)
 
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{
 
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        /* configure and initialize switch */
 
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        struct mv88e61xx_config swcfg = {
 
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                .name = "egiga0",
 
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                .vlancfg = MV88E61XX_VLANCFG_ROUTER,
 
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                .rgmii_delay = MV88E61XX_RGMII_DELAY_EN,
 
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                .led_init = MV88E61XX_LED_INIT_EN,
 
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                .mdip = MV88E61XX_MDIP_REVERSE,
 
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                .portstate = MV88E61XX_PORTSTT_FORWARDING,
 
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                .cpuport = (1 << 5),
 
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                .ports_enabled = 0x3f
 
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        };
 
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        mv88e61xx_switch_initialize(&swcfg);
 
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}
 
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#endif /* CONFIG_MV88E61XX_SWITCH */