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* Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
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* SPDX-License-Identifier: GPL-2.0+
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* Note: RAMTRON SPI FRAMs are ferroelectric, nonvolatile RAMs
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* with an interface identical to SPI flash devices.
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* However since they behave like RAM there are no delays or
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* busy polls required. They can sustain read or write at the
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* allowed SPI bus speed, which can be 40 MHz for some devices.
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* Unfortunately some RAMTRON devices do not have a means of
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* identifying them. They will leave the SO line undriven when
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* the READ-ID command is issued. It is therefore mandatory
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* that the MISO line has a proper pull-up, so that READ-ID
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* will return a row of 0xff. This 0xff pseudo-id will cause
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* probes by all vendor specific functions that are designed
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* to handle it. If the MISO line is not pulled up, READ-ID
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* could return any random noise, even mimicking another
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* We use CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
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* to define which device will be assumed after a simple status
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* register verify. This method is prone to false positive
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* detection and should therefore be the last to be tried.
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* Enter it in the last position in the table in spi_flash.c!
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* The define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC both activates
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* compilation of the special handler and defines the device
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#include <spi_flash.h>
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#include "sf_internal.h"
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* Properties of supported FRAMs
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* Note: speed is currently not used because we have no method to deliver that
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* value to the upper layers
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struct ramtron_spi_fram_params {
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u32 size; /* size in bytes */
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u8 addr_len; /* number of address bytes */
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u8 merge_cmd; /* some address bits are in the command byte */
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u8 id1; /* device ID 1 (family, density) */
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u8 id2; /* device ID 2 (sub, rev, rsvd) */
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u32 speed; /* max. SPI clock in Hz */
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const char *name; /* name for display and/or matching */
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struct ramtron_spi_fram {
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struct spi_flash flash;
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const struct ramtron_spi_fram_params *params;
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static inline struct ramtron_spi_fram *to_ramtron_spi_fram(struct spi_flash
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return container_of(flash, struct ramtron_spi_fram, flash);
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* table describing supported FRAM chips:
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* chips without RDID command must have the values 0xff for id1 and id2
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static const struct ramtron_spi_fram_params ramtron_spi_fram_table[] = {
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#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
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static int ramtron_common(struct spi_flash *flash,
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u32 offset, size_t len, void *buf, u8 command)
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struct ramtron_spi_fram *sn = to_ramtron_spi_fram(flash);
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if (sn->params->addr_len == 3 && sn->params->merge_cmd == 0) {
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cmd[1] = offset >> 16;
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cmd[2] = offset >> 8;
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} else if (sn->params->addr_len == 2 && sn->params->merge_cmd == 0) {
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cmd[1] = offset >> 8;
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printf("SF: unsupported addr_len or merge_cmd\n");
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ret = spi_claim_bus(flash->spi);
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debug("SF: Unable to claim SPI bus\n");
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if (command == CMD_PAGE_PROGRAM) {
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ret = spi_flash_cmd_write_enable(flash);
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debug("SF: Enabling Write failed\n");
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/* do the transaction */
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if (command == CMD_PAGE_PROGRAM)
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ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, buf, len);
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ret = spi_flash_cmd_read(flash->spi, cmd, cmd_len, buf, len);
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debug("SF: Transaction failed\n");
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/* release the bus */
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spi_release_bus(flash->spi);
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static int ramtron_read(struct spi_flash *flash,
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u32 offset, size_t len, void *buf)
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return ramtron_common(flash, offset, len, buf,
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CMD_READ_ARRAY_SLOW);
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static int ramtron_write(struct spi_flash *flash,
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u32 offset, size_t len, const void *buf)
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return ramtron_common(flash, offset, len, (void *)buf,
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static int ramtron_erase(struct spi_flash *flash, u32 offset, size_t len)
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debug("SF: Erase of RAMTRON FRAMs is pointless\n");
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* nore: we are called here with idcode pointing to the first non-0x7f byte
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static struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi,
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const struct ramtron_spi_fram_params *params;
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struct ramtron_spi_fram *sn;
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#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
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/* NOTE: the bus has been claimed before this function is called! */
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/* JEDEC conformant RAMTRON id */
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for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) {
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params = &ramtron_spi_fram_table[i];
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if (idcode[1] == params->id1 &&
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idcode[2] == params->id2)
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#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
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* probably open MISO line, pulled up.
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* We COULD have a non JEDEC conformant FRAM here,
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* read the status register to verify
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ret = spi_flash_cmd(spi, CMD_READ_STATUS, &sr, 1);
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/* Bits 5,4,0 are fixed 0 for all devices */
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if ((sr & 0x31) != 0x00)
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/* now find the device */
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for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) {
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params = &ramtron_spi_fram_table[i];
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if (!strcmp(params->name,
257
CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC))
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debug("SF: Unsupported non-JEDEC RAMTRON device "
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CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "\n");
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/* arriving here means no method has found a device we can handle */
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debug("SF/ramtron: unsupported device id0=%02x id1=%02x id2=%02x\n",
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idcode[0], idcode[1], idcode[2]);
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sn = malloc(sizeof(*sn));
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debug("SF: Failed to allocate memory\n");
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sn->flash.write = ramtron_write;
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sn->flash.read = ramtron_read;
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sn->flash.erase = ramtron_erase;
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sn->flash.size = params->size;
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* The following table holds all device probe functions
292
* (All flashes are removed and implemented a common probe at
295
* shift: number of continuation bytes before the ID
296
* idcode: the expected IDCODE or 0xff for non JEDEC devices
297
* probe: the function to call
299
* Non JEDEC devices should be ordered in the table such that
300
* the probe functions with best detection algorithms come first.
302
* Several matching entries are permitted, they will be tried
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* in sequence until a probe function returns non NULL.
305
* IDCODE_CONT_LEN may be redefined if a device needs to declare a
306
* larger "shift" value. IDCODE_PART_LEN generally shouldn't be
307
* changed. This is the max number of bytes probe functions may
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* examine when looking up part-specific identification info.
310
* Probe functions will be given the idcode buffer starting at their
311
* manu id byte (the "idcode" in the table below). In other words,
312
* all of the continuation bytes will be skipped (the "shift" below).
314
#define IDCODE_CONT_LEN 0
315
#define IDCODE_PART_LEN 5
316
static const struct {
319
struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
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/* Keep it sorted by define name */
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#ifdef CONFIG_SPI_FRAM_RAMTRON
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{ 6, 0xc2, spi_fram_probe_ramtron, },
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# undef IDCODE_CONT_LEN
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# define IDCODE_CONT_LEN 6
327
#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
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{ 0, 0xff, spi_fram_probe_ramtron, },
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#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
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struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int spi_mode)
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struct spi_slave *spi;
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struct spi_flash *flash = NULL;
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u8 idcode[IDCODE_LEN], *idp;
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spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
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printf("SF: Failed to set up slave\n");
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ret = spi_claim_bus(spi);
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debug("SF: Failed to claim SPI bus: %d\n", ret);
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/* Read the ID codes */
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ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
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printf("SF: Got idcodes\n");
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print_buffer(0, idcode, 1, sizeof(idcode), 0);
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/* count the number of continuation bytes */
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for (shift = 0, idp = idcode;
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shift < IDCODE_CONT_LEN && *idp == 0x7f;
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/* search the table for matches in shift and id */
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for (i = 0; i < ARRAY_SIZE(flashes); ++i)
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if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
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/* we have a match, call probe */
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flash = flashes[i].probe(spi, idp);
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printf("SF: Unsupported manufacturer %02x\n", *idp);
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goto err_manufacturer_probe;
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printf("SF: Detected %s with total size ", flash->name);
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print_size(flash->size, "");
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spi_release_bus(spi);
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err_manufacturer_probe:
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spi_release_bus(spi);
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void spi_flash_free(struct spi_flash *flash)
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spi_free_slave(flash->spi);