6
/*----------------------------------------------------------------------------+
7
| 405GP PCI core memory map defines.
8
+----------------------------------------------------------------------------*/
9
#define MIN_PCI_MEMADDR1 0x80000000
10
#define MIN_PCI_MEMADDR2 0x00000000
11
#define MIN_PLB_PCI_IOADDR 0xE8000000 /* PLB side of PCI I/O address space */
12
#define MIN_PCI_PCI_IOADDR 0x00000000 /* PCI side of PCI I/O address space */
13
#define MAX_PCI_DEVICES 32
15
/*----------------------------------------------------------------------------+
16
| Defines for the 405GP PCI Config address and data registers followed by
17
| defines for the standard PCI device configuration header.
18
+----------------------------------------------------------------------------*/
19
#define PCICFGADR 0xEEC00000
20
#define PCICFGDATA 0xEEC00004
22
#define PCIBUSNUM 0x40 /* 405GP specific parameters */
23
#define PCISUBBUSNUM 0x41
24
#define PCIDISCOUNT 0x42
25
#define PCIBRDGOPT1 0x4A
26
#define PCIBRDGOPT2 0x60
28
/*----------------------------------------------------------------------------+
29
| Defines for 405GP PCI Master local configuration regs.
30
+----------------------------------------------------------------------------*/
31
#define PMM0LA 0xEF400000
32
#define PMM0MA 0xEF400004
33
#define PMM0PCILA 0xEF400008
34
#define PMM0PCIHA 0xEF40000C
35
#define PMM1LA 0xEF400010
36
#define PMM1MA 0xEF400014
37
#define PMM1PCILA 0xEF400018
38
#define PMM1PCIHA 0xEF40001C
39
#define PMM2LA 0xEF400020
40
#define PMM2MA 0xEF400024
41
#define PMM2PCILA 0xEF400028
42
#define PMM2PCIHA 0xEF40002C
44
/*----------------------------------------------------------------------------+
45
| Defines for 405GP PCI Target local configuration regs.
46
+----------------------------------------------------------------------------*/
47
#define PTM1MS 0xEF400030
48
#define PTM1LA 0xEF400034
49
#define PTM2MS 0xEF400038
50
#define PTM2LA 0xEF40003C
52
#define PCIDEVID_405GP 0x0
54
void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev);
55
int pci_arbiter_enabled(void);
56
int __pci_pre_init(struct pci_controller *hose);
57
void __pci_target_init(struct pci_controller *hose);
58
void __pci_master_init(struct pci_controller *hose);