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  • Committer: Phil Dennis-Jordan
  • Date: 2017-07-21 08:03:43 UTC
  • mfrom: (1.1.1)
  • Revision ID: phil@philjordan.eu-20170721080343-2yr2vdj7713czahv
New upstream release 2.9.0.

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roms/u-boot/board/stx/stxssa/law.c
 
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/*
 
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 * Copyright 2008 Freescale Semiconductor, Inc.
 
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 *
 
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 * (C) Copyright 2000
 
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 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 
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 *
 
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 * SPDX-License-Identifier:     GPL-2.0+
 
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 */
 
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#include <common.h>
 
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#include <asm/fsl_law.h>
 
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#include <asm/mmu.h>
 
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/*
 
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 * LAW(Local Access Window) configuration:
 
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 *
 
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 * 0x0000_0000     0x7fff_ffff     DDR                     2G
 
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 * 0x8000_0000     0x9fff_ffff     PCI1 MEM                512M
 
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 * 0xa000_0000     0xbfff_ffff     PCI2 MEM                512M
 
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 * 0xe000_0000     0xe000_ffff     CCSR                    1M
 
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 * 0xe200_0000     0xe2ff_ffff     PCI1 IO                 16M
 
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 * 0xe300_0000     0xe3ff_ffff     PCI2 IO                 16M
 
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 * 0xf000_0000     0xfaff_ffff     Local bus               128M
 
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 * 0xfb00_0000     0xfb00_ffff     Config Latch            64K
 
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 * 0xfc00_0000     0xffff_ffff     FLASH (boot bank)       64M
 
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 *
 
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 * Notes:
 
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 *    CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
 
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 *    If flash is 8M at default position (last 8M), no LAW needed.
 
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 */
 
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struct law_entry law_table[] = {
 
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#ifndef CONFIG_SPD_EEPROM
 
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        SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR),
 
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#endif
 
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        SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
 
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        SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
 
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        SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
 
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        SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2),
 
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        /* Map the whole localbus, including flash and reset latch. */
 
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        SET_LAW(CONFIG_SYS_LBC_OPTION_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
 
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};
 
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int num_law_entries = ARRAY_SIZE(law_table);