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Viewing changes to roms/u-boot/drivers/pci/pci_sh4.c

  • Committer: Phil Dennis-Jordan
  • Date: 2017-07-21 08:03:43 UTC
  • mfrom: (1.1.1)
  • Revision ID: phil@philjordan.eu-20170721080343-2yr2vdj7713czahv
New upstream release 2.9.0.

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roms/u-boot/drivers/pci/pci_sh4.c
 
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/*
 
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 * SH4 PCI Controller (PCIC) for U-Boot.
 
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 * (C) Dustin McIntire (dustin@sensoria.com)
 
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 * (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 
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 * (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
 
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 *
 
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 * u-boot/arch/sh/cpu/sh4/pci-sh4.c
 
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 *
 
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 * SPDX-License-Identifier:     GPL-2.0+
 
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 */
 
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#include <common.h>
 
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#include <asm/processor.h>
 
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#include <asm/io.h>
 
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#include <asm/pci.h>
 
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#include <pci.h>
 
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int pci_sh4_init(struct pci_controller *hose)
 
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{
 
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        hose->first_busno = 0;
 
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        hose->region_count = 0;
 
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        hose->last_busno = 0xff;
 
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        /* PCI memory space */
 
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        pci_set_region(hose->regions + 0,
 
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                CONFIG_PCI_MEM_BUS,
 
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                CONFIG_PCI_MEM_PHYS,
 
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                CONFIG_PCI_MEM_SIZE,
 
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                PCI_REGION_MEM);
 
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        hose->region_count++;
 
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        /* PCI IO space */
 
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        pci_set_region(hose->regions + 1,
 
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                CONFIG_PCI_IO_BUS,
 
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                CONFIG_PCI_IO_PHYS,
 
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                CONFIG_PCI_IO_SIZE,
 
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                PCI_REGION_IO);
 
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        hose->region_count++;
 
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#if defined(CONFIG_PCI_SYS_BUS)
 
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        /* PCI System Memory space */
 
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        pci_set_region(hose->regions + 2,
 
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                CONFIG_PCI_SYS_BUS,
 
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                CONFIG_PCI_SYS_PHYS,
 
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                CONFIG_PCI_SYS_SIZE,
 
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                PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
 
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        hose->region_count++;
 
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#endif
 
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        udelay(1000);
 
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        pci_set_ops(hose,
 
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                    pci_hose_read_config_byte_via_dword,
 
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                    pci_hose_read_config_word_via_dword,
 
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                    pci_sh4_read_config_dword,
 
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                    pci_hose_write_config_byte_via_dword,
 
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                    pci_hose_write_config_word_via_dword,
 
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                    pci_sh4_write_config_dword);
 
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        pci_register_hose(hose);
 
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        udelay(1000);
 
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#ifdef CONFIG_PCI_SCAN_SHOW
 
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        printf("PCI:   Bus Dev VenId DevId Class Int\n");
 
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#endif
 
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        hose->last_busno = pci_hose_scan(hose);
 
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        return 0;
 
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}
 
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int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
 
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{
 
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        return 0;
 
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}
 
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#ifdef CONFIG_PCI_SCAN_SHOW
 
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int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
 
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{
 
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        return 1;
 
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}
 
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#endif /* CONFIG_PCI_SCAN_SHOW */