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* SuperH SCIF device driver.
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* Copyright (C) 2013 Renesas Electronics Corporation
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* Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu
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* Copyright (C) 2002 - 2008 Paul Mundt
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* SPDX-License-Identifier: GPL-2.0+
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#include <asm/processor.h>
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#include "serial_sh.h"
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#include <linux/compiler.h>
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#if defined(CONFIG_CONS_SCIF0)
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# define SCIF_BASE SCIF0_BASE
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#elif defined(CONFIG_CONS_SCIF1)
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# define SCIF_BASE SCIF1_BASE
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#elif defined(CONFIG_CONS_SCIF2)
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# define SCIF_BASE SCIF2_BASE
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#elif defined(CONFIG_CONS_SCIF3)
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# define SCIF_BASE SCIF3_BASE
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#elif defined(CONFIG_CONS_SCIF4)
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# define SCIF_BASE SCIF4_BASE
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#elif defined(CONFIG_CONS_SCIF5)
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# define SCIF_BASE SCIF5_BASE
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#elif defined(CONFIG_CONS_SCIF6)
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# define SCIF_BASE SCIF6_BASE
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#elif defined(CONFIG_CONS_SCIF7)
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# define SCIF_BASE SCIF7_BASE
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# error "Default SCIF doesn't set....."
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#if defined(CONFIG_SCIF_A)
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#define SCIF_BASE_PORT PORT_SCIFA
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#define SCIF_BASE_PORT PORT_SCIF
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static struct uart_port sh_sci = {
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.membase = (unsigned char*)SCIF_BASE,
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.type = SCIF_BASE_PORT,
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static void sh_serial_setbrg(void)
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DECLARE_GLOBAL_DATA_PTR;
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sci_out(&sh_sci, SCBRR,
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SCBRR_VALUE(gd->baudrate, CONFIG_SH_SCIF_CLK_FREQ));
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static int sh_serial_init(void)
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sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci));
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sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci));
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sci_out(&sh_sci, SCSMR, 0);
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sci_out(&sh_sci, SCSMR, 0);
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sci_out(&sh_sci, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
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sci_in(&sh_sci, SCFCR);
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sci_out(&sh_sci, SCFCR, 0);
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#if defined(CONFIG_CPU_SH7760) || \
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defined(CONFIG_CPU_SH7780) || \
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defined(CONFIG_CPU_SH7785) || \
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defined(CONFIG_CPU_SH7786)
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static int scif_rxfill(struct uart_port *port)
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return sci_in(port, SCRFDR) & 0xff;
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#elif defined(CONFIG_CPU_SH7763)
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static int scif_rxfill(struct uart_port *port)
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if ((port->mapbase == 0xffe00000) ||
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(port->mapbase == 0xffe08000)) {
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return sci_in(port, SCRFDR) & 0xff;
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return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
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#elif defined(CONFIG_ARCH_SH7372)
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static int scif_rxfill(struct uart_port *port)
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if (port->type == PORT_SCIFA)
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return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
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return sci_in(port, SCRFDR);
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static int scif_rxfill(struct uart_port *port)
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return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
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static int serial_rx_fifo_level(void)
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return scif_rxfill(&sh_sci);
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static void handle_error(void)
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sci_in(&sh_sci, SCxSR);
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sci_out(&sh_sci, SCxSR, SCxSR_ERROR_CLEAR(&sh_sci));
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sci_in(&sh_sci, SCLSR);
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sci_out(&sh_sci, SCLSR, 0x00);
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void serial_raw_putc(const char c)
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/* Tx fifo is empty */
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if (sci_in(&sh_sci, SCxSR) & SCxSR_TEND(&sh_sci))
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sci_out(&sh_sci, SCxTDR, c);
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sci_out(&sh_sci, SCxSR, sci_in(&sh_sci, SCxSR) & ~SCxSR_TEND(&sh_sci));
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static void sh_serial_putc(const char c)
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serial_raw_putc('\r');
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static int sh_serial_tstc(void)
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if (sci_in(&sh_sci, SCxSR) & SCIF_ERRORS) {
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return serial_rx_fifo_level() ? 1 : 0;
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int serial_getc_check(void)
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unsigned short status;
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status = sci_in(&sh_sci, SCxSR);
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if (status & SCIF_ERRORS)
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if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci))
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return status & (SCIF_DR | SCxSR_RDxF(&sh_sci));
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static int sh_serial_getc(void)
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unsigned short status;
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while (!serial_getc_check())
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ch = sci_in(&sh_sci, SCxRDR);
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status = sci_in(&sh_sci, SCxSR);
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sci_out(&sh_sci, SCxSR, SCxSR_RDxF_CLEAR(&sh_sci));
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if (status & SCIF_ERRORS)
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if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci))
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static struct serial_device sh_serial_drv = {
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.start = sh_serial_init,
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.setbrg = sh_serial_setbrg,
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.putc = sh_serial_putc,
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.puts = default_serial_puts,
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.getc = sh_serial_getc,
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.tstc = sh_serial_tstc,
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void sh_serial_initialize(void)
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serial_register(&sh_serial_drv);
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__weak struct serial_device *default_serial_console(void)
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return &sh_serial_drv;