2
* Copyright (C) 2006 Atmel Corporation
4
* SPDX-License-Identifier: GPL-2.0+
10
#include <asm/arch/clk.h>
11
#include <asm/arch/gpio.h>
12
#include <asm/arch/hmatrix.h>
13
#include <asm/arch/mmu.h>
14
#include <asm/arch/portmux.h>
17
DECLARE_GLOBAL_DATA_PTR;
19
struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
21
.virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
22
.nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
23
.phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
26
.virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
27
.nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
28
.phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
29
| MMU_VMR_CACHE_WRBACK,
33
static const struct sdram_config sdram_config = {
34
.data_bits = SDRAM_DATA_16BIT,
46
.refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
49
int board_early_init_f(void)
51
/* Enable SDRAM in the EBI mux */
52
hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
54
portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH);
55
portmux_enable_usart1(PORTMUX_DRIVE_MIN);
57
#if defined(CONFIG_MACB)
58
portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
59
portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
61
#if defined(CONFIG_MMC)
62
portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
64
#if defined(CONFIG_ATMEL_SPI)
65
portmux_enable_spi0(1 << 0, PORTMUX_DRIVE_LOW);
71
phys_size_t initdram(int board_type)
73
unsigned long expected_size;
74
unsigned long actual_size;
77
sdram_base = uncached(EBI_SDRAM_BASE);
79
expected_size = sdram_init(sdram_base, &sdram_config);
80
actual_size = get_ram_size(sdram_base, expected_size);
82
if (expected_size != actual_size)
83
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
84
actual_size >> 20, expected_size >> 20);
89
int board_early_init_r(void)
91
gd->bd->bi_phy_id[0] = 0x01;
92
gd->bd->bi_phy_id[1] = 0x03;
97
int board_eth_init(bd_t *bi)
99
macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
100
macb_eth_initialize(1, (void *)ATMEL_BASE_MACB1, bi->bi_phy_id[1]);
105
/* SPI chip select control */
106
#ifdef CONFIG_ATMEL_SPI
109
#define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA(3)
111
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
113
return bus == 0 && cs == 0;
116
void spi_cs_activate(struct spi_slave *slave)
118
gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
121
void spi_cs_deactivate(struct spi_slave *slave)
123
gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
125
#endif /* CONFIG_ATMEL_SPI */