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Viewing changes to roms/u-boot/arch/arm/cpu/armv7/tegra20/pwm.c

  • Committer: Phil Dennis-Jordan
  • Date: 2017-07-21 08:03:43 UTC
  • mfrom: (1.1.1)
  • Revision ID: phil@philjordan.eu-20170721080343-2yr2vdj7713czahv
New upstream release 2.9.0.

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roms/u-boot/arch/arm/cpu/armv7/tegra20/pwm.c
 
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/*
 
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 * Tegra2 pulse width frequency modulator definitions
 
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 *
 
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 * Copyright (c) 2011 The Chromium OS Authors.
 
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 *
 
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 * SPDX-License-Identifier:     GPL-2.0+
 
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 */
 
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#include <common.h>
 
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#include <fdtdec.h>
 
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#include <asm/io.h>
 
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#include <asm/arch/clock.h>
 
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#include <asm/arch/pwm.h>
 
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struct pwm_info {
 
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        struct pwm_ctlr *pwm;           /* Registers for our pwm controller */
 
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        int pwm_node;                   /* PWM device tree node */
 
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} local;
 
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void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider)
 
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{
 
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        u32 reg;
 
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        assert(channel < PWM_NUM_CHANNELS);
 
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        /* TODO: Can we use clock_adjust_periph_pll_div() here? */
 
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        clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ, rate);
 
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        reg = PWM_ENABLE_MASK;
 
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        reg |= pulse_width << PWM_WIDTH_SHIFT;
 
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        reg |= freq_divider << PWM_DIVIDER_SHIFT;
 
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        writel(reg, &local.pwm[channel].control);
 
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        debug("%s: channel=%d, rate=%d\n", __func__, channel, rate);
 
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}
 
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int pwm_request(const void *blob, int node, const char *prop_name)
 
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{
 
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        int pwm_node;
 
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        u32 data[3];
 
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        if (fdtdec_get_int_array(blob, node, prop_name, data,
 
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                        ARRAY_SIZE(data))) {
 
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                debug("%s: Cannot decode PWM property '%s'\n", __func__,
 
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                      prop_name);
 
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                return -1;
 
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        }
 
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        pwm_node = fdt_node_offset_by_phandle(blob, data[0]);
 
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        if (pwm_node != local.pwm_node) {
 
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                debug("%s: PWM property '%s' phandle %d not recognised"
 
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                      "- expecting %d\n", __func__, prop_name, data[0],
 
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                      local.pwm_node);
 
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                return -1;
 
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        }
 
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        if (data[1] >= PWM_NUM_CHANNELS) {
 
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                debug("%s: PWM property '%s': invalid channel %u\n", __func__,
 
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                      prop_name, data[1]);
 
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                return -1;
 
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        }
 
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        /*
 
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         * TODO: We could maintain a list of requests, but it might not be
 
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         * worth it for U-Boot.
 
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         */
 
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        return data[1];
 
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}
 
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int pwm_init(const void *blob)
 
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{
 
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        local.pwm_node = fdtdec_next_compatible(blob, 0,
 
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                                                COMPAT_NVIDIA_TEGRA20_PWM);
 
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        if (local.pwm_node < 0) {
 
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                debug("%s: Cannot find device tree node\n", __func__);
 
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                return -1;
 
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        }
 
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        local.pwm = (struct pwm_ctlr *)fdtdec_get_addr(blob, local.pwm_node,
 
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                                                       "reg");
 
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        if (local.pwm == (struct pwm_ctlr *)FDT_ADDR_T_NONE) {
 
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                debug("%s: Cannot find pwm reg address\n", __func__);
 
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                return -1;
 
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        }
 
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        debug("Tegra PWM at %p, node %d\n", local.pwm, local.pwm_node);
 
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        return 0;
 
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}