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// Support for MC146818 Real Time Clock chip.
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// Copyright (C) 2008-2013 Kevin O'Connor <kevin@koconnor.net>
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// Copyright (C) 2002 MandrakeSoft S.A.
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// This file may be distributed under the terms of the GNU LGPLv3 license.
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#include "biosvar.h" // GET_LOW
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#include "rtc.h" // rtc_read
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#include "stacks.h" // yield
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#include "util.h" // timer_calc
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#include "x86.h" // inb
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index |= NMI_DISABLE_BIT;
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outb(index, PORT_CMOS_INDEX);
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return inb(PORT_CMOS_DATA);
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rtc_write(u8 index, u8 val)
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index |= NMI_DISABLE_BIT;
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outb(index, PORT_CMOS_INDEX);
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outb(val, PORT_CMOS_DATA);
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rtc_mask(u8 index, u8 off, u8 on)
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index |= NMI_DISABLE_BIT;
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outb(index, PORT_CMOS_INDEX);
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u8 val = inb(PORT_CMOS_DATA);
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outb((val & ~off) | on, PORT_CMOS_DATA);
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// This function checks to see if the update-in-progress bit
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// is set in CMOS Status Register A. If not, it returns 0.
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// If it is set, it tries to wait until there is a transition
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// to 0, and will return 0 if such a transition occurs. A -1
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// is returned only after timing out. The maximum period
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// that this bit should be set is constrained to (1984+244)
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// useconds, but we wait for longer just to be sure.
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if ((rtc_read(CMOS_STATUS_A) & RTC_A_UIP) == 0)
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u32 end = timer_calc(15);
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if ((rtc_read(CMOS_STATUS_A) & RTC_A_UIP) == 0)
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// update-in-progress never transitioned to 0
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if (!CONFIG_RTC_TIMER)
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rtc_write(CMOS_STATUS_A, 0x26); // 32,768Khz src, 976.5625us updates
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rtc_mask(CMOS_STATUS_B, ~RTC_B_DSE, RTC_B_24HR);
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rtc_read(CMOS_STATUS_C);
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rtc_read(CMOS_STATUS_D);
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if (!CONFIG_RTC_TIMER)
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int count = GET_LOW(RTCusers);
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SET_LOW(RTCusers, count+1);
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// Turn on the Periodic Interrupt timer
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rtc_mask(CMOS_STATUS_B, 0, RTC_B_PIE);
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if (!CONFIG_RTC_TIMER)
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int count = GET_LOW(RTCusers);
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SET_LOW(RTCusers, count-1);
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// Clear the Periodic Interrupt.
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rtc_mask(CMOS_STATUS_B, RTC_B_PIE, 0);