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  • Committer: Phil Dennis-Jordan
  • Date: 2017-07-21 08:03:43 UTC
  • mfrom: (1.1.1)
  • Revision ID: phil@philjordan.eu-20170721080343-2yr2vdj7713czahv
New upstream release 2.9.0.

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roms/u-boot/board/freescale/corenet_ds/pbi.cfg
 
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#
 
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# Copyright 2012 Freescale Semiconductor, Inc.
 
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#
 
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# SPDX-License-Identifier:      GPL-2.0+
 
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#
 
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# Refer doc/README.pblimage for more details about how-to configure
 
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# and create PBL boot image
 
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#
 
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#PBI commands
 
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#Initialize CPC1 as 1MB SRAM
 
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09010000 00200400
 
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09138000 00000000
 
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091380c0 00000100
 
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09010100 00000000
 
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09010104 fff0000b
 
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09010f00 08000000
 
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09010000 80000000
 
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#Configure LAW for CPC1
 
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09000d00 00000000
 
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09000d04 fff00000
 
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09000d08 81000013
 
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09000010 00000000
 
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09000014 ff000000
 
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09000018 81000000
 
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#Initialize eSPI controller, default configuration is slow for eSPI to
 
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#load data, this configuration comes from u-boot eSPI driver.
 
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09110000 80000403
 
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09110020 2d170008
 
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09110024 00100008
 
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09110028 00100008
 
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0911002c 00100008
 
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#Flush PBL data
 
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09138000 00000000
 
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091380c0 00000000