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* SMSC LAN95xx USB Ethernet driver
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <ipxe/usbnet.h>
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#include <ipxe/if_ether.h>
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/** Register write command */
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#define SMSC95XX_REGISTER_WRITE \
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( USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE | \
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USB_REQUEST_TYPE ( 0xa0 ) )
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/** Register read command */
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#define SMSC95XX_REGISTER_READ \
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( USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE | \
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USB_REQUEST_TYPE ( 0xa1 ) )
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/** Get statistics command */
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#define SMSC95XX_GET_STATISTICS \
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( USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE | \
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USB_REQUEST_TYPE ( 0xa2 ) )
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/** Interrupt status register */
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#define SMSC95XX_INT_STS 0x008
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#define SMSC95XX_INT_STS_RXDF_INT 0x00000800UL /**< RX FIFO overflow */
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#define SMSC95XX_INT_STS_PHY_INT 0x00008000UL /**< PHY interrupt */
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/** Transmit configuration register */
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#define SMSC95XX_TX_CFG 0x010
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#define SMSC95XX_TX_CFG_ON 0x00000004UL /**< TX enable */
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/** Hardware configuration register */
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#define SMSC95XX_HW_CFG 0x014
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#define SMSC95XX_HW_CFG_BIR 0x00001000UL /**< Bulk IN use NAK */
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#define SMSC95XX_HW_CFG_LRST 0x00000008UL /**< Soft lite reset */
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/** LED GPIO configuration register */
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#define SMSC95XX_LED_GPIO_CFG 0x024
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#define SMSC95XX_LED_GPIO_CFG_GPCTL2(x) ( (x) << 24 ) /**< GPIO 2 control */
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#define SMSC95XX_LED_GPIO_CFG_GPCTL2_NSPD_LED \
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SMSC95XX_LED_GPIO_CFG_GPCTL2 ( 1 ) /**< Link speed LED */
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#define SMSC95XX_LED_GPIO_CFG_GPCTL1(x) ( (x) << 20 ) /**< GPIO 1 control */
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#define SMSC95XX_LED_GPIO_CFG_GPCTL1_NLNKA_LED \
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SMSC95XX_LED_GPIO_CFG_GPCTL1 ( 1 ) /**< Activity LED */
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#define SMSC95XX_LED_GPIO_CFG_GPCTL0(x) ( (x) << 16 ) /**< GPIO 0 control */
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#define SMSC95XX_LED_GPIO_CFG_GPCTL0_NFDX_LED \
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SMSC95XX_LED_GPIO_CFG_GPCTL0 ( 1 ) /**< Full-duplex LED */
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/** EEPROM command register */
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#define SMSC95XX_E2P_CMD 0x030
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#define SMSC95XX_E2P_CMD_EPC_BSY 0x80000000UL /**< EPC busy */
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#define SMSC95XX_E2P_CMD_EPC_CMD_READ 0x00000000UL /**< READ command */
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#define SMSC95XX_E2P_CMD_EPC_ADDR(addr) ( (addr) << 0 ) /**< EPC address */
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/** EEPROM data register */
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#define SMSC95XX_E2P_DATA 0x034
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#define SMSC95XX_E2P_DATA_GET(e2p_data) \
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( ( (e2p_data) >> 0 ) & 0xff ) /**< EEPROM data */
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/** MAC address EEPROM address */
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#define SMSC95XX_EEPROM_MAC 0x01
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/** Interrupt endpoint control register */
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#define SMSC95XX_INT_EP_CTL 0x068
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#define SMSC95XX_INT_EP_CTL_RXDF_EN 0x00000800UL /**< RX FIFO overflow */
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#define SMSC95XX_INT_EP_CTL_PHY_EN 0x00008000UL /**< PHY interrupt */
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/** Bulk IN delay register */
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#define SMSC95XX_BULK_IN_DLY 0x06c
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#define SMSC95XX_BULK_IN_DLY_SET(ticks) ( (ticks) << 0 ) /**< Delay / 16.7ns */
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/** MAC control register */
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#define SMSC95XX_MAC_CR 0x100
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#define SMSC95XX_MAC_CR_RXALL 0x80000000UL /**< Receive all */
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#define SMSC95XX_MAC_CR_FDPX 0x00100000UL /**< Full duplex */
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#define SMSC95XX_MAC_CR_MCPAS 0x00080000UL /**< All multicast */
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#define SMSC95XX_MAC_CR_PRMS 0x00040000UL /**< Promiscuous */
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#define SMSC95XX_MAC_CR_PASSBAD 0x00010000UL /**< Pass bad frames */
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#define SMSC95XX_MAC_CR_TXEN 0x00000008UL /**< TX enabled */
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#define SMSC95XX_MAC_CR_RXEN 0x00000004UL /**< RX enabled */
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/** MAC address high register */
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#define SMSC95XX_ADDRH 0x104
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/** MAC address low register */
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#define SMSC95XX_ADDRL 0x108
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/** MII access register */
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#define SMSC95XX_MII_ACCESS 0x114
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#define SMSC95XX_MII_ACCESS_PHY_ADDRESS 0x00000800UL /**< PHY address */
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#define SMSC95XX_MII_ACCESS_MIIRINDA(addr) ( (addr) << 6 ) /**< MII register */
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#define SMSC95XX_MII_ACCESS_MIIWNR 0x00000002UL /**< MII write */
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#define SMSC95XX_MII_ACCESS_MIIBZY 0x00000001UL /**< MII busy */
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/** MII data register */
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#define SMSC95XX_MII_DATA 0x118
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#define SMSC95XX_MII_DATA_SET(data) ( (data) << 0 ) /**< Set data */
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#define SMSC95XX_MII_DATA_GET(mii_data) \
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( ( (mii_data) >> 0 ) & 0xffff ) /**< Get data */
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/** PHY interrupt source MII register */
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#define SMSC95XX_MII_PHY_INTR_SOURCE 29
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/** PHY interrupt mask MII register */
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#define SMSC95XX_MII_PHY_INTR_MASK 30
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/** PHY interrupt: auto-negotiation complete */
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#define SMSC95XX_PHY_INTR_ANEG_DONE 0x0040
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/** PHY interrupt: link down */
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#define SMSC95XX_PHY_INTR_LINK_DOWN 0x0010
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/** MAC receive address registers */
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/** MAC receive address low register */
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/** MAC receive address high register */
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} __attribute__ (( packed )) addr;
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/** Raw MAC address */
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uint8_t raw[ETH_ALEN];
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/** Receive packet header */
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struct smsc95xx_rx_header {
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} __attribute__ (( packed ));
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#define SMSC95XX_RX_RUNT 0x00004000UL
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/** Late collision */
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#define SMSC95XX_RX_LATE 0x00000040UL
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#define SMSC95XX_RX_CRC 0x00000002UL
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/** Transmit packet header */
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struct smsc95xx_tx_header {
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} __attribute__ (( packed ));
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#define SMSC95XX_TX_FIRST 0x00002000UL
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#define SMSC95XX_TX_LAST 0x00001000UL
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#define SMSC95XX_TX_LEN(len) ( (len) << 0 )
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/** Interrupt packet format */
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struct smsc95xx_interrupt {
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/** Current value of INT_STS register */
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} __attribute__ (( packed ));
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/** Receive statistics */
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struct smsc95xx_rx_statistics {
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/** Runt frame errors */
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/** Alignment errors */
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/** Frame too long errors */
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/** Later collision errors */
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/** Dropped frames */
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} __attribute__ (( packed ));
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/** Receive statistics */
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#define SMSC95XX_RX_STATISTICS 0
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/** Transmit statistics */
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struct smsc95xx_tx_statistics {
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/** Single collisions */
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/** Multiple collisions */
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/** Excessive collisions */
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/** Late collisions */
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/** Buffer underruns */
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/** Excessive deferrals */
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/** Carrier errors */
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} __attribute__ (( packed ));
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/** Transmit statistics */
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#define SMSC95XX_TX_STATISTICS 1
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/** A SMSC95xx network device */
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struct smsc95xx_device {
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struct usb_device *usb;
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/** Network device */
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struct net_device *netdev;
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/** USB network device */
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struct usbnet_device usbnet;
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struct mii_interface mii;
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/** Interrupt status */
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/** Reset delay (in microseconds) */
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#define SMSC95XX_RESET_DELAY_US 2
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/** Maximum time to wait for EEPROM (in milliseconds) */
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#define SMSC95XX_EEPROM_MAX_WAIT_MS 100
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/** Maximum time to wait for MII (in milliseconds) */
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#define SMSC95XX_MII_MAX_WAIT_MS 100
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/** Interrupt maximum fill level
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* This is a policy decision.
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#define SMSC95XX_INTR_MAX_FILL 2
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/** Bulk IN maximum fill level
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* This is a policy decision.
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#define SMSC95XX_IN_MAX_FILL 8
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/** Bulk IN buffer size */
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#define SMSC95XX_IN_MTU \
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( sizeof ( struct smsc95xx_rx_header ) + \
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ETH_FRAME_LEN + 4 /* possible VLAN header */ \
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/** Honeywell VM3 MAC address OEM string index */
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#define SMSC95XX_VM3_OEM_STRING_MAC 2
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#endif /* _SMSC95XX_H */