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* Common Blackfin memory map
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* Copyright 2004-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or later.
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#ifndef __BFIN_MEM_MAP_H__
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#define __BFIN_MEM_MAP_H__
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/* Every Blackfin so far has MMRs like this */
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# define COREMMR_BASE 0xFFE00000
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# define SYSMMR_BASE 0xFFC00000
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/* Every Blackfin so far has on-chip Scratch Pad SRAM like this */
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#ifndef L1_SRAM_SCRATCH
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# define L1_SRAM_SCRATCH 0xFFB00000
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# define L1_SRAM_SCRATCH_SIZE 0x1000
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# define L1_SRAM_SCRATCH_END (L1_SRAM_SCRATCH + L1_SRAM_SCRATCH_SIZE)