~pmdj/ubuntu/trusty/qemu/2.9+applesmc+fadtv3

« back to all changes in this revision

Viewing changes to roms/u-boot/include/configs/tuxx1.h

  • Committer: Phil Dennis-Jordan
  • Date: 2017-07-21 08:03:43 UTC
  • mfrom: (1.1.1)
  • Revision ID: phil@philjordan.eu-20170721080343-2yr2vdj7713czahv
New upstream release 2.9.0.

Show diffs side-by-side

added added

removed removed

Lines of Context:
 
1
/*
 
2
 * Copyright (C) 2006 Freescale Semiconductor, Inc.
 
3
 *                    Dave Liu <daveliu@freescale.com>
 
4
 *
 
5
 * Copyright (C) 2007 Logic Product Development, Inc.
 
6
 *                    Peter Barada <peterb@logicpd.com>
 
7
 *
 
8
 * Copyright (C) 2007 MontaVista Software, Inc.
 
9
 *                    Anton Vorontsov <avorontsov@ru.mvista.com>
 
10
 *
 
11
 * (C) Copyright 2008
 
12
 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
 
13
 *
 
14
 * (C) Copyright 2010-2013
 
15
 * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
 
16
 * Holger Brunck,  Keymile GmbH, holger.bruncl@keymile.com
 
17
 *
 
18
 * SPDX-License-Identifier:     GPL-2.0+
 
19
 */
 
20
 
 
21
#ifndef __CONFIG_H
 
22
#define __CONFIG_H
 
23
 
 
24
/*
 
25
 * High Level Configuration Options
 
26
 */
 
27
#if defined(CONFIG_KMSUPX5)
 
28
#define CONFIG_KM_BOARD_NAME    "kmsupx5"
 
29
#define CONFIG_HOSTNAME         kmsupx5
 
30
#elif defined(CONFIG_TUGE1)
 
31
#define CONFIG_KM_BOARD_NAME    "tuge1"
 
32
#define CONFIG_HOSTNAME         tuge1
 
33
#elif defined(CONFIG_TUXX1)     /* TUXX1 board (tuxa1/tuda1) specific */
 
34
#define CONFIG_KM_BOARD_NAME    "tuxx1"
 
35
#define CONFIG_HOSTNAME         tuxx1
 
36
#elif defined(CONFIG_KMOPTI2)
 
37
#define CONFIG_KM_BOARD_NAME    "kmopti2"
 
38
#define CONFIG_HOSTNAME         kmopti2
 
39
#else
 
40
#error ("Board not supported")
 
41
#endif
 
42
 
 
43
#define CONFIG_SYS_TEXT_BASE    0xF0000000
 
44
 
 
45
/* include common defines/options for all 8321 Keymile boards */
 
46
#include "km/km8321-common.h"
 
47
 
 
48
#define CONFIG_SYS_APP1_BASE    0xA0000000    /* PAXG */
 
49
#define CONFIG_SYS_APP1_SIZE    256 /* Megabytes */
 
50
#if defined(CONFIG_TUXX1) || defined(CONFIG_KMOPTI2)
 
51
#define CONFIG_SYS_APP2_BASE    0xB0000000    /* PINC3 */
 
52
#define CONFIG_SYS_APP2_SIZE    256 /* Megabytes */
 
53
#endif
 
54
 
 
55
/*
 
56
 * Init Local Bus Memory Controller:
 
57
 *                                    Device on
 
58
 * Bank Bus     Machine PortSz  Size  TUDA1  TUXA1  TUGE1  KMSUPX4 KMOPTI2
 
59
 * ---- ---     ------- ------  ----- ---------------------------------------
 
60
 *  2   Local   GPCM    8 bit  256MB  PAXG  LPXF   PAXI     LPXF   PAXE
 
61
 *  3   Local   GPCM    8 bit  256MB  PINC3 PINC2  unused  unused  OPI2(16 bit)
 
62
 *
 
63
 */
 
64
 
 
65
/*
 
66
 * Configuration for C2 on the local bus
 
67
 */
 
68
/* Window base at flash base */
 
69
#define CONFIG_SYS_LBLAWBAR2_PRELIM     CONFIG_SYS_APP1_BASE
 
70
/* Window size: 256 MB */
 
71
#define CONFIG_SYS_LBLAWAR2_PRELIM      (LBLAWAR_EN | LBLAWAR_256MB)
 
72
 
 
73
#define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_APP1_BASE | \
 
74
                                 BR_PS_8 | \
 
75
                                 BR_MS_GPCM | \
 
76
                                 BR_V)
 
77
 
 
78
#define CONFIG_SYS_OR2_PRELIM   (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
 
79
                                 OR_GPCM_CSNT | \
 
80
                                 OR_GPCM_ACS_DIV4 | \
 
81
                                 OR_GPCM_SCY_2 | \
 
82
                                 OR_GPCM_TRLX_SET | \
 
83
                                 OR_GPCM_EHTR_CLEAR | \
 
84
                                 OR_GPCM_EAD)
 
85
#if defined(CONFIG_TUXX1)
 
86
/*
 
87
 * Configuration for C3 on the local bus
 
88
 */
 
89
/* Access window base at PINC3 base */
 
90
#define CONFIG_SYS_LBLAWBAR3_PRELIM     CONFIG_SYS_APP2_BASE
 
91
/* Window size: 256 MB */
 
92
#define CONFIG_SYS_LBLAWAR3_PRELIM      (LBLAWAR_EN | LBLAWAR_256MB)
 
93
 
 
94
#define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_APP2_BASE | \
 
95
                                 BR_PS_8 |              \
 
96
                                 BR_MS_GPCM |           \
 
97
                                 BR_V)
 
98
 
 
99
#define CONFIG_SYS_OR3_PRELIM   (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
 
100
                                 OR_GPCM_CSNT | \
 
101
                                 OR_GPCM_ACS_DIV2 | \
 
102
                                 OR_GPCM_SCY_2 | \
 
103
                                 OR_GPCM_TRLX_SET | \
 
104
                                 OR_GPCM_EHTR_CLEAR)
 
105
 
 
106
#define CONFIG_SYS_MAMR         (MxMR_GPL_x4DIS | \
 
107
                                 0x0000c000 | \
 
108
                                 MxMR_WLFx_2X)
 
109
#endif
 
110
 
 
111
#if defined(CONFIG_KMOPTI2)
 
112
/*
 
113
 * Configuration for C3 on the local bus
 
114
 */
 
115
#define CONFIG_SYS_LBLAWBAR3_PRELIM     CONFIG_SYS_APP2_BASE
 
116
#define CONFIG_SYS_LBLAWAR3_PRELIM      (LBLAWAR_EN | LBLAWAR_256MB)
 
117
#define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_APP2_BASE | \
 
118
                                 BR_PS_16 |             \
 
119
                                 BR_MS_GPCM |           \
 
120
                                 BR_V)
 
121
#define CONFIG_SYS_OR3_PRELIM   (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
 
122
                                 OR_GPCM_SCY_4 | \
 
123
                                 OR_GPCM_TRLX_CLEAR | \
 
124
                                 OR_GPCM_EHTR_CLEAR)
 
125
#endif
 
126
 
 
127
/*
 
128
 * MMU Setup
 
129
 */
 
130
/* APP1: icache cacheable, but dcache-inhibit and guarded */
 
131
#define CONFIG_SYS_IBAT5L       (CONFIG_SYS_APP1_BASE | \
 
132
                                 BATL_PP_RW | \
 
133
                                 BATL_MEMCOHERENCE)
 
134
/* 512M should also include APP2... */
 
135
#define CONFIG_SYS_IBAT5U       (CONFIG_SYS_APP1_BASE | \
 
136
                                 BATU_BL_256M | \
 
137
                                 BATU_VS | \
 
138
                                 BATU_VP)
 
139
#define CONFIG_SYS_DBAT5L       (CONFIG_SYS_APP1_BASE | \
 
140
                                 BATL_PP_RW | \
 
141
                                 BATL_CACHEINHIBIT | \
 
142
                                 BATL_GUARDEDSTORAGE)
 
143
#define CONFIG_SYS_DBAT5U       CONFIG_SYS_IBAT5U
 
144
 
 
145
#if defined(CONFIG_TUGE1) || defined(CONFIG_KMSUPX5)
 
146
#define CONFIG_SYS_IBAT6L       (0)
 
147
#define CONFIG_SYS_IBAT6U       (0)
 
148
#define CONFIG_SYS_DBAT6L       CONFIG_SYS_IBAT6L
 
149
#else
 
150
/* APP2:  icache cacheable, but dcache-inhibit and guarded */
 
151
#define CONFIG_SYS_IBAT6L       (CONFIG_SYS_APP2_BASE | \
 
152
                                 BATL_PP_RW | \
 
153
                                 BATL_MEMCOHERENCE)
 
154
#define CONFIG_SYS_IBAT6U       (CONFIG_SYS_APP2_BASE | \
 
155
                                 BATU_BL_256M | \
 
156
                                 BATU_VS | \
 
157
                                 BATU_VP)
 
158
#define CONFIG_SYS_DBAT6L       (CONFIG_SYS_APP2_BASE | \
 
159
                                 BATL_PP_RW | \
 
160
                                 BATL_CACHEINHIBIT | \
 
161
                                 BATL_GUARDEDSTORAGE)
 
162
#endif
 
163
#define CONFIG_SYS_DBAT6U       CONFIG_SYS_IBAT6U
 
164
 
 
165
#define CONFIG_SYS_IBAT7L       (0)
 
166
#define CONFIG_SYS_IBAT7U       (0)
 
167
#define CONFIG_SYS_DBAT7L       CONFIG_SYS_IBAT7L
 
168
#define CONFIG_SYS_DBAT7U       CONFIG_SYS_IBAT7U
 
169
 
 
170
#endif /* __CONFIG_H */