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@ libgcc1 routines for ARM cpu.
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@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
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.type __udivsi3 ,function
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.type __aeabi_uidiv ,function
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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cmp divisor, #0x10000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #4
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movcc curbit, curbit, lsl #4
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@ For very big divisors, we must shift it a bit at a time, or
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@ we will be in danger of overflowing.
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cmp divisor, #0x80000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #1
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movcc curbit, curbit, lsl #1
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@ Test for possible subtractions, and note which bits
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@ are done in the result. On the final pass, this may subtract
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@ too much from the dividend, but the result will be ok, since the
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@ "bit" will have been shifted out at the bottom.
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subcs dividend, dividend, divisor
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orrcs result, result, curbit
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cmp dividend, divisor, lsr #1
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subcs dividend, dividend, divisor, lsr #1
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orrcs result, result, curbit, lsr #1
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cmp dividend, divisor, lsr #2
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subcs dividend, dividend, divisor, lsr #2
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orrcs result, result, curbit, lsr #2
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cmp dividend, divisor, lsr #3
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subcs dividend, dividend, divisor, lsr #3
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orrcs result, result, curbit, lsr #3
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cmp dividend, #0 @ Early termination?
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movnes curbit, curbit, lsr #4 @ No, any more bits to do?
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movne divisor, divisor, lsr #4
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mov r0, #0 @ about as wrong as it could be
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.size __udivsi3 , . - __udivsi3
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.globl __aeabi_uidivmod
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stmfd sp!, {r0, r1, ip, lr}
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ldmfd sp!, {r1, r2, ip, lr}
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.globl __aeabi_idivmod
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stmfd sp!, {r0, r1, ip, lr}
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ldmfd sp!, {r1, r2, ip, lr}