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* (C) Copyright 2007-2009 DENX Software Engineering
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* SPDX-License-Identifier: GPL-2.0+
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_IDE_RESET)
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void ide_set_reset (int idereset)
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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debug ("ide_set_reset(%d)\n", idereset);
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out_be32(&im->pata.pata_ata_control, 0);
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out_be32(&im->pata.pata_ata_control, FSL_ATA_CTRL_ATA_RST_B);
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void init_ide_reset (void)
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debug ("init_ide_reset\n");
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* Clear the reset bit to reset the interface
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* cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus
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/* Assert the reset bit to enable the interface */
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#define CALC_TIMING(t) (t + period - 1) / period
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int ide_preinit (void)
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n",
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/* Set the reset bit to 1 to enable the interface */
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/* Init timings : we use PIO mode 0 timings */
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t = 1000000000 / gd->arch.ips_clk; /* period in ns */
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cfg.bytes.field3 = (pio_specs.t1 + t) / t;
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cfg.bytes.field4 = (pio_specs.t2_8 + t) / t;
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out_be32(&im->pata.pata_time1, cfg.config);
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cfg.bytes.field1 = (pio_specs.t2_8 + t) / t;
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cfg.bytes.field2 = (pio_specs.tA + t) / t + 2;
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cfg.bytes.field4 = (pio_specs.t4 + t) / t;
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out_be32(&im->pata.pata_time2, cfg.config);
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cfg.config = in_be32(&im->pata.pata_time3);
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cfg.bytes.field1 = (pio_specs.t9 + t) / t;
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out_be32(&im->pata.pata_time3, cfg.config);
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debug ("PATA preinit complete.\n");
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#endif /* defined(CONFIG_IDE_RESET) */