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ACPI 5.1 definitions from the ACPI Specification Revision 5.1 July, 2014.
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Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
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Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
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(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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FILE_LICENCE ( BSD3 );
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#include <ipxe/efi/IndustryStandard/Acpi50.h>
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// Ensure proper structure formats
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/// ACPI 5.1 Generic Address Space definition
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UINT8 RegisterBitWidth;
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UINT8 RegisterBitOffset;
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} EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;
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// Generic Address Space Address IDs
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#define EFI_ACPI_5_1_SYSTEM_MEMORY 0
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#define EFI_ACPI_5_1_SYSTEM_IO 1
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#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2
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#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3
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#define EFI_ACPI_5_1_SMBUS 4
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#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A
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#define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F
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// Generic Address Space Access Sizes
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#define EFI_ACPI_5_1_UNDEFINED 0
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#define EFI_ACPI_5_1_BYTE 1
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#define EFI_ACPI_5_1_WORD 2
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#define EFI_ACPI_5_1_DWORD 3
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#define EFI_ACPI_5_1_QWORD 4
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// ACPI 5.1 table structures
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/// Root System Description Pointer Structure
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UINT8 ExtendedChecksum;
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} EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;
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/// RSD_PTR Revision (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2
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/// Common table header, this prefaces all ACPI tables, including FACS, but
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/// excluding the RSD PTR structure
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} EFI_ACPI_5_1_COMMON_HEADER;
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// Root System Description Table
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// No definition needed as it is a common description table header, the same with
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// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
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/// RSDT Revision (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
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// Extended System Description Table
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// No definition needed as it is a common description table header, the same with
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// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
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/// XSDT Revision (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
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/// Fixed ACPI Description Table Structure (FADT)
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT8 PreferredPmProfile;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;
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UINT64 XFirmwareCtrl;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
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} EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;
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/// FADT Version (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
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#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01
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// Fixed ACPI Description Table Preferred Power Management Profile
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#define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0
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#define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1
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#define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2
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#define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3
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#define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4
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#define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5
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#define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6
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#define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7
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#define EFI_ACPI_5_1_PM_PROFILE_TABLET 8
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// Fixed ACPI Description Table Boot Architecture Flags
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// All other bits are reserved and must be set to 0.
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#define EFI_ACPI_5_1_LEGACY_DEVICES BIT0
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#define EFI_ACPI_5_1_8042 BIT1
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#define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2
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#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3
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#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4
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#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5
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// Fixed ACPI Description Table Arm Boot Architecture Flags
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// All other bits are reserved and must be set to 0.
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#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0
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#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1
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// Fixed ACPI Description Table Fixed Feature Flags
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// All other bits are reserved and must be set to 0.
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#define EFI_ACPI_5_1_WBINVD BIT0
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#define EFI_ACPI_5_1_WBINVD_FLUSH BIT1
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#define EFI_ACPI_5_1_PROC_C1 BIT2
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#define EFI_ACPI_5_1_P_LVL2_UP BIT3
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#define EFI_ACPI_5_1_PWR_BUTTON BIT4
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#define EFI_ACPI_5_1_SLP_BUTTON BIT5
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#define EFI_ACPI_5_1_FIX_RTC BIT6
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#define EFI_ACPI_5_1_RTC_S4 BIT7
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#define EFI_ACPI_5_1_TMR_VAL_EXT BIT8
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#define EFI_ACPI_5_1_DCK_CAP BIT9
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#define EFI_ACPI_5_1_RESET_REG_SUP BIT10
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#define EFI_ACPI_5_1_SEALED_CASE BIT11
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#define EFI_ACPI_5_1_HEADLESS BIT12
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#define EFI_ACPI_5_1_CPU_SW_SLP BIT13
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#define EFI_ACPI_5_1_PCI_EXP_WAK BIT14
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#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15
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#define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16
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#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17
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#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18
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#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
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#define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20
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#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21
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/// Firmware ACPI Control Structure
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UINT32 HardwareSignature;
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UINT32 FirmwareWakingVector;
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UINT64 XFirmwareWakingVector;
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} EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;
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/// FACS Version (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
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/// Firmware Control Structure Feature Flags
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/// All other bits are reserved and must be set to 0.
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#define EFI_ACPI_5_1_S4BIOS_F BIT0
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#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1
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/// OSPM Enabled Firmware Control Structure Flags
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/// All other bits are reserved and must be set to 0.
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#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0
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// Differentiated System Description Table,
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// Secondary System Description Table
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// and Persistent System Description Table,
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// no definition needed as they are common description table header, the same with
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// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
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#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
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#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
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/// Multiple APIC Description Table header definition. The rest of the table
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/// must be defined in a platform specific manner.
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT32 LocalApicAddress;
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} EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
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/// MADT Revision (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
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/// Multiple APIC Flags
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/// All other bits are reserved and must be set to 0.
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#define EFI_ACPI_5_1_PCAT_COMPAT BIT0
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// Multiple APIC Description Table APIC structure types
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// All other values between 0x0D and 0x7F are reserved and
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// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
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#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00
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#define EFI_ACPI_5_1_IO_APIC 0x01
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#define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02
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#define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03
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#define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04
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#define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
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#define EFI_ACPI_5_1_IO_SAPIC 0x06
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#define EFI_ACPI_5_1_LOCAL_SAPIC 0x07
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#define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08
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#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09
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#define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A
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#define EFI_ACPI_5_1_GIC 0x0B
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#define EFI_ACPI_5_1_GICD 0x0C
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#define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D
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#define EFI_ACPI_5_1_GICR 0x0E
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// APIC Structure Definitions
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/// Processor Local APIC Structure Definition
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UINT8 AcpiProcessorId;
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} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;
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/// Local APIC Flags. All other bits are reserved and must be 0.
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#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0
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/// IO APIC Structure
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UINT32 IoApicAddress;
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UINT32 GlobalSystemInterruptBase;
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} EFI_ACPI_5_1_IO_APIC_STRUCTURE;
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/// Interrupt Source Override Structure
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UINT32 GlobalSystemInterrupt;
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} EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
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/// Platform Interrupt Sources Structure Definition
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UINT32 GlobalSystemInterrupt;
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UINT32 PlatformInterruptSourceFlags;
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UINT8 CpeiProcessorOverride;
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} EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;
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// All other bits are reserved and must be set to 0.
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#define EFI_ACPI_5_1_POLARITY (3 << 0)
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#define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2)
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/// Non-Maskable Interrupt Source Structure
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UINT32 GlobalSystemInterrupt;
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} EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
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/// Local APIC NMI Structure
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UINT8 AcpiProcessorId;
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} EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;
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/// Local APIC Address Override Structure
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UINT64 LocalApicAddress;
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} EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
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/// IO SAPIC Structure
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UINT32 GlobalSystemInterruptBase;
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UINT64 IoSapicAddress;
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} EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;
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/// Local SAPIC Structure
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/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
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UINT8 AcpiProcessorId;
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UINT32 ACPIProcessorUIDValue;
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} EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
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/// Platform Interrupt Sources Structure
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UINT32 GlobalSystemInterrupt;
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UINT32 PlatformInterruptSourceFlags;
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} EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
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/// Platform Interrupt Source Flags.
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/// All other bits are reserved and must be set to 0.
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#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0
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/// Processor Local x2APIC Structure Definition
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UINT32 AcpiProcessorUid;
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} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
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/// Local x2APIC NMI Structure
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UINT32 AcpiProcessorUid;
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UINT8 LocalX2ApicLint;
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} EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;
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UINT32 CPUInterfaceNumber;
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UINT32 AcpiProcessorUid;
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UINT32 ParkingProtocolVersion;
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UINT32 PerformanceInterruptGsiv;
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UINT64 ParkedAddress;
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UINT64 PhysicalBaseAddress;
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UINT32 VGICMaintenanceInterrupt;
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UINT64 GICRBaseAddress;
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} EFI_ACPI_5_1_GIC_STRUCTURE;
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/// GIC Flags. All other bits are reserved and must be 0.
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#define EFI_ACPI_5_1_GIC_ENABLED BIT0
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#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1
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#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
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/// GIC Distributor Structure
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UINT64 PhysicalBaseAddress;
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UINT32 SystemVectorBase;
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} EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;
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#define EFI_ACPI_5_1_GIC_V2 0x01
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#define EFI_ACPI_5_1_GIC_V2m 0x02
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#define EFI_ACPI_5_1_GIC_V3 0x03
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#define EFI_ACPI_5_1_GIC_V4 0x04
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/// GIC MSI Frame Structure
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UINT32 GicMsiFrameId;
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UINT64 PhysicalBaseAddress;
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} EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;
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/// GIC MSI Frame Flags. All other bits are reserved and must be 0.
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#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0
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UINT64 DiscoveryRangeBaseAddress;
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UINT32 DiscoveryRangeLength;
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} EFI_ACPI_5_1_GICR_STRUCTURE;
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/// Smart Battery Description Table (SBST)
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT32 WarningEnergyLevel;
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UINT32 LowEnergyLevel;
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UINT32 CriticalEnergyLevel;
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} EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;
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/// SBST Version (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
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/// Embedded Controller Boot Resources Table (ECDT)
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/// The table is followed by a null terminated ASCII string that contains
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/// a fully qualified reference to the name space object.
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EFI_ACPI_DESCRIPTION_HEADER Header;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;
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EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;
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} EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
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/// ECDT Version (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
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/// System Resource Affinity Table (SRAT). The rest of the table
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/// must be defined in a platform specific manner.
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT32 Reserved1; ///< Must be set to 1
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} EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
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/// SRAT Version (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
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// SRAT structure types.
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// All other values between 0x04 an 0xFF are reserved and
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// will be ignored by OSPM.
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#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
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#define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01
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#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
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#define EFI_ACPI_5_1_GICC_AFFINITY 0x03
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/// Processor Local APIC/SAPIC Affinity Structure Definition
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UINT8 ProximityDomain7To0;
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UINT8 ProximityDomain31To8[3];
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} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
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/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
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#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
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/// Memory Affinity Structure Definition
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UINT32 ProximityDomain;
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UINT32 AddressBaseLow;
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UINT32 AddressBaseHigh;
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} EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;
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// Memory Flags. All other bits are reserved and must be 0.
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#define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)
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#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
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#define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)
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/// Processor Local x2APIC Affinity Structure Definition
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UINT32 ProximityDomain;
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} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
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/// GICC Affinity Structure Definition
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UINT32 ProximityDomain;
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UINT32 AcpiProcessorUid;
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} EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;
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/// GICC Flags. All other bits are reserved and must be 0.
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#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)
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/// System Locality Distance Information Table (SLIT).
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/// The rest of the table is a matrix.
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT64 NumberOfSystemLocalities;
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} EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
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/// SLIT Version (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
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/// Corrected Platform Error Polling Table (CPEP)
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EFI_ACPI_DESCRIPTION_HEADER Header;
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} EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
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/// CPEP Version (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
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// CPEP processor structure types.
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#define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00
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/// Corrected Platform Error Polling Processor Structure Definition
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UINT32 PollingInterval;
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} EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
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/// Maximum System Characteristics Table (MSCT)
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT32 OffsetProxDomInfo;
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UINT32 MaximumNumberOfProximityDomains;
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UINT32 MaximumNumberOfClockDomains;
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UINT64 MaximumPhysicalAddress;
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} EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
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/// MSCT Version (as defined in ACPI 5.1 spec.)
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#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
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/// Maximum Proximity Domain Information Structure Definition
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UINT32 ProximityDomainRangeLow;
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UINT32 ProximityDomainRangeHigh;
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UINT32 MaximumProcessorCapacity;
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UINT64 MaximumMemoryCapacity;
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} EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
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/// ACPI RAS Feature Table definition.
784
EFI_ACPI_DESCRIPTION_HEADER Header;
785
UINT8 PlatformCommunicationChannelIdentifier[12];
786
} EFI_ACPI_5_1_RAS_FEATURE_TABLE;
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/// RASF Version (as defined in ACPI 5.1 spec.)
791
#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
794
/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
801
UINT8 RASCapabilities[16];
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UINT8 SetRASCapabilities[16];
803
UINT16 NumberOfRASFParameterBlocks;
804
UINT32 SetRASCapabilitiesStatus;
805
} EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
808
/// ACPI RASF PCC command code
810
#define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
813
/// ACPI RASF Platform RAS Capabilities
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#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
816
#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
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/// ACPI RASF Parameter Block structure for PATROL_SCRUB
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UINT16 PatrolScrubCommand;
826
UINT64 RequestedAddressRange[2];
827
UINT64 ActualAddressRange[2];
829
UINT8 RequestedSpeed;
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} EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
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/// ACPI RASF Patrol Scrub command
835
#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
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#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
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#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
840
/// Memory Power State Table definition.
843
EFI_ACPI_DESCRIPTION_HEADER Header;
844
UINT8 PlatformCommunicationChannelIdentifier;
846
// Memory Power Node Structure
847
// Memory Power State Characteristics
848
} EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;
851
/// MPST Version (as defined in ACPI 5.1 spec.)
853
#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
856
/// MPST Platform Communication Channel Shared Memory Region definition.
862
UINT32 MemoryPowerCommandRegister;
863
UINT32 MemoryPowerStatusRegister;
865
UINT32 MemoryPowerNodeId;
866
UINT64 MemoryEnergyConsumed;
867
UINT64 ExpectedAveragePowerComsuned;
868
} EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
871
/// ACPI MPST PCC command code
873
#define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
876
/// ACPI MPST Memory Power command
878
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
879
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
880
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
881
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
884
/// MPST Memory Power Node Table
887
UINT8 PowerStateValue;
888
UINT8 PowerStateInformationIndex;
889
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;
894
UINT16 MemoryPowerNodeId;
897
UINT64 AddressLength;
898
UINT32 NumberOfPowerStates;
899
UINT32 NumberOfPhysicalComponents;
900
//EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
901
//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
902
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;
904
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
905
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
906
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
909
UINT16 MemoryPowerNodeCount;
911
} EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;
914
/// MPST Memory Power State Characteristics Table
917
UINT8 PowerStateStructureID;
920
UINT32 AveragePowerConsumedInMPS0;
921
UINT32 RelativePowerSavingToMPS0;
922
UINT64 ExitLatencyToMPS0;
923
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
925
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
926
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
927
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
930
UINT16 MemoryPowerStateCharacteristicsCount;
932
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
935
/// Memory Topology Table definition.
938
EFI_ACPI_DESCRIPTION_HEADER Header;
940
} EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;
943
/// PMTT Version (as defined in ACPI 5.1 spec.)
945
#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
948
/// Common Memory Aggregator Device Structure.
956
} EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
959
/// Memory Aggregator Device Type
961
#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
962
#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
963
#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
966
/// Socket Memory Aggregator Device Structure.
969
EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
970
UINT16 SocketIdentifier;
972
//EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
973
} EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
976
/// MemoryController Memory Aggregator Device Structure.
979
EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
982
UINT32 ReadBandwidth;
983
UINT32 WriteBandwidth;
984
UINT16 OptimalAccessUnit;
985
UINT16 OptimalAccessAlignment;
987
UINT16 NumberOfProximityDomains;
988
//UINT32 ProximityDomain[NumberOfProximityDomains];
989
//EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
990
} EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
993
/// DIMM Memory Aggregator Device Structure.
996
EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
997
UINT16 PhysicalComponentIdentifier;
1000
UINT32 SmbiosHandle;
1001
} EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1004
/// Boot Graphics Resource Table definition.
1007
EFI_ACPI_DESCRIPTION_HEADER Header;
1009
/// 2-bytes (16 bit) version ID. This value must be 1.
1013
/// 1-byte status field indicating current status about the table.
1014
/// Bits[7:1] = Reserved (must be zero)
1015
/// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1019
/// 1-byte enumerated type field indicating format of the image.
1021
/// 1 - 255 Reserved (for future use)
1025
/// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1026
/// of the image bitmap.
1028
UINT64 ImageAddress;
1030
/// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1031
/// (X, Y) display offset of the top left corner of the boot image.
1032
/// The top left corner of the display is at offset (0, 0).
1034
UINT32 ImageOffsetX;
1036
/// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1037
/// (X, Y) display offset of the top left corner of the boot image.
1038
/// The top left corner of the display is at offset (0, 0).
1040
UINT32 ImageOffsetY;
1041
} EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;
1046
#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1051
#define EFI_ACPI_5_1_BGRT_VERSION 0x01
1056
#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
1057
#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01
1062
#define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00
1065
/// FPDT Version (as defined in ACPI 5.1 spec.)
1067
#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1070
/// FPDT Performance Record Types
1072
#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1073
#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1076
/// FPDT Performance Record Revision
1078
#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1079
#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1082
/// FPDT Runtime Performance Record Types
1084
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1085
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1086
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1089
/// FPDT Runtime Performance Record Revision
1091
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1092
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1093
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1096
/// FPDT Performance Record header
1102
} EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;
1105
/// FPDT Performance Table header
1110
} EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;
1113
/// FPDT Firmware Basic Boot Performance Pointer Record Structure
1116
EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
1119
/// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1121
UINT64 BootPerformanceTablePointer;
1122
} EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1125
/// FPDT S3 Performance Table Pointer Record Structure
1128
EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
1131
/// 64-bit processor-relative physical address of the S3 Performance Table.
1133
UINT64 S3PerformanceTablePointer;
1134
} EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1137
/// FPDT Firmware Basic Boot Performance Record Structure
1140
EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
1143
/// Timer value logged at the beginning of firmware image execution.
1144
/// This may not always be zero or near zero.
1148
/// Timer value logged just prior to loading the OS boot loader into memory.
1149
/// For non-UEFI compatible boots, this field must be zero.
1151
UINT64 OsLoaderLoadImageStart;
1153
/// Timer value logged just prior to launching the previously loaded OS boot loader image.
1154
/// For non-UEFI compatible boots, the timer value logged will be just prior
1155
/// to the INT 19h handler invocation.
1157
UINT64 OsLoaderStartImageStart;
1159
/// Timer value logged at the point when the OS loader calls the
1160
/// ExitBootServices function for UEFI compatible firmware.
1161
/// For non-UEFI compatible boots, this field must be zero.
1163
UINT64 ExitBootServicesEntry;
1165
/// Timer value logged at the point just prior towhen the OS loader gaining
1166
/// control back from calls the ExitBootServices function for UEFI compatible firmware.
1167
/// For non-UEFI compatible boots, this field must be zero.
1169
UINT64 ExitBootServicesExit;
1170
} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1173
/// FPDT Firmware Basic Boot Performance Table signature
1175
#define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1178
// FPDT Firmware Basic Boot Performance Table
1181
EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
1183
// one or more Performance Records.
1185
} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1188
/// FPDT "S3PT" S3 Performance Table
1190
#define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1193
// FPDT Firmware S3 Boot Performance Table
1196
EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;
1198
// one or more Performance Records.
1200
} EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;
1203
/// FPDT Basic S3 Resume Performance Record
1206
EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
1208
/// A count of the number of S3 resume cycles since the last full boot sequence.
1212
/// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1213
/// OS waking vector. Only the most recent resume cycle's time is retained.
1217
/// Average timer value of all resume cycles logged since the last full boot
1218
/// sequence, including the most recent resume. Note that the entire log of
1219
/// timer values does not need to be retained in order to calculate this average.
1221
UINT64 AverageResume;
1222
} EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;
1225
/// FPDT Basic S3 Suspend Performance Record
1228
EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;
1230
/// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1231
/// Only the most recent suspend cycle's timer value is retained.
1233
UINT64 SuspendStart;
1235
/// Timer value recorded at the final firmware write to SLP_TYP (or other
1236
/// mechanism) used to trigger hardware entry to S3.
1237
/// Only the most recent suspend cycle's timer value is retained.
1240
} EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;
1243
/// Firmware Performance Record Table definition.
1246
EFI_ACPI_DESCRIPTION_HEADER Header;
1247
} EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1250
/// Generic Timer Description Table definition.
1253
EFI_ACPI_DESCRIPTION_HEADER Header;
1254
UINT64 CntControlBasePhysicalAddress;
1256
UINT32 SecurePL1TimerGSIV;
1257
UINT32 SecurePL1TimerFlags;
1258
UINT32 NonSecurePL1TimerGSIV;
1259
UINT32 NonSecurePL1TimerFlags;
1260
UINT32 VirtualTimerGSIV;
1261
UINT32 VirtualTimerFlags;
1262
UINT32 NonSecurePL2TimerGSIV;
1263
UINT32 NonSecurePL2TimerFlags;
1264
UINT64 CntReadBasePhysicalAddress;
1265
UINT32 PlatformTimerCount;
1266
UINT32 PlatformTimerOffset;
1267
} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;
1270
/// GTDT Version (as defined in ACPI 5.1 spec.)
1272
#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
1275
/// Timer Flags. All other bits are reserved and must be 0.
1277
#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1278
#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1279
#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
1282
/// Platform Timer Type
1284
#define EFI_ACPI_5_1_GTDT_GT_BLOCK 0
1285
#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1
1288
/// GT Block Structure
1295
UINT32 GTBlockTimerCount;
1296
UINT32 GTBlockTimerOffset;
1297
} EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;
1300
/// GT Block Timer Structure
1303
UINT8 GTFrameNumber;
1307
UINT32 GTxPhysicalTimerGSIV;
1308
UINT32 GTxPhysicalTimerFlags;
1309
UINT32 GTxVirtualTimerGSIV;
1310
UINT32 GTxVirtualTimerFlags;
1311
UINT32 GTxCommonFlags;
1312
} EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;
1315
/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
1317
#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1318
#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1321
/// Common Flags Flags. All other bits are reserved and must be 0.
1323
#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
1324
#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
1327
/// SBSA Generic Watchdog Structure
1333
UINT64 RefreshFramePhysicalAddress;
1334
UINT64 WatchdogControlFramePhysicalAddress;
1335
UINT32 WatchdogTimerGSIV;
1336
UINT32 WatchdogTimerFlags;
1337
} EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
1340
/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
1342
#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
1343
#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1344
#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
1347
/// Boot Error Record Table (BERT)
1350
EFI_ACPI_DESCRIPTION_HEADER Header;
1351
UINT32 BootErrorRegionLength;
1352
UINT64 BootErrorRegion;
1353
} EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;
1356
/// BERT Version (as defined in ACPI 5.1 spec.)
1358
#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1361
/// Boot Error Region Block Status Definition
1364
UINT32 UncorrectableErrorValid:1;
1365
UINT32 CorrectableErrorValid:1;
1366
UINT32 MultipleUncorrectableErrors:1;
1367
UINT32 MultipleCorrectableErrors:1;
1368
UINT32 ErrorDataEntryCount:10;
1370
} EFI_ACPI_5_1_ERROR_BLOCK_STATUS;
1373
/// Boot Error Region Definition
1376
EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
1377
UINT32 RawDataOffset;
1378
UINT32 RawDataLength;
1380
UINT32 ErrorSeverity;
1381
} EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;
1384
// Boot Error Severity types
1386
#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00
1387
#define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01
1388
#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02
1389
#define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03
1392
/// Generic Error Data Entry Definition
1395
UINT8 SectionType[16];
1396
UINT32 ErrorSeverity;
1398
UINT8 ValidationBits;
1400
UINT32 ErrorDataLength;
1403
} EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1406
/// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)
1408
#define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
1411
/// HEST - Hardware Error Source Table
1414
EFI_ACPI_DESCRIPTION_HEADER Header;
1415
UINT32 ErrorSourceCount;
1416
} EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1419
/// HEST Version (as defined in ACPI 5.1 spec.)
1421
#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1424
// Error Source structure types.
1426
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1427
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1428
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02
1429
#define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06
1430
#define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07
1431
#define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08
1432
#define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09
1435
// Error Source structure flags.
1437
#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1438
#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1441
/// IA-32 Architecture Machine Check Exception Structure Definition
1449
UINT32 NumberOfRecordsToPreAllocate;
1450
UINT32 MaxSectionsPerRecord;
1451
UINT64 GlobalCapabilityInitData;
1452
UINT64 GlobalControlInitData;
1453
UINT8 NumberOfHardwareBanks;
1455
} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1458
/// IA-32 Architecture Machine Check Bank Structure Definition
1462
UINT8 ClearStatusOnInitialization;
1463
UINT8 StatusDataFormat;
1465
UINT32 ControlRegisterMsrAddress;
1466
UINT64 ControlInitData;
1467
UINT32 StatusRegisterMsrAddress;
1468
UINT32 AddressRegisterMsrAddress;
1469
UINT32 MiscRegisterMsrAddress;
1470
} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1473
/// IA-32 Architecture Machine Check Bank Structure MCA data format
1475
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1476
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1477
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1480
// Hardware Error Notification types. All other values are reserved
1482
#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1483
#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1484
#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1485
#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1486
#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1489
/// Hardware Error Notification Configuration Write Enable Structure Definition
1493
UINT16 PollInterval:1;
1494
UINT16 SwitchToPollingThresholdValue:1;
1495
UINT16 SwitchToPollingThresholdWindow:1;
1496
UINT16 ErrorThresholdValue:1;
1497
UINT16 ErrorThresholdWindow:1;
1499
} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1502
/// Hardware Error Notification Structure Definition
1507
EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1508
UINT32 PollInterval;
1510
UINT32 SwitchToPollingThresholdValue;
1511
UINT32 SwitchToPollingThresholdWindow;
1512
UINT32 ErrorThresholdValue;
1513
UINT32 ErrorThresholdWindow;
1514
} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1517
/// IA-32 Architecture Corrected Machine Check Structure Definition
1525
UINT32 NumberOfRecordsToPreAllocate;
1526
UINT32 MaxSectionsPerRecord;
1527
EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1528
UINT8 NumberOfHardwareBanks;
1530
} EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1533
/// IA-32 Architecture NMI Error Structure Definition
1539
UINT32 NumberOfRecordsToPreAllocate;
1540
UINT32 MaxSectionsPerRecord;
1541
UINT32 MaxRawDataLength;
1542
} EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1545
/// PCI Express Root Port AER Structure Definition
1553
UINT32 NumberOfRecordsToPreAllocate;
1554
UINT32 MaxSectionsPerRecord;
1558
UINT16 DeviceControl;
1560
UINT32 UncorrectableErrorMask;
1561
UINT32 UncorrectableErrorSeverity;
1562
UINT32 CorrectableErrorMask;
1563
UINT32 AdvancedErrorCapabilitiesAndControl;
1564
UINT32 RootErrorCommand;
1565
} EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1568
/// PCI Express Device AER Structure Definition
1576
UINT32 NumberOfRecordsToPreAllocate;
1577
UINT32 MaxSectionsPerRecord;
1581
UINT16 DeviceControl;
1583
UINT32 UncorrectableErrorMask;
1584
UINT32 UncorrectableErrorSeverity;
1585
UINT32 CorrectableErrorMask;
1586
UINT32 AdvancedErrorCapabilitiesAndControl;
1587
} EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1590
/// PCI Express Bridge AER Structure Definition
1598
UINT32 NumberOfRecordsToPreAllocate;
1599
UINT32 MaxSectionsPerRecord;
1603
UINT16 DeviceControl;
1605
UINT32 UncorrectableErrorMask;
1606
UINT32 UncorrectableErrorSeverity;
1607
UINT32 CorrectableErrorMask;
1608
UINT32 AdvancedErrorCapabilitiesAndControl;
1609
UINT32 SecondaryUncorrectableErrorMask;
1610
UINT32 SecondaryUncorrectableErrorSeverity;
1611
UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
1612
} EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1615
/// Generic Hardware Error Source Structure Definition
1620
UINT16 RelatedSourceId;
1623
UINT32 NumberOfRecordsToPreAllocate;
1624
UINT32 MaxSectionsPerRecord;
1625
UINT32 MaxRawDataLength;
1626
EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
1627
EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1628
UINT32 ErrorStatusBlockLength;
1629
} EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
1632
/// Generic Error Status Definition
1635
EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;
1636
UINT32 RawDataOffset;
1637
UINT32 RawDataLength;
1639
UINT32 ErrorSeverity;
1640
} EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;
1643
/// ERST - Error Record Serialization Table
1646
EFI_ACPI_DESCRIPTION_HEADER Header;
1647
UINT32 SerializationHeaderSize;
1649
UINT32 InstructionEntryCount;
1650
} EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
1653
/// ERST Version (as defined in ACPI 5.1 spec.)
1655
#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1658
/// ERST Serialization Actions
1660
#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00
1661
#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01
1662
#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02
1663
#define EFI_ACPI_5_1_ERST_END_OPERATION 0x03
1664
#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04
1665
#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05
1666
#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06
1667
#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07
1668
#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08
1669
#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09
1670
#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A
1671
#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
1672
#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
1673
#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
1674
#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
1677
/// ERST Action Command Status
1679
#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00
1680
#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
1681
#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
1682
#define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03
1683
#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04
1684
#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05
1687
/// ERST Serialization Instructions
1689
#define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00
1690
#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01
1691
#define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02
1692
#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03
1693
#define EFI_ACPI_5_1_ERST_NOOP 0x04
1694
#define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05
1695
#define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06
1696
#define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07
1697
#define EFI_ACPI_5_1_ERST_ADD 0x08
1698
#define EFI_ACPI_5_1_ERST_SUBTRACT 0x09
1699
#define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A
1700
#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B
1701
#define EFI_ACPI_5_1_ERST_STALL 0x0C
1702
#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D
1703
#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
1704
#define EFI_ACPI_5_1_ERST_GOTO 0x0F
1705
#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10
1706
#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11
1707
#define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12
1710
/// ERST Instruction Flags
1712
#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01
1715
/// ERST Serialization Instruction Entry
1718
UINT8 SerializationAction;
1722
EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1725
} EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
1728
/// EINJ - Error Injection Table
1731
EFI_ACPI_DESCRIPTION_HEADER Header;
1732
UINT32 InjectionHeaderSize;
1733
UINT8 InjectionFlags;
1735
UINT32 InjectionEntryCount;
1736
} EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;
1739
/// EINJ Version (as defined in ACPI 5.1 spec.)
1741
#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
1744
/// EINJ Error Injection Actions
1746
#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00
1747
#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
1748
#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02
1749
#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03
1750
#define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04
1751
#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05
1752
#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06
1753
#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07
1754
#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF
1757
/// EINJ Action Command Status
1759
#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00
1760
#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01
1761
#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02
1764
/// EINJ Error Type Definition
1766
#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
1767
#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
1768
#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
1769
#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
1770
#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
1771
#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
1772
#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
1773
#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
1774
#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
1775
#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
1776
#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
1777
#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
1780
/// EINJ Injection Instructions
1782
#define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00
1783
#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01
1784
#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02
1785
#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03
1786
#define EFI_ACPI_5_1_EINJ_NOOP 0x04
1789
/// EINJ Instruction Flags
1791
#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01
1794
/// EINJ Injection Instruction Entry
1797
UINT8 InjectionAction;
1801
EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1804
} EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;
1807
/// EINJ Trigger Action Table
1814
} EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;
1817
/// Platform Communications Channel Table (PCCT)
1820
EFI_ACPI_DESCRIPTION_HEADER Header;
1823
} EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
1826
/// PCCT Version (as defined in ACPI 5.1 spec.)
1828
#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1831
/// PCCT Global Flags
1833
#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0
1836
// PCCT Subspace type
1838
#define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00
1841
/// PCC Subspace Structure Header
1846
} EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;
1849
/// Generic Communications Subspace Structure
1856
UINT64 AddressLength;
1857
EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
1858
UINT64 DoorbellPreserve;
1859
UINT64 DoorbellWrite;
1860
UINT32 NominalLatency;
1861
UINT32 MaximumPeriodicAccessRate;
1862
UINT16 MinimumRequestTurnaroundTime;
1863
} EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;
1866
/// Generic Communications Channel Shared Memory Region
1872
UINT8 GenerateSci:1;
1873
} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
1876
UINT8 CommandComplete:1;
1877
UINT8 SciDoorbell:1;
1879
UINT8 PlatformNotification:1;
1882
} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
1886
EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
1887
EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
1888
} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
1891
// Known table signatures
1895
/// "RSD PTR " Root System Description Pointer
1897
#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1900
/// "APIC" Multiple APIC Description Table
1902
#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
1905
/// "BERT" Boot Error Record Table
1907
#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
1910
/// "BGRT" Boot Graphics Resource Table
1912
#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
1915
/// "CPEP" Corrected Platform Error Polling Table
1917
#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
1920
/// "DSDT" Differentiated System Description Table
1922
#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
1925
/// "ECDT" Embedded Controller Boot Resources Table
1927
#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
1930
/// "EINJ" Error Injection Table
1932
#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
1935
/// "ERST" Error Record Serialization Table
1937
#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
1940
/// "FACP" Fixed ACPI Description Table
1942
#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
1945
/// "FACS" Firmware ACPI Control Structure
1947
#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
1950
/// "FPDT" Firmware Performance Data Table
1952
#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
1955
/// "GTDT" Generic Timer Description Table
1957
#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
1960
/// "HEST" Hardware Error Source Table
1962
#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
1965
/// "MPST" Memory Power State Table
1967
#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
1970
/// "MSCT" Maximum System Characteristics Table
1972
#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
1975
/// "PMTT" Platform Memory Topology Table
1977
#define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
1980
/// "PSDT" Persistent System Description Table
1982
#define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
1985
/// "RASF" ACPI RAS Feature Table
1987
#define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
1990
/// "RSDT" Root System Description Table
1992
#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
1995
/// "SBST" Smart Battery Specification Table
1997
#define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
2000
/// "SLIT" System Locality Information Table
2002
#define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
2005
/// "SRAT" System Resource Affinity Table
2007
#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
2010
/// "SSDT" Secondary System Description Table
2012
#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
2015
/// "XSDT" Extended System Description Table
2017
#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
2020
/// "BOOT" MS Simple Boot Spec
2022
#define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
2025
/// "CSRT" MS Core System Resource Table
2027
#define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2030
/// "DBG2" MS Debug Port 2 Spec
2032
#define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2035
/// "DBGP" MS Debug Port Spec
2037
#define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2040
/// "DMAR" DMA Remapping Table
2042
#define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2045
/// "DRTM" Dynamic Root of Trust for Measurement Table
2047
#define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
2050
/// "ETDT" Event Timer Description Table
2052
#define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2055
/// "HPET" IA-PC High Precision Event Timer Table
2057
#define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2060
/// "iBFT" iSCSI Boot Firmware Table
2062
#define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2065
/// "IVRS" I/O Virtualization Reporting Structure
2067
#define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2070
/// "LPIT" Low Power Idle Table
2072
#define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')
2075
/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2077
#define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2080
/// "MCHI" Management Controller Host Interface Table
2082
#define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2085
/// "MSDM" MS Data Management Table
2087
#define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2090
/// "SLIC" MS Software Licensing Table Specification
2092
#define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2095
/// "SPCR" Serial Port Concole Redirection Table
2097
#define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2100
/// "SPMI" Server Platform Management Interface Table
2102
#define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2105
/// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2107
#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2110
/// "TPM2" Trusted Computing Platform 1 Table
2112
#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2115
/// "UEFI" UEFI ACPI Data Table
2117
#define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2120
/// "WAET" Windows ACPI Emulated Devices Table
2122
#define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2125
/// "WDAT" Watchdog Action Table
2127
#define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2130
/// "WDRT" Watchdog Resource Table
2132
#define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2135
/// "WPBT" MS Platform Binary Table
2137
#define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')