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  • Committer: Phil Dennis-Jordan
  • Date: 2017-07-21 08:03:43 UTC
  • mfrom: (1.1.1)
  • Revision ID: phil@philjordan.eu-20170721080343-2yr2vdj7713czahv
New upstream release 2.9.0.

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1
/** @file
 
2
  ACPI 5.1 definitions from the ACPI Specification Revision 5.1 July, 2014.
 
3
 
 
4
  Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
 
5
  Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
 
6
  (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
 
7
  This program and the accompanying materials
 
8
  are licensed and made available under the terms and conditions of the BSD License
 
9
  which accompanies this distribution.  The full text of the license may be found at
 
10
  http://opensource.org/licenses/bsd-license.php
 
11
 
 
12
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 
13
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
14
**/
 
15
 
 
16
#ifndef _ACPI_5_1_H_
 
17
#define _ACPI_5_1_H_
 
18
 
 
19
FILE_LICENCE ( BSD3 );
 
20
 
 
21
#include <ipxe/efi/IndustryStandard/Acpi50.h>
 
22
 
 
23
//
 
24
// Ensure proper structure formats
 
25
//
 
26
#pragma pack(1)
 
27
 
 
28
///
 
29
/// ACPI 5.1 Generic Address Space definition
 
30
///
 
31
typedef struct {
 
32
  UINT8   AddressSpaceId;
 
33
  UINT8   RegisterBitWidth;
 
34
  UINT8   RegisterBitOffset;
 
35
  UINT8   AccessSize;
 
36
  UINT64  Address;
 
37
} EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;
 
38
 
 
39
//
 
40
// Generic Address Space Address IDs
 
41
//
 
42
#define EFI_ACPI_5_1_SYSTEM_MEMORY              0
 
43
#define EFI_ACPI_5_1_SYSTEM_IO                  1
 
44
#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE    2
 
45
#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER        3
 
46
#define EFI_ACPI_5_1_SMBUS                      4
 
47
#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL  0x0A
 
48
#define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE       0x7F
 
49
 
 
50
//
 
51
// Generic Address Space Access Sizes
 
52
//
 
53
#define EFI_ACPI_5_1_UNDEFINED  0
 
54
#define EFI_ACPI_5_1_BYTE       1
 
55
#define EFI_ACPI_5_1_WORD       2
 
56
#define EFI_ACPI_5_1_DWORD      3
 
57
#define EFI_ACPI_5_1_QWORD      4
 
58
 
 
59
//
 
60
// ACPI 5.1 table structures
 
61
//
 
62
 
 
63
///
 
64
/// Root System Description Pointer Structure
 
65
///
 
66
typedef struct {
 
67
  UINT64  Signature;
 
68
  UINT8   Checksum;
 
69
  UINT8   OemId[6];
 
70
  UINT8   Revision;
 
71
  UINT32  RsdtAddress;
 
72
  UINT32  Length;
 
73
  UINT64  XsdtAddress;
 
74
  UINT8   ExtendedChecksum;
 
75
  UINT8   Reserved[3];
 
76
} EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;
 
77
 
 
78
///
 
79
/// RSD_PTR Revision (as defined in ACPI 5.1 spec.)
 
80
///
 
81
#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02  ///< ACPISpec (Revision 5.1) says current value is 2
 
82
 
 
83
///
 
84
/// Common table header, this prefaces all ACPI tables, including FACS, but
 
85
/// excluding the RSD PTR structure
 
86
///
 
87
typedef struct {
 
88
  UINT32  Signature;
 
89
  UINT32  Length;
 
90
} EFI_ACPI_5_1_COMMON_HEADER;
 
91
 
 
92
//
 
93
// Root System Description Table
 
94
// No definition needed as it is a common description table header, the same with
 
95
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
 
96
//
 
97
 
 
98
///
 
99
/// RSDT Revision (as defined in ACPI 5.1 spec.)
 
100
///
 
101
#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
 
102
 
 
103
//
 
104
// Extended System Description Table
 
105
// No definition needed as it is a common description table header, the same with
 
106
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
 
107
//
 
108
 
 
109
///
 
110
/// XSDT Revision (as defined in ACPI 5.1 spec.)
 
111
///
 
112
#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
 
113
 
 
114
///
 
115
/// Fixed ACPI Description Table Structure (FADT)
 
116
///
 
117
typedef struct {
 
118
  EFI_ACPI_DESCRIPTION_HEADER             Header;
 
119
  UINT32                                  FirmwareCtrl;
 
120
  UINT32                                  Dsdt;
 
121
  UINT8                                   Reserved0;
 
122
  UINT8                                   PreferredPmProfile;
 
123
  UINT16                                  SciInt;
 
124
  UINT32                                  SmiCmd;
 
125
  UINT8                                   AcpiEnable;
 
126
  UINT8                                   AcpiDisable;
 
127
  UINT8                                   S4BiosReq;
 
128
  UINT8                                   PstateCnt;
 
129
  UINT32                                  Pm1aEvtBlk;
 
130
  UINT32                                  Pm1bEvtBlk;
 
131
  UINT32                                  Pm1aCntBlk;
 
132
  UINT32                                  Pm1bCntBlk;
 
133
  UINT32                                  Pm2CntBlk;
 
134
  UINT32                                  PmTmrBlk;
 
135
  UINT32                                  Gpe0Blk;
 
136
  UINT32                                  Gpe1Blk;
 
137
  UINT8                                   Pm1EvtLen;
 
138
  UINT8                                   Pm1CntLen;
 
139
  UINT8                                   Pm2CntLen;
 
140
  UINT8                                   PmTmrLen;
 
141
  UINT8                                   Gpe0BlkLen;
 
142
  UINT8                                   Gpe1BlkLen;
 
143
  UINT8                                   Gpe1Base;
 
144
  UINT8                                   CstCnt;
 
145
  UINT16                                  PLvl2Lat;
 
146
  UINT16                                  PLvl3Lat;
 
147
  UINT16                                  FlushSize;
 
148
  UINT16                                  FlushStride;
 
149
  UINT8                                   DutyOffset;
 
150
  UINT8                                   DutyWidth;
 
151
  UINT8                                   DayAlrm;
 
152
  UINT8                                   MonAlrm;
 
153
  UINT8                                   Century;
 
154
  UINT16                                  IaPcBootArch;
 
155
  UINT8                                   Reserved1;
 
156
  UINT32                                  Flags;
 
157
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  ResetReg;
 
158
  UINT8                                   ResetValue;
 
159
  UINT16                                  ArmBootArch;
 
160
  UINT8                                   MinorVersion;
 
161
  UINT64                                  XFirmwareCtrl;
 
162
  UINT64                                  XDsdt;
 
163
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;
 
164
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;
 
165
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;
 
166
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;
 
167
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;
 
168
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;
 
169
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;
 
170
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;
 
171
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  SleepControlReg;
 
172
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  SleepStatusReg;
 
173
} EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;
 
174
 
 
175
///
 
176
/// FADT Version (as defined in ACPI 5.1 spec.)
 
177
///
 
178
#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x05
 
179
#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION  0x01
 
180
 
 
181
//
 
182
// Fixed ACPI Description Table Preferred Power Management Profile
 
183
//
 
184
#define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED         0
 
185
#define EFI_ACPI_5_1_PM_PROFILE_DESKTOP             1
 
186
#define EFI_ACPI_5_1_PM_PROFILE_MOBILE              2
 
187
#define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION         3
 
188
#define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER   4
 
189
#define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER         5
 
190
#define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC        6
 
191
#define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER  7
 
192
#define EFI_ACPI_5_1_PM_PROFILE_TABLET              8
 
193
 
 
194
//
 
195
// Fixed ACPI Description Table Boot Architecture Flags
 
196
// All other bits are reserved and must be set to 0.
 
197
//
 
198
#define EFI_ACPI_5_1_LEGACY_DEVICES              BIT0
 
199
#define EFI_ACPI_5_1_8042                        BIT1
 
200
#define EFI_ACPI_5_1_VGA_NOT_PRESENT             BIT2
 
201
#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED           BIT3
 
202
#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS          BIT4
 
203
#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT        BIT5
 
204
 
 
205
//
 
206
// Fixed ACPI Description Table Arm Boot Architecture Flags
 
207
// All other bits are reserved and must be set to 0.
 
208
//
 
209
#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT              BIT0
 
210
#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC                BIT1
 
211
 
 
212
//
 
213
// Fixed ACPI Description Table Fixed Feature Flags
 
214
// All other bits are reserved and must be set to 0.
 
215
//
 
216
#define EFI_ACPI_5_1_WBINVD                                 BIT0
 
217
#define EFI_ACPI_5_1_WBINVD_FLUSH                           BIT1
 
218
#define EFI_ACPI_5_1_PROC_C1                                BIT2
 
219
#define EFI_ACPI_5_1_P_LVL2_UP                              BIT3
 
220
#define EFI_ACPI_5_1_PWR_BUTTON                             BIT4
 
221
#define EFI_ACPI_5_1_SLP_BUTTON                             BIT5
 
222
#define EFI_ACPI_5_1_FIX_RTC                                BIT6
 
223
#define EFI_ACPI_5_1_RTC_S4                                 BIT7
 
224
#define EFI_ACPI_5_1_TMR_VAL_EXT                            BIT8
 
225
#define EFI_ACPI_5_1_DCK_CAP                                BIT9
 
226
#define EFI_ACPI_5_1_RESET_REG_SUP                          BIT10
 
227
#define EFI_ACPI_5_1_SEALED_CASE                            BIT11
 
228
#define EFI_ACPI_5_1_HEADLESS                               BIT12
 
229
#define EFI_ACPI_5_1_CPU_SW_SLP                             BIT13
 
230
#define EFI_ACPI_5_1_PCI_EXP_WAK                            BIT14
 
231
#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK                     BIT15
 
232
#define EFI_ACPI_5_1_S4_RTC_STS_VALID                       BIT16
 
233
#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE                BIT17
 
234
#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL               BIT18
 
235
#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE   BIT19
 
236
#define EFI_ACPI_5_1_HW_REDUCED_ACPI                        BIT20
 
237
#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE              BIT21
 
238
 
 
239
///
 
240
/// Firmware ACPI Control Structure
 
241
///
 
242
typedef struct {
 
243
  UINT32  Signature;
 
244
  UINT32  Length;
 
245
  UINT32  HardwareSignature;
 
246
  UINT32  FirmwareWakingVector;
 
247
  UINT32  GlobalLock;
 
248
  UINT32  Flags;
 
249
  UINT64  XFirmwareWakingVector;
 
250
  UINT8   Version;
 
251
  UINT8   Reserved0[3];
 
252
  UINT32  OspmFlags;
 
253
  UINT8   Reserved1[24];
 
254
} EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;
 
255
 
 
256
///
 
257
/// FACS Version (as defined in ACPI 5.1 spec.)
 
258
///
 
259
#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x02
 
260
 
 
261
///
 
262
/// Firmware Control Structure Feature Flags
 
263
/// All other bits are reserved and must be set to 0.
 
264
///
 
265
#define EFI_ACPI_5_1_S4BIOS_F                     BIT0
 
266
#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F       BIT1
 
267
 
 
268
///
 
269
/// OSPM Enabled Firmware Control Structure Flags
 
270
/// All other bits are reserved and must be set to 0.
 
271
///
 
272
#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F            BIT0
 
273
 
 
274
//
 
275
// Differentiated System Description Table,
 
276
// Secondary System Description Table
 
277
// and Persistent System Description Table,
 
278
// no definition needed as they are common description table header, the same with
 
279
// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
 
280
//
 
281
#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION   0x02
 
282
#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION        0x02
 
283
 
 
284
///
 
285
/// Multiple APIC Description Table header definition.  The rest of the table
 
286
/// must be defined in a platform specific manner.
 
287
///
 
288
typedef struct {
 
289
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
290
  UINT32                      LocalApicAddress;
 
291
  UINT32                      Flags;
 
292
} EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
 
293
 
 
294
///
 
295
/// MADT Revision (as defined in ACPI 5.1 spec.)
 
296
///
 
297
#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
 
298
 
 
299
///
 
300
/// Multiple APIC Flags
 
301
/// All other bits are reserved and must be set to 0.
 
302
///
 
303
#define EFI_ACPI_5_1_PCAT_COMPAT         BIT0
 
304
 
 
305
//
 
306
// Multiple APIC Description Table APIC structure types
 
307
// All other values between 0x0D and 0x7F are reserved and
 
308
// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
 
309
//
 
310
#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC           0x00
 
311
#define EFI_ACPI_5_1_IO_APIC                        0x01
 
312
#define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE      0x02
 
313
#define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE  0x03
 
314
#define EFI_ACPI_5_1_LOCAL_APIC_NMI                 0x04
 
315
#define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE    0x05
 
316
#define EFI_ACPI_5_1_IO_SAPIC                       0x06
 
317
#define EFI_ACPI_5_1_LOCAL_SAPIC                    0x07
 
318
#define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES     0x08
 
319
#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC         0x09
 
320
#define EFI_ACPI_5_1_LOCAL_X2APIC_NMI               0x0A
 
321
#define EFI_ACPI_5_1_GIC                            0x0B
 
322
#define EFI_ACPI_5_1_GICD                           0x0C
 
323
#define EFI_ACPI_5_1_GIC_MSI_FRAME                  0x0D
 
324
#define EFI_ACPI_5_1_GICR                           0x0E
 
325
 
 
326
//
 
327
// APIC Structure Definitions
 
328
//
 
329
 
 
330
///
 
331
/// Processor Local APIC Structure Definition
 
332
///
 
333
typedef struct {
 
334
  UINT8   Type;
 
335
  UINT8   Length;
 
336
  UINT8   AcpiProcessorId;
 
337
  UINT8   ApicId;
 
338
  UINT32  Flags;
 
339
} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;
 
340
 
 
341
///
 
342
/// Local APIC Flags.  All other bits are reserved and must be 0.
 
343
///
 
344
#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED        BIT0
 
345
 
 
346
///
 
347
/// IO APIC Structure
 
348
///
 
349
typedef struct {
 
350
  UINT8   Type;
 
351
  UINT8   Length;
 
352
  UINT8   IoApicId;
 
353
  UINT8   Reserved;
 
354
  UINT32  IoApicAddress;
 
355
  UINT32  GlobalSystemInterruptBase;
 
356
} EFI_ACPI_5_1_IO_APIC_STRUCTURE;
 
357
 
 
358
///
 
359
/// Interrupt Source Override Structure
 
360
///
 
361
typedef struct {
 
362
  UINT8   Type;
 
363
  UINT8   Length;
 
364
  UINT8   Bus;
 
365
  UINT8   Source;
 
366
  UINT32  GlobalSystemInterrupt;
 
367
  UINT16  Flags;
 
368
} EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
 
369
 
 
370
///
 
371
/// Platform Interrupt Sources Structure Definition
 
372
///
 
373
typedef struct {
 
374
  UINT8   Type;
 
375
  UINT8   Length;
 
376
  UINT16  Flags;
 
377
  UINT8   InterruptType;
 
378
  UINT8   ProcessorId;
 
379
  UINT8   ProcessorEid;
 
380
  UINT8   IoSapicVector;
 
381
  UINT32  GlobalSystemInterrupt;
 
382
  UINT32  PlatformInterruptSourceFlags;
 
383
  UINT8   CpeiProcessorOverride;
 
384
  UINT8   Reserved[31];
 
385
} EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;
 
386
 
 
387
//
 
388
// MPS INTI flags.
 
389
// All other bits are reserved and must be set to 0.
 
390
//
 
391
#define EFI_ACPI_5_1_POLARITY      (3 << 0)
 
392
#define EFI_ACPI_5_1_TRIGGER_MODE  (3 << 2)
 
393
 
 
394
///
 
395
/// Non-Maskable Interrupt Source Structure
 
396
///
 
397
typedef struct {
 
398
  UINT8   Type;
 
399
  UINT8   Length;
 
400
  UINT16  Flags;
 
401
  UINT32  GlobalSystemInterrupt;
 
402
} EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
 
403
 
 
404
///
 
405
/// Local APIC NMI Structure
 
406
///
 
407
typedef struct {
 
408
  UINT8   Type;
 
409
  UINT8   Length;
 
410
  UINT8   AcpiProcessorId;
 
411
  UINT16  Flags;
 
412
  UINT8   LocalApicLint;
 
413
} EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;
 
414
 
 
415
///
 
416
/// Local APIC Address Override Structure
 
417
///
 
418
typedef struct {
 
419
  UINT8   Type;
 
420
  UINT8   Length;
 
421
  UINT16  Reserved;
 
422
  UINT64  LocalApicAddress;
 
423
} EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
 
424
 
 
425
///
 
426
/// IO SAPIC Structure
 
427
///
 
428
typedef struct {
 
429
  UINT8   Type;
 
430
  UINT8   Length;
 
431
  UINT8   IoApicId;
 
432
  UINT8   Reserved;
 
433
  UINT32  GlobalSystemInterruptBase;
 
434
  UINT64  IoSapicAddress;
 
435
} EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;
 
436
 
 
437
///
 
438
/// Local SAPIC Structure
 
439
/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
 
440
///
 
441
typedef struct {
 
442
  UINT8   Type;
 
443
  UINT8   Length;
 
444
  UINT8   AcpiProcessorId;
 
445
  UINT8   LocalSapicId;
 
446
  UINT8   LocalSapicEid;
 
447
  UINT8   Reserved[3];
 
448
  UINT32  Flags;
 
449
  UINT32  ACPIProcessorUIDValue;
 
450
} EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
 
451
 
 
452
///
 
453
/// Platform Interrupt Sources Structure
 
454
///
 
455
typedef struct {
 
456
  UINT8   Type;
 
457
  UINT8   Length;
 
458
  UINT16  Flags;
 
459
  UINT8   InterruptType;
 
460
  UINT8   ProcessorId;
 
461
  UINT8   ProcessorEid;
 
462
  UINT8   IoSapicVector;
 
463
  UINT32  GlobalSystemInterrupt;
 
464
  UINT32  PlatformInterruptSourceFlags;
 
465
} EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
 
466
 
 
467
///
 
468
/// Platform Interrupt Source Flags.
 
469
/// All other bits are reserved and must be set to 0.
 
470
///
 
471
#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE          BIT0
 
472
 
 
473
///
 
474
/// Processor Local x2APIC Structure Definition
 
475
///
 
476
typedef struct {
 
477
  UINT8   Type;
 
478
  UINT8   Length;
 
479
  UINT8   Reserved[2];
 
480
  UINT32  X2ApicId;
 
481
  UINT32  Flags;
 
482
  UINT32  AcpiProcessorUid;
 
483
} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
 
484
 
 
485
///
 
486
/// Local x2APIC NMI Structure
 
487
///
 
488
typedef struct {
 
489
  UINT8   Type;
 
490
  UINT8   Length;
 
491
  UINT16  Flags;
 
492
  UINT32  AcpiProcessorUid;
 
493
  UINT8   LocalX2ApicLint;
 
494
  UINT8   Reserved[3];
 
495
} EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;
 
496
 
 
497
///
 
498
/// GIC Structure
 
499
///
 
500
typedef struct {
 
501
  UINT8   Type;
 
502
  UINT8   Length;
 
503
  UINT16  Reserved;
 
504
  UINT32  CPUInterfaceNumber;
 
505
  UINT32  AcpiProcessorUid;
 
506
  UINT32  Flags;
 
507
  UINT32  ParkingProtocolVersion;
 
508
  UINT32  PerformanceInterruptGsiv;
 
509
  UINT64  ParkedAddress;
 
510
  UINT64  PhysicalBaseAddress;
 
511
  UINT64  GICV;
 
512
  UINT64  GICH;
 
513
  UINT32  VGICMaintenanceInterrupt;
 
514
  UINT64  GICRBaseAddress;
 
515
  UINT64  MPIDR;
 
516
} EFI_ACPI_5_1_GIC_STRUCTURE;
 
517
 
 
518
///
 
519
/// GIC Flags.  All other bits are reserved and must be 0.
 
520
///
 
521
#define EFI_ACPI_5_1_GIC_ENABLED                              BIT0
 
522
#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL              BIT1
 
523
#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS    BIT2
 
524
 
 
525
///
 
526
/// GIC Distributor Structure
 
527
///
 
528
typedef struct {
 
529
  UINT8   Type;
 
530
  UINT8   Length;
 
531
  UINT16  Reserved1;
 
532
  UINT32  GicId;
 
533
  UINT64  PhysicalBaseAddress;
 
534
  UINT32  SystemVectorBase;
 
535
  UINT8   GicVersion;
 
536
  UINT8   Reserved2[3];
 
537
} EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;
 
538
 
 
539
///
 
540
/// GIC Version
 
541
///
 
542
#define EFI_ACPI_5_1_GIC_V2                                   0x01
 
543
#define EFI_ACPI_5_1_GIC_V2m                                  0x02
 
544
#define EFI_ACPI_5_1_GIC_V3                                   0x03
 
545
#define EFI_ACPI_5_1_GIC_V4                                   0x04
 
546
 
 
547
///
 
548
/// GIC MSI Frame Structure
 
549
///
 
550
typedef struct {
 
551
  UINT8   Type;
 
552
  UINT8   Length;
 
553
  UINT16  Reserved1;
 
554
  UINT32  GicMsiFrameId;
 
555
  UINT64  PhysicalBaseAddress;
 
556
  UINT32  Flags;
 
557
  UINT16  SPICount;
 
558
  UINT16  SPIBase;
 
559
} EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;
 
560
 
 
561
///
 
562
/// GIC MSI Frame Flags.  All other bits are reserved and must be 0.
 
563
///
 
564
#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT                    BIT0
 
565
 
 
566
///
 
567
/// GICR Structure
 
568
///
 
569
typedef struct {
 
570
  UINT8   Type;
 
571
  UINT8   Length;
 
572
  UINT16  Reserved;
 
573
  UINT64  DiscoveryRangeBaseAddress;
 
574
  UINT32  DiscoveryRangeLength;
 
575
} EFI_ACPI_5_1_GICR_STRUCTURE;
 
576
 
 
577
///
 
578
/// Smart Battery Description Table (SBST)
 
579
///
 
580
typedef struct {
 
581
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
582
  UINT32                      WarningEnergyLevel;
 
583
  UINT32                      LowEnergyLevel;
 
584
  UINT32                      CriticalEnergyLevel;
 
585
} EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;
 
586
 
 
587
///
 
588
/// SBST Version (as defined in ACPI 5.1 spec.)
 
589
///
 
590
#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
 
591
 
 
592
///
 
593
/// Embedded Controller Boot Resources Table (ECDT)
 
594
/// The table is followed by a null terminated ASCII string that contains
 
595
/// a fully qualified reference to the name space object.
 
596
///
 
597
typedef struct {
 
598
  EFI_ACPI_DESCRIPTION_HEADER             Header;
 
599
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  EcControl;
 
600
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  EcData;
 
601
  UINT32                                  Uid;
 
602
  UINT8                                   GpeBit;
 
603
} EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
 
604
 
 
605
///
 
606
/// ECDT Version (as defined in ACPI 5.1 spec.)
 
607
///
 
608
#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01
 
609
 
 
610
///
 
611
/// System Resource Affinity Table (SRAT).  The rest of the table
 
612
/// must be defined in a platform specific manner.
 
613
///
 
614
typedef struct {
 
615
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
616
  UINT32                      Reserved1;  ///< Must be set to 1
 
617
  UINT64                      Reserved2;
 
618
} EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
 
619
 
 
620
///
 
621
/// SRAT Version (as defined in ACPI 5.1 spec.)
 
622
///
 
623
#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION  0x03
 
624
 
 
625
//
 
626
// SRAT structure types.
 
627
// All other values between 0x04 an 0xFF are reserved and
 
628
// will be ignored by OSPM.
 
629
//
 
630
#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY  0x00
 
631
#define EFI_ACPI_5_1_MEMORY_AFFINITY                      0x01
 
632
#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY      0x02
 
633
#define EFI_ACPI_5_1_GICC_AFFINITY                        0x03
 
634
 
 
635
///
 
636
/// Processor Local APIC/SAPIC Affinity Structure Definition
 
637
///
 
638
typedef struct {
 
639
  UINT8   Type;
 
640
  UINT8   Length;
 
641
  UINT8   ProximityDomain7To0;
 
642
  UINT8   ApicId;
 
643
  UINT32  Flags;
 
644
  UINT8   LocalSapicEid;
 
645
  UINT8   ProximityDomain31To8[3];
 
646
  UINT32  ClockDomain;
 
647
} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
 
648
 
 
649
///
 
650
/// Local APIC/SAPIC Flags.  All other bits are reserved and must be 0.
 
651
///
 
652
#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
 
653
 
 
654
///
 
655
/// Memory Affinity Structure Definition
 
656
///
 
657
typedef struct {
 
658
  UINT8   Type;
 
659
  UINT8   Length;
 
660
  UINT32  ProximityDomain;
 
661
  UINT16  Reserved1;
 
662
  UINT32  AddressBaseLow;
 
663
  UINT32  AddressBaseHigh;
 
664
  UINT32  LengthLow;
 
665
  UINT32  LengthHigh;
 
666
  UINT32  Reserved2;
 
667
  UINT32  Flags;
 
668
  UINT64  Reserved3;
 
669
} EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;
 
670
 
 
671
//
 
672
// Memory Flags.  All other bits are reserved and must be 0.
 
673
//
 
674
#define EFI_ACPI_5_1_MEMORY_ENABLED       (1 << 0)
 
675
#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
 
676
#define EFI_ACPI_5_1_MEMORY_NONVOLATILE   (1 << 2)
 
677
 
 
678
///
 
679
/// Processor Local x2APIC Affinity Structure Definition
 
680
///
 
681
typedef struct {
 
682
  UINT8   Type;
 
683
  UINT8   Length;
 
684
  UINT8   Reserved1[2];
 
685
  UINT32  ProximityDomain;
 
686
  UINT32  X2ApicId;
 
687
  UINT32  Flags;
 
688
  UINT32  ClockDomain;
 
689
  UINT8   Reserved2[4];
 
690
} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
 
691
 
 
692
///
 
693
/// GICC Affinity Structure Definition
 
694
///
 
695
typedef struct {
 
696
  UINT8   Type;
 
697
  UINT8   Length;
 
698
  UINT32  ProximityDomain;
 
699
  UINT32  AcpiProcessorUid;
 
700
  UINT32  Flags;
 
701
  UINT32  ClockDomain;
 
702
} EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;
 
703
 
 
704
///
 
705
/// GICC Flags.  All other bits are reserved and must be 0.
 
706
///
 
707
#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)
 
708
 
 
709
///
 
710
/// System Locality Distance Information Table (SLIT).
 
711
/// The rest of the table is a matrix.
 
712
///
 
713
typedef struct {
 
714
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
715
  UINT64                      NumberOfSystemLocalities;
 
716
} EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
 
717
 
 
718
///
 
719
/// SLIT Version (as defined in ACPI 5.1 spec.)
 
720
///
 
721
#define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION  0x01
 
722
 
 
723
///
 
724
/// Corrected Platform Error Polling Table (CPEP)
 
725
///
 
726
typedef struct {
 
727
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
728
  UINT8                       Reserved[8];
 
729
} EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
 
730
 
 
731
///
 
732
/// CPEP Version (as defined in ACPI 5.1 spec.)
 
733
///
 
734
#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
 
735
 
 
736
//
 
737
// CPEP processor structure types.
 
738
//
 
739
#define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC  0x00
 
740
 
 
741
///
 
742
/// Corrected Platform Error Polling Processor Structure Definition
 
743
///
 
744
typedef struct {
 
745
  UINT8   Type;
 
746
  UINT8   Length;
 
747
  UINT8   ProcessorId;
 
748
  UINT8   ProcessorEid;
 
749
  UINT32  PollingInterval;
 
750
} EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
 
751
 
 
752
///
 
753
/// Maximum System Characteristics Table (MSCT)
 
754
///
 
755
typedef struct {
 
756
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
757
  UINT32                      OffsetProxDomInfo;
 
758
  UINT32                      MaximumNumberOfProximityDomains;
 
759
  UINT32                      MaximumNumberOfClockDomains;
 
760
  UINT64                      MaximumPhysicalAddress;
 
761
} EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
 
762
 
 
763
///
 
764
/// MSCT Version (as defined in ACPI 5.1 spec.)
 
765
///
 
766
#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
 
767
 
 
768
///
 
769
/// Maximum Proximity Domain Information Structure Definition
 
770
///
 
771
typedef struct {
 
772
  UINT8   Revision;
 
773
  UINT8   Length;
 
774
  UINT32  ProximityDomainRangeLow;
 
775
  UINT32  ProximityDomainRangeHigh;
 
776
  UINT32  MaximumProcessorCapacity;
 
777
  UINT64  MaximumMemoryCapacity;
 
778
} EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
 
779
 
 
780
///
 
781
/// ACPI RAS Feature Table definition.
 
782
///
 
783
typedef struct {
 
784
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
785
  UINT8                       PlatformCommunicationChannelIdentifier[12];
 
786
} EFI_ACPI_5_1_RAS_FEATURE_TABLE;
 
787
 
 
788
///
 
789
/// RASF Version (as defined in ACPI 5.1 spec.)
 
790
///
 
791
#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
 
792
 
 
793
///
 
794
/// ACPI RASF Platform Communication Channel Shared Memory Region definition.
 
795
///
 
796
typedef struct {
 
797
  UINT32                      Signature;
 
798
  UINT16                      Command;
 
799
  UINT16                      Status;
 
800
  UINT16                      Version;
 
801
  UINT8                       RASCapabilities[16];
 
802
  UINT8                       SetRASCapabilities[16];
 
803
  UINT16                      NumberOfRASFParameterBlocks;
 
804
  UINT32                      SetRASCapabilitiesStatus;
 
805
} EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
 
806
 
 
807
///
 
808
/// ACPI RASF PCC command code
 
809
///
 
810
#define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND  0x01
 
811
 
 
812
///
 
813
/// ACPI RASF Platform RAS Capabilities
 
814
///
 
815
#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED                          0x01
 
816
#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE  0x02
 
817
 
 
818
///
 
819
/// ACPI RASF Parameter Block structure for PATROL_SCRUB
 
820
///
 
821
typedef struct {
 
822
  UINT16                      Type;
 
823
  UINT16                      Version;
 
824
  UINT16                      Length;
 
825
  UINT16                      PatrolScrubCommand;
 
826
  UINT64                      RequestedAddressRange[2];
 
827
  UINT64                      ActualAddressRange[2];
 
828
  UINT16                      Flags;
 
829
  UINT8                       RequestedSpeed;
 
830
} EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
 
831
 
 
832
///
 
833
/// ACPI RASF Patrol Scrub command
 
834
///
 
835
#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS   0x01
 
836
#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER   0x02
 
837
#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER    0x03
 
838
 
 
839
///
 
840
/// Memory Power State Table definition.
 
841
///
 
842
typedef struct {
 
843
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
844
  UINT8                       PlatformCommunicationChannelIdentifier;
 
845
  UINT8                       Reserved[3];
 
846
// Memory Power Node Structure
 
847
// Memory Power State Characteristics
 
848
} EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;
 
849
 
 
850
///
 
851
/// MPST Version (as defined in ACPI 5.1 spec.)
 
852
///
 
853
#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
 
854
 
 
855
///
 
856
/// MPST Platform Communication Channel Shared Memory Region definition.
 
857
///
 
858
typedef struct {
 
859
  UINT32                      Signature;
 
860
  UINT16                      Command;
 
861
  UINT16                      Status;
 
862
  UINT32                      MemoryPowerCommandRegister;
 
863
  UINT32                      MemoryPowerStatusRegister;
 
864
  UINT32                      PowerStateId;
 
865
  UINT32                      MemoryPowerNodeId;
 
866
  UINT64                      MemoryEnergyConsumed;
 
867
  UINT64                      ExpectedAveragePowerComsuned;
 
868
} EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
 
869
 
 
870
///
 
871
/// ACPI MPST PCC command code
 
872
///
 
873
#define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND  0x03
 
874
 
 
875
///
 
876
/// ACPI MPST Memory Power command
 
877
///
 
878
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE       0x01
 
879
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE       0x02
 
880
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED   0x03
 
881
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED   0x04
 
882
 
 
883
///
 
884
/// MPST Memory Power Node Table
 
885
///
 
886
typedef struct {
 
887
  UINT8                                             PowerStateValue;
 
888
  UINT8                                             PowerStateInformationIndex;
 
889
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;
 
890
 
 
891
typedef struct {
 
892
  UINT8                                             Flag;
 
893
  UINT8                                             Reserved;
 
894
  UINT16                                            MemoryPowerNodeId;
 
895
  UINT32                                            Length;
 
896
  UINT64                                            AddressBase;
 
897
  UINT64                                            AddressLength;
 
898
  UINT32                                            NumberOfPowerStates;
 
899
  UINT32                                            NumberOfPhysicalComponents;
 
900
//EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE              MemoryPowerState[NumberOfPowerStates];
 
901
//UINT16                                            PhysicalComponentIdentifier[NumberOfPhysicalComponents];
 
902
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;
 
903
 
 
904
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE          0x01
 
905
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED   0x02
 
906
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE   0x04
 
907
 
 
908
typedef struct {
 
909
  UINT16                      MemoryPowerNodeCount;
 
910
  UINT8                       Reserved[2];
 
911
} EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;
 
912
 
 
913
///
 
914
/// MPST Memory Power State Characteristics Table
 
915
///
 
916
typedef struct {
 
917
  UINT8                                             PowerStateStructureID;
 
918
  UINT8                                             Flag;
 
919
  UINT16                                            Reserved;
 
920
  UINT32                                            AveragePowerConsumedInMPS0;
 
921
  UINT32                                            RelativePowerSavingToMPS0;
 
922
  UINT64                                            ExitLatencyToMPS0;
 
923
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
 
924
 
 
925
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED              0x01
 
926
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY   0x02
 
927
#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT    0x04
 
928
 
 
929
typedef struct {
 
930
  UINT16                      MemoryPowerStateCharacteristicsCount;
 
931
  UINT8                       Reserved[2];
 
932
} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
 
933
 
 
934
///
 
935
/// Memory Topology Table definition.
 
936
///
 
937
typedef struct {
 
938
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
939
  UINT32                      Reserved;
 
940
} EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;
 
941
 
 
942
///
 
943
/// PMTT Version (as defined in ACPI 5.1 spec.)
 
944
///
 
945
#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
 
946
 
 
947
///
 
948
/// Common Memory Aggregator Device Structure.
 
949
///
 
950
typedef struct {
 
951
  UINT8                       Type;
 
952
  UINT8                       Reserved;
 
953
  UINT16                      Length;
 
954
  UINT16                      Flags;
 
955
  UINT16                      Reserved1;
 
956
} EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 
957
 
 
958
///
 
959
/// Memory Aggregator Device Type
 
960
///
 
961
#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET            0x1
 
962
#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
 
963
#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM              0x3
 
964
 
 
965
///
 
966
/// Socket Memory Aggregator Device Structure.
 
967
///
 
968
typedef struct {
 
969
  EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  Header;
 
970
  UINT16                                                       SocketIdentifier;
 
971
  UINT16                                                       Reserved;
 
972
//EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  MemoryController[];
 
973
} EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 
974
 
 
975
///
 
976
/// MemoryController Memory Aggregator Device Structure.
 
977
///
 
978
typedef struct {
 
979
  EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  Header;
 
980
  UINT32                                                       ReadLatency;
 
981
  UINT32                                                       WriteLatency;
 
982
  UINT32                                                       ReadBandwidth;
 
983
  UINT32                                                       WriteBandwidth;
 
984
  UINT16                                                       OptimalAccessUnit;
 
985
  UINT16                                                       OptimalAccessAlignment;
 
986
  UINT16                                                       Reserved;
 
987
  UINT16                                                       NumberOfProximityDomains;
 
988
//UINT32                                                       ProximityDomain[NumberOfProximityDomains];
 
989
//EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE    PhysicalComponent[];
 
990
} EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 
991
 
 
992
///
 
993
/// DIMM Memory Aggregator Device Structure.
 
994
///
 
995
typedef struct {
 
996
  EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  Header;
 
997
  UINT16                                                       PhysicalComponentIdentifier;
 
998
  UINT16                                                       Reserved;
 
999
  UINT32                                                       SizeOfDimm;
 
1000
  UINT32                                                       SmbiosHandle;
 
1001
} EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 
1002
 
 
1003
///
 
1004
/// Boot Graphics Resource Table definition.
 
1005
///
 
1006
typedef struct {
 
1007
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
1008
  ///
 
1009
  /// 2-bytes (16 bit) version ID. This value must be 1.
 
1010
  ///
 
1011
  UINT16                      Version;
 
1012
  ///
 
1013
  /// 1-byte status field indicating current status about the table.
 
1014
  ///     Bits[7:1] = Reserved (must be zero)
 
1015
  ///     Bit [0] = Valid. A one indicates the boot image graphic is valid.
 
1016
  ///
 
1017
  UINT8                       Status;
 
1018
  ///
 
1019
  /// 1-byte enumerated type field indicating format of the image.
 
1020
  ///     0 = Bitmap
 
1021
  ///     1 - 255  Reserved (for future use)
 
1022
  ///
 
1023
  UINT8                       ImageType;
 
1024
  ///
 
1025
  /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
 
1026
  /// of the image bitmap.
 
1027
  ///
 
1028
  UINT64                      ImageAddress;
 
1029
  ///
 
1030
  /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
 
1031
  /// (X, Y) display offset of the top left corner of the boot image.
 
1032
  /// The top left corner of the display is at offset (0, 0).
 
1033
  ///
 
1034
  UINT32                      ImageOffsetX;
 
1035
  ///
 
1036
  /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
 
1037
  /// (X, Y) display offset of the top left corner of the boot image.
 
1038
  /// The top left corner of the display is at offset (0, 0).
 
1039
  ///
 
1040
  UINT32                      ImageOffsetY;
 
1041
} EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;
 
1042
 
 
1043
///
 
1044
/// BGRT Revision
 
1045
///
 
1046
#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
 
1047
 
 
1048
///
 
1049
/// BGRT Version
 
1050
///
 
1051
#define EFI_ACPI_5_1_BGRT_VERSION         0x01
 
1052
 
 
1053
///
 
1054
/// BGRT Status
 
1055
///
 
1056
#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
 
1057
#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED     0x01
 
1058
 
 
1059
///
 
1060
/// BGRT Image Type
 
1061
///
 
1062
#define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP  0x00
 
1063
 
 
1064
///
 
1065
/// FPDT Version (as defined in ACPI 5.1 spec.)
 
1066
///
 
1067
#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
 
1068
 
 
1069
///
 
1070
/// FPDT Performance Record Types
 
1071
///
 
1072
#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER      0x0000
 
1073
#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER     0x0001
 
1074
 
 
1075
///
 
1076
/// FPDT Performance Record Revision
 
1077
///
 
1078
#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER  0x01
 
1079
#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
 
1080
 
 
1081
///
 
1082
/// FPDT Runtime Performance Record Types
 
1083
///
 
1084
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME                0x0000
 
1085
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND               0x0001
 
1086
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT      0x0002
 
1087
 
 
1088
///
 
1089
/// FPDT Runtime Performance Record Revision
 
1090
///
 
1091
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME            0x01
 
1092
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND           0x01
 
1093
#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT  0x02
 
1094
 
 
1095
///
 
1096
/// FPDT Performance Record header
 
1097
///
 
1098
typedef struct {
 
1099
  UINT16           Type;
 
1100
  UINT8            Length;
 
1101
  UINT8            Revision;
 
1102
} EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;
 
1103
 
 
1104
///
 
1105
/// FPDT Performance Table header
 
1106
///
 
1107
typedef struct {
 
1108
  UINT32  Signature;
 
1109
  UINT32  Length;
 
1110
} EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;
 
1111
 
 
1112
///
 
1113
/// FPDT Firmware Basic Boot Performance Pointer Record Structure
 
1114
///
 
1115
typedef struct {
 
1116
  EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
 
1117
  UINT32                                          Reserved;
 
1118
  ///
 
1119
  /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
 
1120
  ///
 
1121
  UINT64                                          BootPerformanceTablePointer;
 
1122
} EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
 
1123
 
 
1124
///
 
1125
/// FPDT S3 Performance Table Pointer Record Structure
 
1126
///
 
1127
typedef struct {
 
1128
  EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
 
1129
  UINT32                                          Reserved;
 
1130
  ///
 
1131
  /// 64-bit processor-relative physical address of the S3 Performance Table.
 
1132
  ///
 
1133
  UINT64                                          S3PerformanceTablePointer;
 
1134
} EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
 
1135
 
 
1136
///
 
1137
/// FPDT Firmware Basic Boot Performance Record Structure
 
1138
///
 
1139
typedef struct {
 
1140
  EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
 
1141
  UINT32                                          Reserved;
 
1142
  ///
 
1143
  /// Timer value logged at the beginning of firmware image execution.
 
1144
  /// This may not always be zero or near zero.
 
1145
  ///
 
1146
  UINT64                                          ResetEnd;
 
1147
  ///
 
1148
  /// Timer value logged just prior to loading the OS boot loader into memory.
 
1149
  /// For non-UEFI compatible boots, this field must be zero.
 
1150
  ///
 
1151
  UINT64                                          OsLoaderLoadImageStart;
 
1152
  ///
 
1153
  /// Timer value logged just prior to launching the previously loaded OS boot loader image.
 
1154
  /// For non-UEFI compatible boots, the timer value logged will be just prior
 
1155
  /// to the INT 19h handler invocation.
 
1156
  ///
 
1157
  UINT64                                          OsLoaderStartImageStart;
 
1158
  ///
 
1159
  /// Timer value logged at the point when the OS loader calls the
 
1160
  /// ExitBootServices function for UEFI compatible firmware.
 
1161
  /// For non-UEFI compatible boots, this field must be zero.
 
1162
  ///
 
1163
  UINT64                                          ExitBootServicesEntry;
 
1164
  ///
 
1165
  /// Timer value logged at the point just prior towhen the OS loader gaining
 
1166
  /// control back from calls the ExitBootServices function for UEFI compatible firmware.
 
1167
  /// For non-UEFI compatible boots, this field must be zero.
 
1168
  ///
 
1169
  UINT64                                          ExitBootServicesExit;
 
1170
} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
 
1171
 
 
1172
///
 
1173
/// FPDT Firmware Basic Boot Performance Table signature
 
1174
///
 
1175
#define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE  SIGNATURE_32('F', 'B', 'P', 'T')
 
1176
 
 
1177
//
 
1178
// FPDT Firmware Basic Boot Performance Table
 
1179
//
 
1180
typedef struct {
 
1181
  EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER      Header;
 
1182
  //
 
1183
  // one or more Performance Records.
 
1184
  //
 
1185
} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
 
1186
 
 
1187
///
 
1188
/// FPDT "S3PT" S3 Performance Table
 
1189
///
 
1190
#define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE  SIGNATURE_32('S', '3', 'P', 'T')
 
1191
 
 
1192
//
 
1193
// FPDT Firmware S3 Boot Performance Table
 
1194
//
 
1195
typedef struct {
 
1196
  EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER      Header;
 
1197
  //
 
1198
  // one or more Performance Records.
 
1199
  //
 
1200
} EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;
 
1201
 
 
1202
///
 
1203
/// FPDT Basic S3 Resume Performance Record
 
1204
///
 
1205
typedef struct {
 
1206
  EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
 
1207
  ///
 
1208
  /// A count of the number of S3 resume cycles since the last full boot sequence.
 
1209
  ///
 
1210
  UINT32                                          ResumeCount;
 
1211
  ///
 
1212
  /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
 
1213
  /// OS waking vector. Only the most recent resume cycle's time is retained.
 
1214
  ///
 
1215
  UINT64                                          FullResume;
 
1216
  ///
 
1217
  /// Average timer value of all resume cycles logged since the last full boot
 
1218
  /// sequence, including the most recent resume.  Note that the entire log of
 
1219
  /// timer values does not need to be retained in order to calculate this average.
 
1220
  ///
 
1221
  UINT64                                          AverageResume;
 
1222
} EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;
 
1223
 
 
1224
///
 
1225
/// FPDT Basic S3 Suspend Performance Record
 
1226
///
 
1227
typedef struct {
 
1228
  EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
 
1229
  ///
 
1230
  /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
 
1231
  /// Only the most recent suspend cycle's timer value is retained.
 
1232
  ///
 
1233
  UINT64                                          SuspendStart;
 
1234
  ///
 
1235
  /// Timer value recorded at the final firmware write to SLP_TYP (or other
 
1236
  /// mechanism) used to trigger hardware entry to S3.
 
1237
  /// Only the most recent suspend cycle's timer value is retained.
 
1238
  ///
 
1239
  UINT64                                          SuspendEnd;
 
1240
} EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;
 
1241
 
 
1242
///
 
1243
/// Firmware Performance Record Table definition.
 
1244
///
 
1245
typedef struct {
 
1246
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
1247
} EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;
 
1248
 
 
1249
///
 
1250
/// Generic Timer Description Table definition.
 
1251
///
 
1252
typedef struct {
 
1253
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
1254
  UINT64                      CntControlBasePhysicalAddress;
 
1255
  UINT32                      Reserved;
 
1256
  UINT32                      SecurePL1TimerGSIV;
 
1257
  UINT32                      SecurePL1TimerFlags;
 
1258
  UINT32                      NonSecurePL1TimerGSIV;
 
1259
  UINT32                      NonSecurePL1TimerFlags;
 
1260
  UINT32                      VirtualTimerGSIV;
 
1261
  UINT32                      VirtualTimerFlags;
 
1262
  UINT32                      NonSecurePL2TimerGSIV;
 
1263
  UINT32                      NonSecurePL2TimerFlags;
 
1264
  UINT64                      CntReadBasePhysicalAddress;
 
1265
  UINT32                      PlatformTimerCount;
 
1266
  UINT32                      PlatformTimerOffset;
 
1267
} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;
 
1268
 
 
1269
///
 
1270
/// GTDT Version (as defined in ACPI 5.1 spec.)
 
1271
///
 
1272
#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
 
1273
 
 
1274
///
 
1275
/// Timer Flags.  All other bits are reserved and must be 0.
 
1276
///
 
1277
#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE          BIT0
 
1278
#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY      BIT1
 
1279
#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY          BIT2
 
1280
 
 
1281
///
 
1282
/// Platform Timer Type
 
1283
///
 
1284
#define EFI_ACPI_5_1_GTDT_GT_BLOCK                       0
 
1285
#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG          1
 
1286
 
 
1287
///
 
1288
/// GT Block Structure
 
1289
///
 
1290
typedef struct {
 
1291
  UINT8   Type;
 
1292
  UINT16  Length;
 
1293
  UINT8   Reserved;
 
1294
  UINT64  CntCtlBase;
 
1295
  UINT32  GTBlockTimerCount;
 
1296
  UINT32  GTBlockTimerOffset;
 
1297
} EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;
 
1298
 
 
1299
///
 
1300
/// GT Block Timer Structure
 
1301
///
 
1302
typedef struct {
 
1303
  UINT8   GTFrameNumber;
 
1304
  UINT8   Reserved[3];
 
1305
  UINT64  CntBaseX;
 
1306
  UINT64  CntEL0BaseX;
 
1307
  UINT32  GTxPhysicalTimerGSIV;
 
1308
  UINT32  GTxPhysicalTimerFlags;
 
1309
  UINT32  GTxVirtualTimerGSIV;
 
1310
  UINT32  GTxVirtualTimerFlags;
 
1311
  UINT32  GTxCommonFlags;
 
1312
} EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;
 
1313
 
 
1314
///
 
1315
/// GT Block Physical Timers and Virtual Timers Flags.  All other bits are reserved and must be 0.
 
1316
///
 
1317
#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE          BIT0
 
1318
#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY      BIT1
 
1319
 
 
1320
///
 
1321
/// Common Flags Flags.  All other bits are reserved and must be 0.
 
1322
///
 
1323
#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER              BIT0
 
1324
#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY      BIT1
 
1325
 
 
1326
///
 
1327
/// SBSA Generic Watchdog Structure
 
1328
///
 
1329
typedef struct {
 
1330
  UINT8   Type;
 
1331
  UINT16  Length;
 
1332
  UINT8   Reserved;
 
1333
  UINT64  RefreshFramePhysicalAddress;
 
1334
  UINT64  WatchdogControlFramePhysicalAddress;
 
1335
  UINT32  WatchdogTimerGSIV;
 
1336
  UINT32  WatchdogTimerFlags;
 
1337
} EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
 
1338
 
 
1339
///
 
1340
/// SBSA Generic Watchdog Timer Flags.  All other bits are reserved and must be 0.
 
1341
///
 
1342
#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE          BIT0
 
1343
#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY      BIT1
 
1344
#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER                  BIT2
 
1345
 
 
1346
///
 
1347
/// Boot Error Record Table (BERT)
 
1348
///
 
1349
typedef struct {
 
1350
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
1351
  UINT32                      BootErrorRegionLength;
 
1352
  UINT64                      BootErrorRegion;
 
1353
} EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;
 
1354
 
 
1355
///
 
1356
/// BERT Version (as defined in ACPI 5.1 spec.)
 
1357
///
 
1358
#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
 
1359
 
 
1360
///
 
1361
/// Boot Error Region Block Status Definition
 
1362
///
 
1363
typedef struct {
 
1364
  UINT32       UncorrectableErrorValid:1;
 
1365
  UINT32       CorrectableErrorValid:1;
 
1366
  UINT32       MultipleUncorrectableErrors:1;
 
1367
  UINT32       MultipleCorrectableErrors:1;
 
1368
  UINT32       ErrorDataEntryCount:10;
 
1369
  UINT32       Reserved:18;
 
1370
} EFI_ACPI_5_1_ERROR_BLOCK_STATUS;
 
1371
 
 
1372
///
 
1373
/// Boot Error Region Definition
 
1374
///
 
1375
typedef struct {
 
1376
  EFI_ACPI_5_1_ERROR_BLOCK_STATUS              BlockStatus;
 
1377
  UINT32                                       RawDataOffset;
 
1378
  UINT32                                       RawDataLength;
 
1379
  UINT32                                       DataLength;
 
1380
  UINT32                                       ErrorSeverity;
 
1381
} EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;
 
1382
 
 
1383
//
 
1384
// Boot Error Severity types
 
1385
//
 
1386
#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE  0x00
 
1387
#define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL        0x01
 
1388
#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED    0x02
 
1389
#define EFI_ACPI_5_1_ERROR_SEVERITY_NONE         0x03
 
1390
 
 
1391
///
 
1392
/// Generic Error Data Entry Definition
 
1393
///
 
1394
typedef struct {
 
1395
  UINT8    SectionType[16];
 
1396
  UINT32   ErrorSeverity;
 
1397
  UINT16   Revision;
 
1398
  UINT8    ValidationBits;
 
1399
  UINT8    Flags;
 
1400
  UINT32   ErrorDataLength;
 
1401
  UINT8    FruId[16];
 
1402
  UINT8    FruText[20];
 
1403
} EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
 
1404
 
 
1405
///
 
1406
/// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)
 
1407
///
 
1408
#define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION  0x0201
 
1409
 
 
1410
///
 
1411
/// HEST - Hardware Error Source Table
 
1412
///
 
1413
typedef struct {
 
1414
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
1415
  UINT32                      ErrorSourceCount;
 
1416
} EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
 
1417
 
 
1418
///
 
1419
/// HEST Version (as defined in ACPI 5.1 spec.)
 
1420
///
 
1421
#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
 
1422
 
 
1423
//
 
1424
// Error Source structure types.
 
1425
//
 
1426
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION  0x00
 
1427
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK  0x01
 
1428
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR                0x02
 
1429
#define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER                  0x06
 
1430
#define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER                     0x07
 
1431
#define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER                     0x08
 
1432
#define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR                     0x09
 
1433
 
 
1434
//
 
1435
// Error Source structure flags.
 
1436
//
 
1437
#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST       (1 << 0)
 
1438
#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL               (1 << 1)
 
1439
 
 
1440
///
 
1441
/// IA-32 Architecture Machine Check Exception Structure Definition
 
1442
///
 
1443
typedef struct {
 
1444
  UINT16  Type;
 
1445
  UINT16  SourceId;
 
1446
  UINT8   Reserved0[2];
 
1447
  UINT8   Flags;
 
1448
  UINT8   Enabled;
 
1449
  UINT32  NumberOfRecordsToPreAllocate;
 
1450
  UINT32  MaxSectionsPerRecord;
 
1451
  UINT64  GlobalCapabilityInitData;
 
1452
  UINT64  GlobalControlInitData;
 
1453
  UINT8   NumberOfHardwareBanks;
 
1454
  UINT8   Reserved1[7];
 
1455
} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
 
1456
 
 
1457
///
 
1458
/// IA-32 Architecture Machine Check Bank Structure Definition
 
1459
///
 
1460
typedef struct {
 
1461
  UINT8   BankNumber;
 
1462
  UINT8   ClearStatusOnInitialization;
 
1463
  UINT8   StatusDataFormat;
 
1464
  UINT8   Reserved0;
 
1465
  UINT32  ControlRegisterMsrAddress;
 
1466
  UINT64  ControlInitData;
 
1467
  UINT32  StatusRegisterMsrAddress;
 
1468
  UINT32  AddressRegisterMsrAddress;
 
1469
  UINT32  MiscRegisterMsrAddress;
 
1470
} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
 
1471
 
 
1472
///
 
1473
/// IA-32 Architecture Machine Check Bank Structure MCA data format
 
1474
///
 
1475
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32      0x00
 
1476
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64   0x01
 
1477
#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64     0x02
 
1478
 
 
1479
//
 
1480
// Hardware Error Notification types. All other values are reserved
 
1481
//
 
1482
#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED                0x00
 
1483
#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT    0x01
 
1484
#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT       0x02
 
1485
#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI                   0x03
 
1486
#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI                   0x04
 
1487
 
 
1488
///
 
1489
/// Hardware Error Notification Configuration Write Enable Structure Definition
 
1490
///
 
1491
typedef struct {
 
1492
  UINT16    Type:1;
 
1493
  UINT16    PollInterval:1;
 
1494
  UINT16    SwitchToPollingThresholdValue:1;
 
1495
  UINT16    SwitchToPollingThresholdWindow:1;
 
1496
  UINT16    ErrorThresholdValue:1;
 
1497
  UINT16    ErrorThresholdWindow:1;
 
1498
  UINT16    Reserved:10;
 
1499
} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
 
1500
 
 
1501
///
 
1502
/// Hardware Error Notification Structure Definition
 
1503
///
 
1504
typedef struct {
 
1505
  UINT8                                                                          Type;
 
1506
  UINT8                                                                          Length;
 
1507
  EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE  ConfigurationWriteEnable;
 
1508
  UINT32                                                                         PollInterval;
 
1509
  UINT32                                                                         Vector;
 
1510
  UINT32                                                                         SwitchToPollingThresholdValue;
 
1511
  UINT32                                                                         SwitchToPollingThresholdWindow;
 
1512
  UINT32                                                                         ErrorThresholdValue;
 
1513
  UINT32                                                                         ErrorThresholdWindow;
 
1514
} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
 
1515
 
 
1516
///
 
1517
/// IA-32 Architecture Corrected Machine Check Structure Definition
 
1518
///
 
1519
typedef struct {
 
1520
  UINT16                                                 Type;
 
1521
  UINT16                                                 SourceId;
 
1522
  UINT8                                                  Reserved0[2];
 
1523
  UINT8                                                  Flags;
 
1524
  UINT8                                                  Enabled;
 
1525
  UINT32                                                 NumberOfRecordsToPreAllocate;
 
1526
  UINT32                                                 MaxSectionsPerRecord;
 
1527
  EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE     NotificationStructure;
 
1528
  UINT8                                                  NumberOfHardwareBanks;
 
1529
  UINT8                                                  Reserved1[3];
 
1530
} EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
 
1531
 
 
1532
///
 
1533
/// IA-32 Architecture NMI Error Structure Definition
 
1534
///
 
1535
typedef struct {
 
1536
  UINT16  Type;
 
1537
  UINT16  SourceId;
 
1538
  UINT8   Reserved0[2];
 
1539
  UINT32  NumberOfRecordsToPreAllocate;
 
1540
  UINT32  MaxSectionsPerRecord;
 
1541
  UINT32  MaxRawDataLength;
 
1542
} EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
 
1543
 
 
1544
///
 
1545
/// PCI Express Root Port AER Structure Definition
 
1546
///
 
1547
typedef struct {
 
1548
  UINT16  Type;
 
1549
  UINT16  SourceId;
 
1550
  UINT8   Reserved0[2];
 
1551
  UINT8   Flags;
 
1552
  UINT8   Enabled;
 
1553
  UINT32  NumberOfRecordsToPreAllocate;
 
1554
  UINT32  MaxSectionsPerRecord;
 
1555
  UINT32  Bus;
 
1556
  UINT16  Device;
 
1557
  UINT16  Function;
 
1558
  UINT16  DeviceControl;
 
1559
  UINT8   Reserved1[2];
 
1560
  UINT32  UncorrectableErrorMask;
 
1561
  UINT32  UncorrectableErrorSeverity;
 
1562
  UINT32  CorrectableErrorMask;
 
1563
  UINT32  AdvancedErrorCapabilitiesAndControl;
 
1564
  UINT32  RootErrorCommand;
 
1565
} EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
 
1566
 
 
1567
///
 
1568
/// PCI Express Device AER Structure Definition
 
1569
///
 
1570
typedef struct {
 
1571
  UINT16  Type;
 
1572
  UINT16  SourceId;
 
1573
  UINT8   Reserved0[2];
 
1574
  UINT8   Flags;
 
1575
  UINT8   Enabled;
 
1576
  UINT32  NumberOfRecordsToPreAllocate;
 
1577
  UINT32  MaxSectionsPerRecord;
 
1578
  UINT32  Bus;
 
1579
  UINT16  Device;
 
1580
  UINT16  Function;
 
1581
  UINT16  DeviceControl;
 
1582
  UINT8   Reserved1[2];
 
1583
  UINT32  UncorrectableErrorMask;
 
1584
  UINT32  UncorrectableErrorSeverity;
 
1585
  UINT32  CorrectableErrorMask;
 
1586
  UINT32  AdvancedErrorCapabilitiesAndControl;
 
1587
} EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
 
1588
 
 
1589
///
 
1590
/// PCI Express Bridge AER Structure Definition
 
1591
///
 
1592
typedef struct {
 
1593
  UINT16  Type;
 
1594
  UINT16  SourceId;
 
1595
  UINT8   Reserved0[2];
 
1596
  UINT8   Flags;
 
1597
  UINT8   Enabled;
 
1598
  UINT32  NumberOfRecordsToPreAllocate;
 
1599
  UINT32  MaxSectionsPerRecord;
 
1600
  UINT32  Bus;
 
1601
  UINT16  Device;
 
1602
  UINT16  Function;
 
1603
  UINT16  DeviceControl;
 
1604
  UINT8   Reserved1[2];
 
1605
  UINT32  UncorrectableErrorMask;
 
1606
  UINT32  UncorrectableErrorSeverity;
 
1607
  UINT32  CorrectableErrorMask;
 
1608
  UINT32  AdvancedErrorCapabilitiesAndControl;
 
1609
  UINT32  SecondaryUncorrectableErrorMask;
 
1610
  UINT32  SecondaryUncorrectableErrorSeverity;
 
1611
  UINT32  SecondaryAdvancedErrorCapabilitiesAndControl;
 
1612
} EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
 
1613
 
 
1614
///
 
1615
/// Generic Hardware Error Source Structure Definition
 
1616
///
 
1617
typedef struct {
 
1618
  UINT16                                                 Type;
 
1619
  UINT16                                                 SourceId;
 
1620
  UINT16                                                 RelatedSourceId;
 
1621
  UINT8                                                  Flags;
 
1622
  UINT8                                                  Enabled;
 
1623
  UINT32                                                 NumberOfRecordsToPreAllocate;
 
1624
  UINT32                                                 MaxSectionsPerRecord;
 
1625
  UINT32                                                 MaxRawDataLength;
 
1626
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE                 ErrorStatusAddress;
 
1627
  EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE     NotificationStructure;
 
1628
  UINT32                                                 ErrorStatusBlockLength;
 
1629
} EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
 
1630
 
 
1631
///
 
1632
/// Generic Error Status Definition
 
1633
///
 
1634
typedef struct {
 
1635
  EFI_ACPI_5_1_ERROR_BLOCK_STATUS              BlockStatus;
 
1636
  UINT32                                       RawDataOffset;
 
1637
  UINT32                                       RawDataLength;
 
1638
  UINT32                                       DataLength;
 
1639
  UINT32                                       ErrorSeverity;
 
1640
} EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;
 
1641
 
 
1642
///
 
1643
/// ERST - Error Record Serialization Table
 
1644
///
 
1645
typedef struct {
 
1646
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
1647
  UINT32                      SerializationHeaderSize;
 
1648
  UINT8                       Reserved0[4];
 
1649
  UINT32                      InstructionEntryCount;
 
1650
} EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
 
1651
 
 
1652
///
 
1653
/// ERST Version (as defined in ACPI 5.1 spec.)
 
1654
///
 
1655
#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
 
1656
 
 
1657
///
 
1658
/// ERST Serialization Actions
 
1659
///
 
1660
#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION                    0x00
 
1661
#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION                     0x01
 
1662
#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION                    0x02
 
1663
#define EFI_ACPI_5_1_ERST_END_OPERATION                            0x03
 
1664
#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET                        0x04
 
1665
#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION                        0x05
 
1666
#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS                        0x06
 
1667
#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS                       0x07
 
1668
#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER                    0x08
 
1669
#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER                    0x09
 
1670
#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT                         0x0A
 
1671
#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION              0x0B
 
1672
#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE              0x0D
 
1673
#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH       0x0E
 
1674
#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES   0x0F
 
1675
 
 
1676
///
 
1677
/// ERST Action Command Status
 
1678
///
 
1679
#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS                           0x00
 
1680
#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE                  0x01
 
1681
#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE            0x02
 
1682
#define EFI_ACPI_5_1_ERST_STATUS_FAILED                            0x03
 
1683
#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY                0x04
 
1684
#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND                  0x05
 
1685
 
 
1686
///
 
1687
/// ERST Serialization Instructions
 
1688
///
 
1689
#define EFI_ACPI_5_1_ERST_READ_REGISTER                            0x00
 
1690
#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE                      0x01
 
1691
#define EFI_ACPI_5_1_ERST_WRITE_REGISTER                           0x02
 
1692
#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE                     0x03
 
1693
#define EFI_ACPI_5_1_ERST_NOOP                                     0x04
 
1694
#define EFI_ACPI_5_1_ERST_LOAD_VAR1                                0x05
 
1695
#define EFI_ACPI_5_1_ERST_LOAD_VAR2                                0x06
 
1696
#define EFI_ACPI_5_1_ERST_STORE_VAR1                               0x07
 
1697
#define EFI_ACPI_5_1_ERST_ADD                                      0x08
 
1698
#define EFI_ACPI_5_1_ERST_SUBTRACT                                 0x09
 
1699
#define EFI_ACPI_5_1_ERST_ADD_VALUE                                0x0A
 
1700
#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE                           0x0B
 
1701
#define EFI_ACPI_5_1_ERST_STALL                                    0x0C
 
1702
#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE                         0x0D
 
1703
#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE            0x0E
 
1704
#define EFI_ACPI_5_1_ERST_GOTO                                     0x0F
 
1705
#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE                     0x10
 
1706
#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE                     0x11
 
1707
#define EFI_ACPI_5_1_ERST_MOVE_DATA                                0x12
 
1708
 
 
1709
///
 
1710
/// ERST Instruction Flags
 
1711
///
 
1712
#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER                        0x01
 
1713
 
 
1714
///
 
1715
/// ERST Serialization Instruction Entry
 
1716
///
 
1717
typedef struct {
 
1718
  UINT8                                    SerializationAction;
 
1719
  UINT8                                    Instruction;
 
1720
  UINT8                                    Flags;
 
1721
  UINT8                                    Reserved0;
 
1722
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE   RegisterRegion;
 
1723
  UINT64                                   Value;
 
1724
  UINT64                                   Mask;
 
1725
} EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
 
1726
 
 
1727
///
 
1728
/// EINJ - Error Injection Table
 
1729
///
 
1730
typedef struct {
 
1731
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
1732
  UINT32                      InjectionHeaderSize;
 
1733
  UINT8                       InjectionFlags;
 
1734
  UINT8                       Reserved0[3];
 
1735
  UINT32                      InjectionEntryCount;
 
1736
} EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;
 
1737
 
 
1738
///
 
1739
/// EINJ Version (as defined in ACPI 5.1 spec.)
 
1740
///
 
1741
#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
 
1742
 
 
1743
///
 
1744
/// EINJ Error Injection Actions
 
1745
///
 
1746
#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION                0x00
 
1747
#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE           0x01
 
1748
#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE                           0x02
 
1749
#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE                           0x03
 
1750
#define EFI_ACPI_5_1_EINJ_END_OPERATION                            0x04
 
1751
#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION                        0x05
 
1752
#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS                        0x06
 
1753
#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS                       0x07
 
1754
#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR                            0xFF
 
1755
 
 
1756
///
 
1757
/// EINJ Action Command Status
 
1758
///
 
1759
#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS                           0x00
 
1760
#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE                   0x01
 
1761
#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS                    0x02
 
1762
 
 
1763
///
 
1764
/// EINJ Error Type Definition
 
1765
///
 
1766
#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE                 (1 << 0)
 
1767
#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL      (1 << 1)
 
1768
#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL         (1 << 2)
 
1769
#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE                    (1 << 3)
 
1770
#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL         (1 << 4)
 
1771
#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL            (1 << 5)
 
1772
#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE               (1 << 6)
 
1773
#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL    (1 << 7)
 
1774
#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL       (1 << 8)
 
1775
#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE                  (1 << 9)
 
1776
#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL       (1 << 10)
 
1777
#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL          (1 << 11)
 
1778
 
 
1779
///
 
1780
/// EINJ Injection Instructions
 
1781
///
 
1782
#define EFI_ACPI_5_1_EINJ_READ_REGISTER                            0x00
 
1783
#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE                      0x01
 
1784
#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER                           0x02
 
1785
#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE                     0x03
 
1786
#define EFI_ACPI_5_1_EINJ_NOOP                                     0x04
 
1787
 
 
1788
///
 
1789
/// EINJ Instruction Flags
 
1790
///
 
1791
#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER                        0x01
 
1792
 
 
1793
///
 
1794
/// EINJ Injection Instruction Entry
 
1795
///
 
1796
typedef struct {
 
1797
  UINT8                                    InjectionAction;
 
1798
  UINT8                                    Instruction;
 
1799
  UINT8                                    Flags;
 
1800
  UINT8                                    Reserved0;
 
1801
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE   RegisterRegion;
 
1802
  UINT64                                   Value;
 
1803
  UINT64                                   Mask;
 
1804
} EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;
 
1805
 
 
1806
///
 
1807
/// EINJ Trigger Action Table
 
1808
///
 
1809
typedef struct {
 
1810
  UINT32  HeaderSize;
 
1811
  UINT32  Revision;
 
1812
  UINT32  TableSize;
 
1813
  UINT32  EntryCount;
 
1814
} EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;
 
1815
 
 
1816
///
 
1817
/// Platform Communications Channel Table (PCCT)
 
1818
///
 
1819
typedef struct {
 
1820
  EFI_ACPI_DESCRIPTION_HEADER Header;
 
1821
  UINT32                      Flags;
 
1822
  UINT64                      Reserved;
 
1823
} EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
 
1824
 
 
1825
///
 
1826
/// PCCT Version (as defined in ACPI 5.1 spec.)
 
1827
///
 
1828
#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
 
1829
 
 
1830
///
 
1831
/// PCCT Global Flags
 
1832
///
 
1833
#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL                      BIT0
 
1834
 
 
1835
//
 
1836
// PCCT Subspace type
 
1837
//
 
1838
#define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC  0x00
 
1839
 
 
1840
///
 
1841
/// PCC Subspace Structure Header
 
1842
///
 
1843
typedef struct {
 
1844
  UINT8        Type;
 
1845
  UINT8        Length;
 
1846
} EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;
 
1847
 
 
1848
///
 
1849
/// Generic Communications Subspace Structure
 
1850
///
 
1851
typedef struct {
 
1852
  UINT8                                    Type;
 
1853
  UINT8                                    Length;
 
1854
  UINT8                                    Reserved[6];
 
1855
  UINT64                                   BaseAddress;
 
1856
  UINT64                                   AddressLength;
 
1857
  EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE   DoorbellRegister;
 
1858
  UINT64                                   DoorbellPreserve;
 
1859
  UINT64                                   DoorbellWrite;
 
1860
  UINT32                                   NominalLatency;
 
1861
  UINT32                                   MaximumPeriodicAccessRate;
 
1862
  UINT16                                   MinimumRequestTurnaroundTime;
 
1863
} EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;
 
1864
 
 
1865
///
 
1866
/// Generic Communications Channel Shared Memory Region
 
1867
///
 
1868
 
 
1869
typedef struct {
 
1870
  UINT8                                    Command;
 
1871
  UINT8                                    Reserved:7;
 
1872
  UINT8                                    GenerateSci:1;
 
1873
} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
 
1874
 
 
1875
typedef struct {
 
1876
  UINT8                                    CommandComplete:1;
 
1877
  UINT8                                    SciDoorbell:1;
 
1878
  UINT8                                    Error:1;
 
1879
  UINT8                                    PlatformNotification:1;
 
1880
  UINT8                                    Reserved:4;
 
1881
  UINT8                                    Reserved1;
 
1882
} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
 
1883
 
 
1884
typedef struct {
 
1885
  UINT32                                                    Signature;
 
1886
  EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND    Command;
 
1887
  EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS     Status;
 
1888
} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
 
1889
 
 
1890
//
 
1891
// Known table signatures
 
1892
//
 
1893
 
 
1894
///
 
1895
/// "RSD PTR " Root System Description Pointer
 
1896
///
 
1897
#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
 
1898
 
 
1899
///
 
1900
/// "APIC" Multiple APIC Description Table
 
1901
///
 
1902
#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('A', 'P', 'I', 'C')
 
1903
 
 
1904
///
 
1905
/// "BERT" Boot Error Record Table
 
1906
///
 
1907
#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE  SIGNATURE_32('B', 'E', 'R', 'T')
 
1908
 
 
1909
///
 
1910
/// "BGRT" Boot Graphics Resource Table
 
1911
///
 
1912
#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('B', 'G', 'R', 'T')
 
1913
 
 
1914
///
 
1915
/// "CPEP" Corrected Platform Error Polling Table
 
1916
///
 
1917
#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE  SIGNATURE_32('C', 'P', 'E', 'P')
 
1918
 
 
1919
///
 
1920
/// "DSDT" Differentiated System Description Table
 
1921
///
 
1922
#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('D', 'S', 'D', 'T')
 
1923
 
 
1924
///
 
1925
/// "ECDT" Embedded Controller Boot Resources Table
 
1926
///
 
1927
#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE  SIGNATURE_32('E', 'C', 'D', 'T')
 
1928
 
 
1929
///
 
1930
/// "EINJ" Error Injection Table
 
1931
///
 
1932
#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'I', 'N', 'J')
 
1933
 
 
1934
///
 
1935
/// "ERST" Error Record Serialization Table
 
1936
///
 
1937
#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE  SIGNATURE_32('E', 'R', 'S', 'T')
 
1938
 
 
1939
///
 
1940
/// "FACP" Fixed ACPI Description Table
 
1941
///
 
1942
#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'P')
 
1943
 
 
1944
///
 
1945
/// "FACS" Firmware ACPI Control Structure
 
1946
///
 
1947
#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'S')
 
1948
 
 
1949
///
 
1950
/// "FPDT" Firmware Performance Data Table
 
1951
///
 
1952
#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE  SIGNATURE_32('F', 'P', 'D', 'T')
 
1953
 
 
1954
///
 
1955
/// "GTDT" Generic Timer Description Table
 
1956
///
 
1957
#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('G', 'T', 'D', 'T')
 
1958
 
 
1959
///
 
1960
/// "HEST" Hardware Error Source Table
 
1961
///
 
1962
#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE  SIGNATURE_32('H', 'E', 'S', 'T')
 
1963
 
 
1964
///
 
1965
/// "MPST" Memory Power State Table
 
1966
///
 
1967
#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE  SIGNATURE_32('M', 'P', 'S', 'T')
 
1968
 
 
1969
///
 
1970
/// "MSCT" Maximum System Characteristics Table
 
1971
///
 
1972
#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE  SIGNATURE_32('M', 'S', 'C', 'T')
 
1973
 
 
1974
///
 
1975
/// "PMTT" Platform Memory Topology Table
 
1976
///
 
1977
#define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE  SIGNATURE_32('P', 'M', 'T', 'T')
 
1978
 
 
1979
///
 
1980
/// "PSDT" Persistent System Description Table
 
1981
///
 
1982
#define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('P', 'S', 'D', 'T')
 
1983
 
 
1984
///
 
1985
/// "RASF" ACPI RAS Feature Table
 
1986
///
 
1987
#define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE  SIGNATURE_32('R', 'A', 'S', 'F')
 
1988
 
 
1989
///
 
1990
/// "RSDT" Root System Description Table
 
1991
///
 
1992
#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('R', 'S', 'D', 'T')
 
1993
 
 
1994
///
 
1995
/// "SBST" Smart Battery Specification Table
 
1996
///
 
1997
#define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'B', 'S', 'T')
 
1998
 
 
1999
///
 
2000
/// "SLIT" System Locality Information Table
 
2001
///
 
2002
#define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'T')
 
2003
 
 
2004
///
 
2005
/// "SRAT" System Resource Affinity Table
 
2006
///
 
2007
#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE  SIGNATURE_32('S', 'R', 'A', 'T')
 
2008
 
 
2009
///
 
2010
/// "SSDT" Secondary System Description Table
 
2011
///
 
2012
#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'S', 'D', 'T')
 
2013
 
 
2014
///
 
2015
/// "XSDT" Extended System Description Table
 
2016
///
 
2017
#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('X', 'S', 'D', 'T')
 
2018
 
 
2019
///
 
2020
/// "BOOT" MS Simple Boot Spec
 
2021
///
 
2022
#define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE  SIGNATURE_32('B', 'O', 'O', 'T')
 
2023
 
 
2024
///
 
2025
/// "CSRT" MS Core System Resource Table
 
2026
///
 
2027
#define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('C', 'S', 'R', 'T')
 
2028
 
 
2029
///
 
2030
/// "DBG2" MS Debug Port 2 Spec
 
2031
///
 
2032
#define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', '2')
 
2033
 
 
2034
///
 
2035
/// "DBGP" MS Debug Port Spec
 
2036
///
 
2037
#define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', 'P')
 
2038
 
 
2039
///
 
2040
/// "DMAR" DMA Remapping Table
 
2041
///
 
2042
#define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE  SIGNATURE_32('D', 'M', 'A', 'R')
 
2043
 
 
2044
///
 
2045
/// "DRTM" Dynamic Root of Trust for Measurement Table
 
2046
///
 
2047
#define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE  SIGNATURE_32('D', 'R', 'T', 'M')
 
2048
 
 
2049
///
 
2050
/// "ETDT" Event Timer Description Table
 
2051
///
 
2052
#define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'T', 'D', 'T')
 
2053
 
 
2054
///
 
2055
/// "HPET" IA-PC High Precision Event Timer Table
 
2056
///
 
2057
#define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE  SIGNATURE_32('H', 'P', 'E', 'T')
 
2058
 
 
2059
///
 
2060
/// "iBFT" iSCSI Boot Firmware Table
 
2061
///
 
2062
#define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE  SIGNATURE_32('i', 'B', 'F', 'T')
 
2063
 
 
2064
///
 
2065
/// "IVRS" I/O Virtualization Reporting Structure
 
2066
///
 
2067
#define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE  SIGNATURE_32('I', 'V', 'R', 'S')
 
2068
 
 
2069
///
 
2070
/// "LPIT" Low Power Idle Table
 
2071
///
 
2072
#define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE  SIGNATURE_32('L', 'P', 'I', 'T')
 
2073
 
 
2074
///
 
2075
/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
 
2076
///
 
2077
#define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'F', 'G')
 
2078
 
 
2079
///
 
2080
/// "MCHI" Management Controller Host Interface Table
 
2081
///
 
2082
#define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'H', 'I')
 
2083
 
 
2084
///
 
2085
/// "MSDM" MS Data Management Table
 
2086
///
 
2087
#define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE  SIGNATURE_32('M', 'S', 'D', 'M')
 
2088
 
 
2089
///
 
2090
/// "SLIC" MS Software Licensing Table Specification
 
2091
///
 
2092
#define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'C')
 
2093
 
 
2094
///
 
2095
/// "SPCR" Serial Port Concole Redirection Table
 
2096
///
 
2097
#define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'C', 'R')
 
2098
 
 
2099
///
 
2100
/// "SPMI" Server Platform Management Interface Table
 
2101
///
 
2102
#define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'M', 'I')
 
2103
 
 
2104
///
 
2105
/// "TCPA" Trusted Computing Platform Alliance Capabilities Table
 
2106
///
 
2107
#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE  SIGNATURE_32('T', 'C', 'P', 'A')
 
2108
 
 
2109
///
 
2110
/// "TPM2" Trusted Computing Platform 1 Table
 
2111
///
 
2112
#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE  SIGNATURE_32('T', 'P', 'M', '2')
 
2113
 
 
2114
///
 
2115
/// "UEFI" UEFI ACPI Data Table
 
2116
///
 
2117
#define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE  SIGNATURE_32('U', 'E', 'F', 'I')
 
2118
 
 
2119
///
 
2120
/// "WAET" Windows ACPI Emulated Devices Table
 
2121
///
 
2122
#define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE  SIGNATURE_32('W', 'A', 'E', 'T')
 
2123
 
 
2124
///
 
2125
/// "WDAT" Watchdog Action Table
 
2126
///
 
2127
#define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE  SIGNATURE_32('W', 'D', 'A', 'T')
 
2128
 
 
2129
///
 
2130
/// "WDRT" Watchdog Resource Table
 
2131
///
 
2132
#define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('W', 'D', 'R', 'T')
 
2133
 
 
2134
///
 
2135
/// "WPBT" MS Platform Binary Table
 
2136
///
 
2137
#define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE  SIGNATURE_32('W', 'P', 'B', 'T')
 
2138
 
 
2139
#pragma pack()
 
2140
 
 
2141
#endif