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* UniCore32 helper routines
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* Copyright (C) 2010-2012 Guan Xuetao
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation, or (at your option) any
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* later version. See the COPYING file in the top-level directory.
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#include "qemu/osdep.h"
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#include "exec/helper-proto.h"
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#include "exec/exec-all.h"
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#include "exec/cpu_ldst.h"
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#define SIGNBIT (uint32_t)0x80000000
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#define SIGNBIT64 ((uint64_t)1 << 63)
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void HELPER(exception)(CPUUniCore32State *env, uint32_t excp)
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CPUState *cs = CPU(uc32_env_get_cpu(env));
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cs->exception_index = excp;
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static target_ulong asr_read(CPUUniCore32State *env)
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return env->uncached_asr | (env->NF & 0x80000000) | (ZF << 30) |
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(env->CF << 29) | ((env->VF & 0x80000000) >> 3);
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target_ulong cpu_asr_read(CPUUniCore32State *env)
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target_ulong HELPER(asr_read)(CPUUniCore32State *env)
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static void asr_write(CPUUniCore32State *env, target_ulong val,
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if (mask & ASR_NZCV) {
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env->ZF = (~val) & ASR_Z;
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env->CF = (val >> 29) & 1;
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env->VF = (val << 3) & 0x80000000;
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if ((env->uncached_asr ^ val) & mask & ASR_M) {
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switch_mode(env, val & ASR_M);
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env->uncached_asr = (env->uncached_asr & ~mask) | (val & mask);
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void cpu_asr_write(CPUUniCore32State *env, target_ulong val, target_ulong mask)
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asr_write(env, val, mask);
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void HELPER(asr_write)(CPUUniCore32State *env, target_ulong val,
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asr_write(env, val, mask);
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/* Access to user mode registers from privileged modes. */
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uint32_t HELPER(get_user_reg)(CPUUniCore32State *env, uint32_t regno)
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val = env->banked_r29[0];
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} else if (regno == 30) {
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val = env->banked_r30[0];
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val = env->regs[regno];
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void HELPER(set_user_reg)(CPUUniCore32State *env, uint32_t regno, uint32_t val)
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env->banked_r29[0] = val;
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} else if (regno == 30) {
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env->banked_r30[0] = val;
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env->regs[regno] = val;
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/* ??? Flag setting arithmetic is awkward because we need to do comparisons.
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The only way to do that in TCG is a conditional branch, which clobbers
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all our temporaries. For now implement these as helper functions. */
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uint32_t HELPER(add_cc)(CPUUniCore32State *env, uint32_t a, uint32_t b)
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env->NF = env->ZF = result;
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env->CF = result < a;
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env->VF = (a ^ b ^ -1) & (a ^ result);
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uint32_t HELPER(adc_cc)(CPUUniCore32State *env, uint32_t a, uint32_t b)
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env->CF = result < a;
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env->CF = result <= a;
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env->VF = (a ^ b ^ -1) & (a ^ result);
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env->NF = env->ZF = result;
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uint32_t HELPER(sub_cc)(CPUUniCore32State *env, uint32_t a, uint32_t b)
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env->NF = env->ZF = result;
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env->VF = (a ^ b) & (a ^ result);
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uint32_t HELPER(sbc_cc)(CPUUniCore32State *env, uint32_t a, uint32_t b)
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env->VF = (a ^ b) & (a ^ result);
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env->NF = env->ZF = result;
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/* Similarly for variable shift instructions. */
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uint32_t HELPER(shl)(uint32_t x, uint32_t i)
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int shift = i & 0xff;
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uint32_t HELPER(shr)(uint32_t x, uint32_t i)
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int shift = i & 0xff;
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return (uint32_t)x >> shift;
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uint32_t HELPER(sar)(uint32_t x, uint32_t i)
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int shift = i & 0xff;
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return (int32_t)x >> shift;
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uint32_t HELPER(shl_cc)(CPUUniCore32State *env, uint32_t x, uint32_t i)
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int shift = i & 0xff;
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} else if (shift != 0) {
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env->CF = (x >> (32 - shift)) & 1;
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uint32_t HELPER(shr_cc)(CPUUniCore32State *env, uint32_t x, uint32_t i)
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int shift = i & 0xff;
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env->CF = (x >> 31) & 1;
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} else if (shift != 0) {
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env->CF = (x >> (shift - 1)) & 1;
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uint32_t HELPER(sar_cc)(CPUUniCore32State *env, uint32_t x, uint32_t i)
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int shift = i & 0xff;
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env->CF = (x >> 31) & 1;
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return (int32_t)x >> 31;
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} else if (shift != 0) {
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env->CF = (x >> (shift - 1)) & 1;
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return (int32_t)x >> shift;
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uint32_t HELPER(ror_cc)(CPUUniCore32State *env, uint32_t x, uint32_t i)
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shift = shift1 & 0x1f;
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env->CF = (x >> 31) & 1;
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env->CF = (x >> (shift - 1)) & 1;
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return ((uint32_t)x >> shift) | (x << (32 - shift));
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#ifndef CONFIG_USER_ONLY
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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ret = uc32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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/* now we have a real cpu fault */
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cpu_restore_state(cs, retaddr);