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Viewing changes to roms/u-boot/board/bluewater/snapper9260/snapper9260.c

  • Committer: Phil Dennis-Jordan
  • Date: 2017-07-21 08:03:43 UTC
  • mfrom: (1.1.1)
  • Revision ID: phil@philjordan.eu-20170721080343-2yr2vdj7713czahv
New upstream release 2.9.0.

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roms/u-boot/board/bluewater/snapper9260/snapper9260.c
 
1
/*
 
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 * Bluewater Systems Snapper 9260/9G20 modules
 
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 *
 
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 * (C) Copyright 2011 Bluewater Systems
 
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 *   Author: Andre Renaud <andre@bluewatersys.com>
 
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 *   Author: Ryan Mallon <ryan@bluewatersys.com>
 
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 *
 
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 * SPDX-License-Identifier:     GPL-2.0+
 
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 */
 
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#include <common.h>
 
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#include <asm/io.h>
 
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#include <asm/arch/at91sam9260_matrix.h>
 
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#include <asm/arch/at91sam9_smc.h>
 
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#include <asm/arch/at91_common.h>
 
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#include <asm/arch/at91_pmc.h>
 
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#include <asm/arch/gpio.h>
 
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#include <net.h>
 
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#include <netdev.h>
 
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#include <i2c.h>
 
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#include <pca953x.h>
 
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DECLARE_GLOBAL_DATA_PTR;
 
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/* IO Expander pins */
 
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#define IO_EXP_ETH_RESET        (0 << 1)
 
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#define IO_EXP_ETH_POWER        (1 << 1)
 
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static void macb_hw_init(void)
 
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{
 
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        struct at91_pmc *pmc   = (struct at91_pmc  *)ATMEL_BASE_PMC;
 
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        struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
 
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        /* Enable clock */
 
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        writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
 
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        /* Disable pull-ups to prevent PHY going into test mode */
 
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        writel(pin_to_mask(AT91_PIN_PA14) |
 
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               pin_to_mask(AT91_PIN_PA15) |
 
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               pin_to_mask(AT91_PIN_PA18),
 
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               &pioa->pudr);
 
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        /* Power down ethernet */
 
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        pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT);
 
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        pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1);
 
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        /* Hold ethernet in reset */
 
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        pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT);
 
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        pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0);
 
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        /* Enable ethernet power */
 
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        pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0);
 
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        at91_phy_reset();
 
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        /* Bring the ethernet out of reset */
 
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        pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1);
 
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        /* The phy internal reset take 21ms */
 
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        udelay(21 * 1000);
 
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        /* Re-enable pull-up */
 
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        writel(pin_to_mask(AT91_PIN_PA14) |
 
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               pin_to_mask(AT91_PIN_PA15) |
 
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               pin_to_mask(AT91_PIN_PA18),
 
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               &pioa->puer);
 
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        at91_macb_hw_init();
 
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}
 
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static void nand_hw_init(void)
 
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{
 
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        struct at91_smc *smc       = (struct at91_smc    *)ATMEL_BASE_SMC;
 
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        struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
 
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        unsigned long csa;
 
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        /* Enable CS3 as NAND/SmartMedia */
 
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        csa = readl(&matrix->ebicsa);
 
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        csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
 
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        writel(csa, &matrix->ebicsa);
 
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        /* Configure SMC CS3 for NAND/SmartMedia */
 
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        writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
 
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               AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
 
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               &smc->cs[3].setup);
 
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        writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
 
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               AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
 
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               &smc->cs[3].pulse);
 
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        writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
 
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               &smc->cs[3].cycle);
 
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        writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
 
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               AT91_SMC_MODE_EXNW_DISABLE |
 
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               AT91_SMC_MODE_DBW_8 |
 
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               AT91_SMC_MODE_TDF_CYCLE(3),
 
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               &smc->cs[3].mode);
 
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        /* Configure RDY/BSY */
 
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        at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
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        /* Enable NandFlash */
 
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        at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 
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}
 
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int board_init(void)
 
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{
 
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        struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 
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        /* Enable PIO clocks */
 
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        writel((1 << ATMEL_ID_PIOA) |
 
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               (1 << ATMEL_ID_PIOB) |
 
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               (1 << ATMEL_ID_PIOC), &pmc->pcer);
 
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        /* The mach-type is the same for both Snapper 9260 and 9G20 */
 
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        gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
 
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        /* Address of boot parameters */
 
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        gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
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        /* Initialise peripherals */
 
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        at91_seriald_hw_init();
 
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        i2c_set_bus_num(0);
 
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        nand_hw_init();
 
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        macb_hw_init();
 
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        return 0;
 
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}
 
127
 
 
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int board_eth_init(bd_t *bis)
 
129
{
 
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        return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f);
 
131
}
 
132
 
 
133
int dram_init(void)
 
134
{
 
135
        gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
 
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                                    CONFIG_SYS_SDRAM_SIZE);
 
137
        return 0;
 
138
}
 
139
 
 
140
void reset_phy(void)
 
141
{
 
142
}