1
// Code for handling XHCI "Super speed" USB controllers.
3
// Copyright (C) 2013 Gerd Hoffmann <kraxel@redhat.com>
4
// Copyright (C) 2014 Kevin O'Connor <kevin@koconnor.net>
6
// This file may be distributed under the terms of the GNU LGPLv3 license.
8
#include "config.h" // CONFIG_*
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#include "malloc.h" // memalign_low
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#include "memmap.h" // PAGE_SIZE
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#include "output.h" // dprintf
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#include "pcidevice.h" // foreachpci
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#include "pci_ids.h" // PCI_CLASS_SERIAL_USB_XHCI
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#include "pci_regs.h" // PCI_BASE_ADDRESS_0
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#include "string.h" // memcpy
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#include "usb.h" // struct usb_s
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#include "usb-xhci.h" // struct ehci_qh
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#include "util.h" // timer_calc
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#include "x86.h" // readl
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// --------------------------------------------------------------
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#define XHCI_RING_ITEMS 16
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#define XHCI_RING_SIZE (XHCI_RING_ITEMS*sizeof(struct xhci_trb))
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* xhci_ring structs are allocated with XHCI_RING_SIZE alignment,
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* then we can get it from a trb pointer (provided by evt ring).
31
#define XHCI_RING(_trb) \
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((struct xhci_ring*)((u32)(_trb) & ~(XHCI_RING_SIZE-1)))
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// --------------------------------------------------------------
37
#define XHCI_CMD_RS (1<<0)
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#define XHCI_CMD_HCRST (1<<1)
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#define XHCI_CMD_INTE (1<<2)
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#define XHCI_CMD_HSEE (1<<3)
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#define XHCI_CMD_LHCRST (1<<7)
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#define XHCI_CMD_CSS (1<<8)
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#define XHCI_CMD_CRS (1<<9)
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#define XHCI_CMD_EWE (1<<10)
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#define XHCI_CMD_EU3S (1<<11)
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#define XHCI_STS_HCH (1<<0)
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#define XHCI_STS_HSE (1<<2)
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#define XHCI_STS_EINT (1<<3)
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#define XHCI_STS_PCD (1<<4)
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#define XHCI_STS_SSS (1<<8)
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#define XHCI_STS_RSS (1<<9)
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#define XHCI_STS_SRE (1<<10)
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#define XHCI_STS_CNR (1<<11)
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#define XHCI_STS_HCE (1<<12)
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#define XHCI_PORTSC_CCS (1<<0)
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#define XHCI_PORTSC_PED (1<<1)
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#define XHCI_PORTSC_OCA (1<<3)
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#define XHCI_PORTSC_PR (1<<4)
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#define XHCI_PORTSC_PLS_SHIFT 5
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#define XHCI_PORTSC_PLS_MASK 0xf
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#define XHCI_PORTSC_PP (1<<9)
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#define XHCI_PORTSC_SPEED_SHIFT 10
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#define XHCI_PORTSC_SPEED_MASK 0xf
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#define XHCI_PORTSC_SPEED_FULL (1<<10)
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#define XHCI_PORTSC_SPEED_LOW (2<<10)
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#define XHCI_PORTSC_SPEED_HIGH (3<<10)
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#define XHCI_PORTSC_SPEED_SUPER (4<<10)
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#define XHCI_PORTSC_PIC_SHIFT 14
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#define XHCI_PORTSC_PIC_MASK 0x3
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#define XHCI_PORTSC_LWS (1<<16)
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#define XHCI_PORTSC_CSC (1<<17)
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#define XHCI_PORTSC_PEC (1<<18)
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#define XHCI_PORTSC_WRC (1<<19)
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#define XHCI_PORTSC_OCC (1<<20)
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#define XHCI_PORTSC_PRC (1<<21)
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#define XHCI_PORTSC_PLC (1<<22)
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#define XHCI_PORTSC_CEC (1<<23)
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#define XHCI_PORTSC_CAS (1<<24)
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#define XHCI_PORTSC_WCE (1<<25)
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#define XHCI_PORTSC_WDE (1<<26)
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#define XHCI_PORTSC_WOE (1<<27)
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#define XHCI_PORTSC_DR (1<<30)
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#define XHCI_PORTSC_WPR (1<<31)
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#define TRB_TYPE_SHIFT 10
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#define TRB_TYPE_MASK 0x3f
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#define TRB_TYPE(t) (((t) >> TRB_TYPE_SHIFT) & TRB_TYPE_MASK)
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#define TRB_EV_ED (1<<2)
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#define TRB_TR_ENT (1<<1)
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#define TRB_TR_ISP (1<<2)
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#define TRB_TR_NS (1<<3)
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#define TRB_TR_CH (1<<4)
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#define TRB_TR_IOC (1<<5)
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#define TRB_TR_IDT (1<<6)
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#define TRB_TR_TBC_SHIFT 7
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#define TRB_TR_TBC_MASK 0x3
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#define TRB_TR_BEI (1<<9)
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#define TRB_TR_TLBPC_SHIFT 16
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#define TRB_TR_TLBPC_MASK 0xf
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#define TRB_TR_FRAMEID_SHIFT 20
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#define TRB_TR_FRAMEID_MASK 0x7ff
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#define TRB_TR_SIA (1<<31)
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#define TRB_TR_DIR (1<<16)
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#define TRB_CR_SLOTID_SHIFT 24
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#define TRB_CR_SLOTID_MASK 0xff
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#define TRB_CR_EPID_SHIFT 16
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#define TRB_CR_EPID_MASK 0x1f
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#define TRB_CR_BSR (1<<9)
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#define TRB_CR_DC (1<<9)
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#define TRB_LK_TC (1<<1)
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#define TRB_INTR_SHIFT 22
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#define TRB_INTR_MASK 0x3ff
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#define TRB_INTR(t) (((t).status >> TRB_INTR_SHIFT) & TRB_INTR_MASK)
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typedef enum TRBType {
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CR_CONFIGURE_ENDPOINT,
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CR_SET_LATENCY_TOLERANCE,
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CR_GET_PORT_BANDWIDTH,
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ER_PORT_STATUS_CHANGE,
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ER_BANDWIDTH_REQUEST,
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ER_DEVICE_NOTIFICATION,
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typedef enum TRBCCode {
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CC_DATA_BUFFER_ERROR,
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CC_USB_TRANSACTION_ERROR,
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CC_INVALID_STREAM_TYPE_ERROR,
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CC_SLOT_NOT_ENABLED_ERROR,
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CC_EP_NOT_ENABLED_ERROR,
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CC_BANDWIDTH_OVERRUN,
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CC_CONTEXT_STATE_ERROR,
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CC_NO_PING_RESPONSE_ERROR,
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CC_EVENT_RING_FULL_ERROR,
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CC_INCOMPATIBLE_DEVICE_ERROR,
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CC_MISSED_SERVICE_ERROR,
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CC_COMMAND_RING_STOPPED,
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CC_STOPPED_LENGTH_INVALID,
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CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29,
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CC_ISOCH_BUFFER_OVERRUN = 31,
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CC_INVALID_STREAM_ID_ERROR,
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CC_SECONDARY_BANDWIDTH_ERROR,
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CC_SPLIT_TRANSACTION_ERROR
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PLS_COMPILANCE_MODE = 10,
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#define xhci_get_field(data, field) \
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(((data) >> field##_SHIFT) & field##_MASK)
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// --------------------------------------------------------------
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struct xhci_trb ring[XHCI_RING_ITEMS];
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struct xhci_caps *caps;
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/* xhci data structures */
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struct xhci_devlist *devs;
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struct xhci_ring *cmds;
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struct xhci_ring *evts;
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struct xhci_er_seg *eseg;
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struct xhci_ring reqs;
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struct usb_pipe pipe;
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// --------------------------------------------------------------
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static const char *speed_name[16] = {
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static const int speed_from_xhci[16] = {
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[ 1 ] = USB_FULLSPEED,
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[ 2 ] = USB_LOWSPEED,
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[ 3 ] = USB_HIGHSPEED,
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[ 4 ] = USB_SUPERSPEED,
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static const int speed_to_xhci[] = {
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[ USB_FULLSPEED ] = 1,
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[ USB_LOWSPEED ] = 2,
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[ USB_HIGHSPEED ] = 3,
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[ USB_SUPERSPEED ] = 4,
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static int wait_bit(u32 *reg, u32 mask, int value, u32 timeout)
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u32 end = timer_calc(timeout);
293
while ((readl(reg) & mask) != value) {
294
if (timer_check(end)) {
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/****************************************************************
306
****************************************************************/
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#define XHCI_TIME_POSTPOWER 20
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// Check if device attached to port
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xhci_print_port_state(int loglevel, const char *prefix, u32 port, u32 portsc)
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u32 pls = xhci_get_field(portsc, XHCI_PORTSC_PLS);
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u32 speed = xhci_get_field(portsc, XHCI_PORTSC_SPEED);
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dprintf(loglevel, "%s port #%d: 0x%08x,%s%s pls %d, speed %d [%s]\n",
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prefix, port + 1, portsc,
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(portsc & XHCI_PORTSC_PP) ? " powered," : "",
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(portsc & XHCI_PORTSC_PED) ? " enabled," : "",
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pls, speed, speed_name[speed]);
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xhci_hub_detect(struct usbhub_s *hub, u32 port)
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struct usb_xhci_s *xhci = container_of(hub->cntl, struct usb_xhci_s, usb);
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u32 portsc = readl(&xhci->pr[port].portsc);
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return (portsc & XHCI_PORTSC_CCS) ? 1 : 0;
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// Reset device on port
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xhci_hub_reset(struct usbhub_s *hub, u32 port)
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struct usb_xhci_s *xhci = container_of(hub->cntl, struct usb_xhci_s, usb);
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u32 portsc = readl(&xhci->pr[port].portsc);
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if (!(portsc & XHCI_PORTSC_CCS))
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// Device no longer connected?!
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switch (xhci_get_field(portsc, XHCI_PORTSC_PLS)) {
344
// A USB3 port - controller automatically performs reset
347
// A USB2 port - perform device reset
348
xhci_print_port_state(3, __func__, port, portsc);
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writel(&xhci->pr[port].portsc, portsc | XHCI_PORTSC_PR);
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// Wait for device to complete reset and be enabled
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u32 end = timer_calc(100);
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portsc = readl(&xhci->pr[port].portsc);
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if (!(portsc & XHCI_PORTSC_CCS))
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// Device disconnected during reset
362
if (portsc & XHCI_PORTSC_PED)
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if (timer_check(end)) {
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int rc = speed_from_xhci[xhci_get_field(portsc, XHCI_PORTSC_SPEED)];
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xhci_print_port_state(1, "XHCI", port, portsc);
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xhci_hub_disconnect(struct usbhub_s *hub, u32 port)
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// XXX - should turn the port power off.
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static struct usbhub_op_s xhci_hub_ops = {
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.detect = xhci_hub_detect,
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.reset = xhci_hub_reset,
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.disconnect = xhci_hub_disconnect,
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// Find any devices connected to the root hub.
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xhci_check_ports(struct usb_xhci_s *xhci)
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// Wait for port power to stabilize.
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msleep(XHCI_TIME_POSTPOWER);
397
memset(&hub, 0, sizeof(hub));
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hub.cntl = &xhci->usb;
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hub.portcount = xhci->ports;
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hub.op = &xhci_hub_ops;
406
/****************************************************************
408
****************************************************************/
411
xhci_free_pipes(struct usb_xhci_s *xhci)
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// XXX - should walk list of pipes and free unused pipes.
417
configure_xhci(void *data)
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struct usb_xhci_s *xhci = data;
422
xhci->devs = memalign_high(64, sizeof(*xhci->devs) * (xhci->slots + 1));
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xhci->eseg = memalign_high(64, sizeof(*xhci->eseg));
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xhci->cmds = memalign_high(XHCI_RING_SIZE, sizeof(*xhci->cmds));
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xhci->evts = memalign_high(XHCI_RING_SIZE, sizeof(*xhci->evts));
426
if (!xhci->devs || !xhci->cmds || !xhci->evts || !xhci->eseg) {
430
memset(xhci->devs, 0, sizeof(*xhci->devs) * (xhci->slots + 1));
431
memset(xhci->cmds, 0, sizeof(*xhci->cmds));
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memset(xhci->evts, 0, sizeof(*xhci->evts));
433
memset(xhci->eseg, 0, sizeof(*xhci->eseg));
435
reg = readl(&xhci->op->usbcmd);
436
if (reg & XHCI_CMD_RS) {
438
writel(&xhci->op->usbcmd, reg);
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if (wait_bit(&xhci->op->usbsts, XHCI_STS_HCH, XHCI_STS_HCH, 32) != 0)
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dprintf(3, "%s: resetting\n", __func__);
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writel(&xhci->op->usbcmd, XHCI_CMD_HCRST);
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if (wait_bit(&xhci->op->usbcmd, XHCI_CMD_HCRST, 0, 100) != 0)
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if (wait_bit(&xhci->op->usbsts, XHCI_STS_CNR, 0, 100) != 0)
450
writel(&xhci->op->config, xhci->slots);
451
writel(&xhci->op->dcbaap_low, (u32)xhci->devs);
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writel(&xhci->op->dcbaap_high, 0);
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writel(&xhci->op->crcr_low, (u32)xhci->cmds | 1);
454
writel(&xhci->op->crcr_high, 0);
457
xhci->eseg->ptr_low = (u32)xhci->evts;
458
xhci->eseg->ptr_high = 0;
459
xhci->eseg->size = XHCI_RING_ITEMS;
460
writel(&xhci->ir->erstsz, 1);
461
writel(&xhci->ir->erdp_low, (u32)xhci->evts);
462
writel(&xhci->ir->erdp_high, 0);
463
writel(&xhci->ir->erstba_low, (u32)xhci->eseg);
464
writel(&xhci->ir->erstba_high, 0);
467
reg = readl(&xhci->caps->hcsparams2);
468
u32 spb = (reg >> 21 & 0x1f) << 5 | reg >> 27;
470
dprintf(3, "%s: setup %d scratch pad buffers\n", __func__, spb);
471
u64 *spba = memalign_high(64, sizeof(*spba) * spb);
472
void *pad = memalign_high(PAGE_SIZE, PAGE_SIZE * spb);
480
for (i = 0; i < spb; i++)
481
spba[i] = (u32)pad + (i * PAGE_SIZE);
482
xhci->devs[0].ptr_low = (u32)spba;
483
xhci->devs[0].ptr_high = 0;
486
reg = readl(&xhci->op->usbcmd);
488
writel(&xhci->op->usbcmd, reg);
491
int count = xhci_check_ports(xhci);
492
xhci_free_pipes(xhci);
497
// No devices found - shutdown and free controller.
498
dprintf(1, "XHCI no devices found\n");
499
reg = readl(&xhci->op->usbcmd);
501
writel(&xhci->op->usbcmd, reg);
502
wait_bit(&xhci->op->usbsts, XHCI_STS_HCH, XHCI_STS_HCH, 32);
513
xhci_controller_setup(struct pci_device *pci)
515
void *baseaddr = pci_enable_membar(pci, PCI_BASE_ADDRESS_0);
519
struct usb_xhci_s *xhci = malloc_high(sizeof(*xhci));
524
memset(xhci, 0, sizeof(*xhci));
525
xhci->caps = baseaddr;
526
xhci->op = baseaddr + readb(&xhci->caps->caplength);
527
xhci->pr = baseaddr + readb(&xhci->caps->caplength) + 0x400;
528
xhci->db = baseaddr + readl(&xhci->caps->dboff);
529
xhci->ir = baseaddr + readl(&xhci->caps->rtsoff) + 0x20;
531
u32 hcs1 = readl(&xhci->caps->hcsparams1);
532
u32 hcc = readl(&xhci->caps->hccparams);
533
xhci->ports = (hcs1 >> 24) & 0xff;
534
xhci->slots = hcs1 & 0xff;
535
xhci->xcap = ((hcc >> 16) & 0xffff) << 2;
536
xhci->context64 = (hcc & 0x04) ? 1 : 0;
539
xhci->usb.type = USB_TYPE_XHCI;
541
dprintf(1, "XHCI init on dev %pP: regs @ %p, %d ports, %d slots"
542
", %d byte contexts\n"
543
, pci, xhci->caps, xhci->ports, xhci->slots
544
, xhci->context64 ? 64 : 32);
548
void *addr = baseaddr + xhci->xcap;
550
struct xhci_xcap *xcap = addr;
551
u32 ports, name, cap = readl(&xcap->cap);
552
switch (cap & 0xff) {
554
name = readl(&xcap->data[0]);
555
ports = readl(&xcap->data[1]);
556
dprintf(1, "XHCI protocol %c%c%c%c %x.%02x"
557
", %d ports (offset %d), def %x\n"
560
, (name >> 16) & 0xff
561
, (name >> 24) & 0xff
564
, (ports >> 8) & 0xff
565
, (ports >> 0) & 0xff
569
dprintf(1, "XHCI extcap 0x%x @ %p\n", cap & 0xff, addr);
572
off = (cap >> 8) & 0xff;
577
u32 pagesize = readl(&xhci->op->pagesize);
578
if (PAGE_SIZE != (pagesize<<12)) {
579
dprintf(1, "XHCI driver does not support page size code %d\n"
585
pci_enable_busmaster(pci);
587
run_thread(configure_xhci, xhci);
593
if (! CONFIG_USB_XHCI)
595
struct pci_device *pci;
597
if (pci_classprog(pci) == PCI_CLASS_SERIAL_USB_XHCI)
598
xhci_controller_setup(pci);
603
/****************************************************************
604
* End point communication
605
****************************************************************/
607
static void xhci_doorbell(struct usb_xhci_s *xhci, u32 slotid, u32 value)
609
struct xhci_db *db = xhci->db;
610
void *addr = &db[slotid].doorbell;
614
static void xhci_process_events(struct usb_xhci_s *xhci)
616
struct xhci_ring *evts = xhci->evts;
619
/* check for event */
620
u32 nidx = evts->nidx;
622
struct xhci_trb *etrb = evts->ring + nidx;
623
u32 control = etrb->control;
624
if ((control & TRB_C) != (cs ? 1 : 0))
628
u32 evt_type = TRB_TYPE(control);
629
u32 evt_cc = (etrb->status >> 24) & 0xff;
632
case ER_COMMAND_COMPLETE:
634
struct xhci_trb *rtrb = (void*)etrb->ptr_low;
635
struct xhci_ring *ring = XHCI_RING(rtrb);
636
struct xhci_trb *evt = &ring->evt;
637
u32 eidx = rtrb - ring->ring + 1;
638
dprintf(5, "%s: ring %p [trb %p, evt %p, type %d, eidx %d, cc %d]\n",
639
__func__, ring, rtrb, evt, evt_type, eidx, evt_cc);
640
memcpy(evt, etrb, sizeof(*etrb));
644
case ER_PORT_STATUS_CHANGE:
646
u32 port = ((etrb->ptr_low >> 24) & 0xff) - 1;
647
// Read status, and clear port status change bits
648
u32 portsc = readl(&xhci->pr[port].portsc);
649
u32 pclear = (((portsc & ~(XHCI_PORTSC_PED|XHCI_PORTSC_PR))
650
& ~(XHCI_PORTSC_PLS_MASK<<XHCI_PORTSC_PLS_SHIFT))
651
| (1<<XHCI_PORTSC_PLS_SHIFT));
652
writel(&xhci->pr[port].portsc, pclear);
654
xhci_print_port_state(3, __func__, port, portsc);
658
dprintf(1, "%s: unknown event, type %d, cc %d\n",
659
__func__, evt_type, evt_cc);
663
/* move ring index, notify xhci */
665
if (nidx == XHCI_RING_ITEMS) {
671
struct xhci_ir *ir = xhci->ir;
672
u32 erdp = (u32)(evts->ring + nidx);
673
writel(&ir->erdp_low, erdp);
674
writel(&ir->erdp_high, 0);
678
static int xhci_ring_busy(struct xhci_ring *ring)
680
u32 eidx = ring->eidx;
681
u32 nidx = ring->nidx;
682
return (eidx != nidx);
685
static int xhci_event_wait(struct usb_xhci_s *xhci,
686
struct xhci_ring *ring,
689
u32 end = timer_calc(timeout);
692
xhci_process_events(xhci);
693
if (!xhci_ring_busy(ring)) {
694
u32 status = ring->evt.status;
695
return (status >> 24) & 0xff;
697
if (timer_check(end)) {
705
static void xhci_trb_queue(struct xhci_ring *ring,
706
struct xhci_trb *trb)
708
u32 nidx = ring->nidx;
710
struct xhci_trb *dst;
713
if (nidx == XHCI_RING_ITEMS-1) {
714
dst = ring->ring + nidx;
715
control = (TR_LINK << 10); // trb type
716
control |= TRB_LK_TC;
717
control |= (cs ? TRB_C : 0);
718
dst->ptr_low = (u32)&ring[0];
721
dst->control = control;
727
dprintf(5, "%s: ring %p [linked]\n", __func__, ring);
730
dst = ring->ring + nidx;
731
control = trb->control | (cs ? TRB_C : 0);
733
dst->ptr_low = trb->ptr_low;
734
dst->ptr_high = trb->ptr_high;
735
dst->status = trb->status;
736
dst->control = control;
740
dprintf(5, "%s: ring %p [nidx %d, len %d]\n",
741
__func__, ring, nidx,
742
trb->status & 0xffff);
745
static int xhci_cmd_submit(struct usb_xhci_s *xhci,
746
struct xhci_trb *cmd)
750
mutex_lock(&xhci->cmds->lock);
751
xhci_trb_queue(xhci->cmds, cmd);
752
xhci_doorbell(xhci, 0, 0);
753
rc = xhci_event_wait(xhci, xhci->cmds, 1000);
754
mutex_unlock(&xhci->cmds->lock);
758
static int xhci_cmd_enable_slot(struct usb_xhci_s *xhci)
760
struct xhci_trb cmd = {
764
.control = (CR_ENABLE_SLOT << 10)
766
dprintf(3, "%s:\n", __func__);
767
int cc = xhci_cmd_submit(xhci, &cmd);
768
if (cc != CC_SUCCESS)
770
return (xhci->cmds->evt.control >> 24) & 0xff;
773
static int xhci_cmd_disable_slot(struct usb_xhci_s *xhci, u32 slotid)
775
struct xhci_trb cmd = {
779
.control = (slotid << 24) | (CR_DISABLE_SLOT << 10)
781
dprintf(3, "%s: slotid %d\n", __func__, slotid);
782
return xhci_cmd_submit(xhci, &cmd);
785
static int xhci_cmd_address_device(struct usb_xhci_s *xhci, u32 slotid
786
, struct xhci_inctx *inctx)
788
struct xhci_trb cmd = {
789
.ptr_low = (u32)inctx,
792
.control = (slotid << 24) | (CR_ADDRESS_DEVICE << 10)
794
dprintf(3, "%s: slotid %d\n", __func__, slotid);
795
return xhci_cmd_submit(xhci, &cmd);
798
static int xhci_cmd_configure_endpoint(struct usb_xhci_s *xhci, u32 slotid
799
, struct xhci_inctx *inctx)
801
struct xhci_trb cmd = {
802
.ptr_low = (u32)inctx,
805
.control = (slotid << 24) | (CR_CONFIGURE_ENDPOINT << 10)
807
dprintf(3, "%s: slotid %d, add 0x%x, del 0x%x\n", __func__,
808
slotid, inctx->add, inctx->del);
809
return xhci_cmd_submit(xhci, &cmd);
812
static int xhci_cmd_evaluate_context(struct usb_xhci_s *xhci, u32 slotid
813
, struct xhci_inctx *inctx)
815
struct xhci_trb cmd = {
816
.ptr_low = (u32)inctx,
819
.control = (slotid << 24) | (CR_EVALUATE_CONTEXT << 10)
821
dprintf(3, "%s: slotid %d, add 0x%x, del 0x%x\n", __func__,
822
slotid, inctx->add, inctx->del);
823
return xhci_cmd_submit(xhci, &cmd);
826
static struct xhci_inctx *
827
xhci_alloc_inctx(struct usbdevice_s *usbdev, int maxepid)
829
struct usb_xhci_s *xhci = container_of(
830
usbdev->hub->cntl, struct usb_xhci_s, usb);
831
int size = (sizeof(struct xhci_inctx) * 33) << xhci->context64;
832
struct xhci_inctx *in = memalign_tmphigh(2048 << xhci->context64, size);
839
struct xhci_slotctx *slot = (void*)&in[1 << xhci->context64];
840
slot->ctx[0] |= maxepid << 27; // context entries
841
slot->ctx[0] |= speed_to_xhci[usbdev->speed] << 20;
843
// Set high-speed hub flags.
844
struct usbdevice_s *hubdev = usbdev->hub->usbdev;
846
if (usbdev->speed == USB_LOWSPEED || usbdev->speed == USB_FULLSPEED) {
847
struct xhci_pipe *hpipe = container_of(
848
hubdev->defpipe, struct xhci_pipe, pipe);
849
if (hubdev->speed == USB_HIGHSPEED) {
850
slot->ctx[2] |= hpipe->slotid;
851
slot->ctx[2] |= (usbdev->port+1) << 8;
853
struct xhci_slotctx *hslot = (void*)xhci->devs[hpipe->slotid].ptr_low;
854
slot->ctx[2] = hslot->ctx[2];
858
while (usbdev->hub->usbdev) {
860
route |= (usbdev->port+1) & 0xf;
861
usbdev = usbdev->hub->usbdev;
863
slot->ctx[0] |= route;
866
slot->ctx[1] |= (usbdev->port+1) << 16;
871
static int xhci_config_hub(struct usbhub_s *hub)
873
struct usb_xhci_s *xhci = container_of(
874
hub->cntl, struct usb_xhci_s, usb);
875
struct xhci_pipe *pipe = container_of(
876
hub->usbdev->defpipe, struct xhci_pipe, pipe);
877
struct xhci_slotctx *hdslot = (void*)xhci->devs[pipe->slotid].ptr_low;
878
if ((hdslot->ctx[3] >> 27) == 3)
879
// Already configured
881
struct xhci_inctx *in = xhci_alloc_inctx(hub->usbdev, 1);
885
struct xhci_slotctx *slot = (void*)&in[1 << xhci->context64];
886
slot->ctx[0] |= 1 << 26;
887
slot->ctx[1] |= hub->portcount << 24;
889
int cc = xhci_cmd_configure_endpoint(xhci, pipe->slotid, in);
891
if (cc != CC_SUCCESS) {
892
dprintf(1, "%s: configure hub: failed (cc %d)\n", __func__, cc);
898
static struct usb_pipe *
899
xhci_alloc_pipe(struct usbdevice_s *usbdev
900
, struct usb_endpoint_descriptor *epdesc)
902
u8 eptype = epdesc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
903
struct usb_xhci_s *xhci = container_of(
904
usbdev->hub->cntl, struct usb_xhci_s, usb);
905
struct xhci_pipe *pipe;
908
if (epdesc->bEndpointAddress == 0) {
911
epid = (epdesc->bEndpointAddress & 0x0f) * 2;
912
epid += (epdesc->bEndpointAddress & USB_DIR_IN) ? 1 : 0;
915
if (eptype == USB_ENDPOINT_XFER_CONTROL)
916
pipe = memalign_high(XHCI_RING_SIZE, sizeof(*pipe));
918
pipe = memalign_low(XHCI_RING_SIZE, sizeof(*pipe));
923
memset(pipe, 0, sizeof(*pipe));
925
usb_desc2pipe(&pipe->pipe, usbdev, epdesc);
928
if (eptype == USB_ENDPOINT_XFER_INT) {
929
pipe->buf = malloc_high(pipe->pipe.maxpacket);
937
// Allocate input context and initialize endpoint info.
938
struct xhci_inctx *in = xhci_alloc_inctx(usbdev, epid);
941
in->add = 0x01 | (1 << epid);
942
struct xhci_epctx *ep = (void*)&in[(pipe->epid+1) << xhci->context64];
943
if (eptype == USB_ENDPOINT_XFER_INT)
944
ep->ctx[0] = (usb_get_period(usbdev, epdesc) + 3) << 16;
945
ep->ctx[1] |= eptype << 3;
946
if (epdesc->bEndpointAddress & USB_DIR_IN
947
|| eptype == USB_ENDPOINT_XFER_CONTROL)
948
ep->ctx[1] |= 1 << 5;
949
ep->ctx[1] |= pipe->pipe.maxpacket << 16;
950
ep->deq_low = (u32)&pipe->reqs.ring[0];
951
ep->deq_low |= 1; // dcs
952
ep->length = pipe->pipe.maxpacket;
954
dprintf(3, "%s: usbdev %p, ring %p, slotid %d, epid %d\n", __func__,
955
usbdev, &pipe->reqs, pipe->slotid, pipe->epid);
956
if (pipe->epid == 1) {
957
if (usbdev->hub->usbdev) {
958
// Make sure parent hub is configured.
959
int ret = xhci_config_hub(usbdev->hub);
964
u32 size = (sizeof(struct xhci_slotctx) * 32) << xhci->context64;
965
struct xhci_slotctx *dev = memalign_high(1024 << xhci->context64, size);
970
int slotid = xhci_cmd_enable_slot(xhci);
972
dprintf(1, "%s: enable slot: failed\n", __func__);
976
dprintf(3, "%s: enable slot: got slotid %d\n", __func__, slotid);
977
memset(dev, 0, size);
978
xhci->devs[slotid].ptr_low = (u32)dev;
979
xhci->devs[slotid].ptr_high = 0;
981
// Send set_address command.
982
int cc = xhci_cmd_address_device(xhci, slotid, in);
983
if (cc != CC_SUCCESS) {
984
dprintf(1, "%s: address device: failed (cc %d)\n", __func__, cc);
985
cc = xhci_cmd_disable_slot(xhci, slotid);
986
if (cc != CC_SUCCESS) {
987
dprintf(1, "%s: disable failed (cc %d)\n", __func__, cc);
990
xhci->devs[slotid].ptr_low = 0;
994
pipe->slotid = slotid;
996
struct xhci_pipe *defpipe = container_of(
997
usbdev->defpipe, struct xhci_pipe, pipe);
998
pipe->slotid = defpipe->slotid;
999
// Send configure command.
1000
int cc = xhci_cmd_configure_endpoint(xhci, pipe->slotid, in);
1001
if (cc != CC_SUCCESS) {
1002
dprintf(1, "%s: configure endpoint: failed (cc %d)\n", __func__, cc);
1017
xhci_realloc_pipe(struct usbdevice_s *usbdev, struct usb_pipe *upipe
1018
, struct usb_endpoint_descriptor *epdesc)
1020
if (!CONFIG_USB_XHCI)
1023
usb_add_freelist(upipe);
1027
return xhci_alloc_pipe(usbdev, epdesc);
1028
u8 eptype = epdesc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
1029
int oldmaxpacket = upipe->maxpacket;
1030
usb_desc2pipe(upipe, usbdev, epdesc);
1031
struct xhci_pipe *pipe = container_of(upipe, struct xhci_pipe, pipe);
1032
struct usb_xhci_s *xhci = container_of(
1033
pipe->pipe.cntl, struct usb_xhci_s, usb);
1034
dprintf(3, "%s: usbdev %p, ring %p, slotid %d, epid %d\n", __func__,
1035
usbdev, &pipe->reqs, pipe->slotid, pipe->epid);
1036
if (eptype != USB_ENDPOINT_XFER_CONTROL || upipe->maxpacket == oldmaxpacket)
1039
// maxpacket has changed on control endpoint - update controller.
1040
dprintf(1, "%s: reconf ctl endpoint pkt size: %d -> %d\n",
1041
__func__, oldmaxpacket, pipe->pipe.maxpacket);
1042
struct xhci_inctx *in = xhci_alloc_inctx(usbdev, 1);
1046
struct xhci_epctx *ep = (void*)&in[2 << xhci->context64];
1047
ep->ctx[1] |= (pipe->pipe.maxpacket << 16);
1048
int cc = xhci_cmd_evaluate_context(xhci, pipe->slotid, in);
1049
if (cc != CC_SUCCESS) {
1050
dprintf(1, "%s: reconf ctl endpoint: failed (cc %d)\n",
1058
static void xhci_xfer_queue(struct xhci_pipe *pipe,
1059
void *data, int datalen, u32 flags)
1061
struct xhci_trb trb;
1062
memset(&trb, 0, sizeof(trb));
1063
if (flags & TRB_TR_IDT)
1064
memcpy(&trb.ptr_low, data, datalen);
1066
trb.ptr_low = (u32)data;
1067
trb.status = datalen;
1068
trb.control = flags;
1069
xhci_trb_queue(&pipe->reqs, &trb);
1072
static void xhci_xfer_kick(struct xhci_pipe *pipe)
1074
struct usb_xhci_s *xhci = container_of(
1075
pipe->pipe.cntl, struct usb_xhci_s, usb);
1076
u32 slotid = pipe->slotid;
1077
u32 epid = pipe->epid;
1079
dprintf(5, "%s: ring %p, slotid %d, epid %d\n",
1080
__func__, &pipe->reqs, slotid, epid);
1081
xhci_doorbell(xhci, slotid, epid);
1084
static void xhci_xfer_normal(struct xhci_pipe *pipe,
1085
void *data, int datalen)
1087
xhci_xfer_queue(pipe, data, datalen, (TR_NORMAL << 10) | TRB_TR_IOC);
1088
xhci_xfer_kick(pipe);
1092
xhci_send_pipe(struct usb_pipe *p, int dir, const void *cmd
1093
, void *data, int datalen)
1095
if (!CONFIG_USB_XHCI)
1097
struct xhci_pipe *pipe = container_of(p, struct xhci_pipe, pipe);
1098
struct usb_xhci_s *xhci = container_of(
1099
pipe->pipe.cntl, struct usb_xhci_s, usb);
1102
const struct usb_ctrlrequest *req = cmd;
1103
if (req->bRequest == USB_REQ_SET_ADDRESS)
1104
// Set address command sent during xhci_alloc_pipe.
1107
xhci_xfer_queue(pipe, (void*)req, USB_CONTROL_SETUP_SIZE
1108
, (TR_SETUP << 10) | TRB_TR_IDT
1109
| ((datalen ? (dir ? 3 : 2) : 0) << 16));
1111
xhci_xfer_queue(pipe, data, datalen, (TR_DATA << 10)
1112
| ((dir ? 1 : 0) << 16));
1113
xhci_xfer_queue(pipe, NULL, 0, (TR_STATUS << 10) | TRB_TR_IOC
1114
| ((dir ? 0 : 1) << 16));
1115
xhci_xfer_kick(pipe);
1117
xhci_xfer_normal(pipe, data, datalen);
1120
int cc = xhci_event_wait(xhci, &pipe->reqs, usb_xfer_time(p, datalen));
1121
if (cc != CC_SUCCESS) {
1122
dprintf(1, "%s: xfer failed (cc %d)\n", __func__, cc);
1130
xhci_poll_intr(struct usb_pipe *p, void *data)
1132
if (!CONFIG_USB_XHCI)
1135
struct xhci_pipe *pipe = container_of(p, struct xhci_pipe, pipe);
1136
struct usb_xhci_s *xhci = container_of(
1137
pipe->pipe.cntl, struct usb_xhci_s, usb);
1138
u32 len = pipe->pipe.maxpacket;
1139
void *buf = pipe->buf;
1140
int bufused = pipe->bufused;
1143
xhci_xfer_normal(pipe, buf, len);
1145
pipe->bufused = bufused;
1149
xhci_process_events(xhci);
1150
if (xhci_ring_busy(&pipe->reqs))
1152
dprintf(5, "%s: st %x ct %x [ %p <= %p / %d ]\n", __func__,
1153
pipe->reqs.evt.status,
1154
pipe->reqs.evt.control,
1156
memcpy(data, buf, len);
1157
xhci_xfer_normal(pipe, buf, len);