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#include <ipxe/uaccess.h>
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#include <ipxe/interface.h>
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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* An ATA Logical Block Address
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* ATA controllers have three byte-wide registers for specifying the
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* block address: LBA Low, LBA Mid and LBA High. This allows for a
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* 24-bit address. Some devices support the "48-bit address feature
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* set" (LBA48), in which case each of these byte-wide registers is
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* actually a two-entry FIFO, and the "previous" byte pushed into the
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* FIFO is used as the corresponding high-order byte. So, to set up
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* the 48-bit address 0x123456abcdef, you would issue
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* 0x56 -> LBA Low register
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* 0xef -> LBA Low register
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* 0x34 -> LBA Mid register
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* 0xcd -> LBA Mid register
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* 0x12 -> LBA High register
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* 0xab -> LBA High register
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* This structure encapsulates this information by providing a single
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* 64-bit integer in native byte order, unioned with bytes named so
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* that the sequence becomes
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* low_prev -> LBA Low register
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* low_cur -> LBA Low register
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* mid_prev -> LBA Mid register
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* mid_cur -> LBA Mid register
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* high_prev -> LBA High register
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* high_cur -> LBA High register
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* Just to complicate matters further, in non-LBA48 mode it is
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* possible to have a 28-bit address, in which case bits 27:24 must be
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* written into the low four bits of the Device register.
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/** LBA as a 64-bit integer in native-endian order */
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#if __BYTE_ORDER == __LITTLE_ENDIAN
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#elif __BYTE_ORDER == __BIG_ENDIAN
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#error "I need a byte order"
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/** An ATA 2-byte FIFO register */
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/** Value in native-endian order */
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#if __BYTE_ORDER == __LITTLE_ENDIAN
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#elif __BYTE_ORDER == __BIG_ENDIAN
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#error "I need a byte order"
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/** ATA command block */
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/** Logical block address */
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/** Error/feature register */
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union ata_fifo err_feat;
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/** Device register */
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/** Command/status register */
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/** Use LBA48 extended addressing */
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/** Obsolete bits in the ATA device register */
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#define ATA_DEV_OBSOLETE 0xa0
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/** LBA flag in the ATA device register */
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#define ATA_DEV_LBA 0x40
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/** Slave ("device 1") flag in the ATA device register */
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#define ATA_DEV_SLAVE 0x10
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/** Master ("device 0") flag in the ATA device register */
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#define ATA_DEV_MASTER 0x00
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/** Mask of non-LBA portion of device register */
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#define ATA_DEV_MASK 0xf0
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/** "Read sectors" command */
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#define ATA_CMD_READ 0x20
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/** "Read sectors (ext)" command */
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#define ATA_CMD_READ_EXT 0x24
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/** "Write sectors" command */
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#define ATA_CMD_WRITE 0x30
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/** "Write sectors (ext)" command */
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#define ATA_CMD_WRITE_EXT 0x34
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/** "Identify" command */
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#define ATA_CMD_IDENTIFY 0xec
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/** Command completed in error */
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#define ATA_STAT_ERR 0x01
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* Structure returned by ATA IDENTIFY command
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* This is a huge structure with many fields that we don't care about,
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* so we implement only a few fields.
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struct ata_identity {
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uint16_t ignore_a[27]; /* words 0-26 */
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uint16_t model[20]; /* words 27-46 */
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uint16_t ignore_b[13]; /* words 47-59 */
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uint32_t lba_sectors; /* words 60-61 */
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uint16_t ignore_c[21]; /* words 62-82 */
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uint16_t supports_lba48; /* word 83 */
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uint16_t ignore_d[16]; /* words 84-99 */
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uint64_t lba48_sectors; /* words 100-103 */
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uint16_t ignore_e[152]; /* words 104-255 */
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/** Supports LBA48 flag */
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#define ATA_SUPPORTS_LBA48 ( 1 << 10 )
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/** ATA sector size */
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#define ATA_SECTOR_SIZE 512
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/** An ATA command information unit */
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/** ATA command block */
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/** Data-out buffer (may be NULL)
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* If non-NULL, this buffer must be ata_command::cb::count
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/** Data-out buffer length
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* Must be zero if @c data_out is NULL
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/** Data-in buffer (may be NULL)
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* If non-NULL, this buffer must be ata_command::cb::count
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/** Data-in buffer length
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* Must be zero if @c data_in is NULL
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extern int ata_command ( struct interface *control, struct interface *data,
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struct ata_cmd *command );
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#define ata_command_TYPE( object_type ) \
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typeof ( int ( object_type, struct interface *data, \
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struct ata_cmd *command ) )
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extern int ata_open ( struct interface *block, struct interface *ata,
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unsigned int device, unsigned int max_count );
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#endif /* _IPXE_ATA_H */