2
* Copyright (C) 2012 Samsung Electronics
4
* Author: Donghwa Lee <dh09.lee@samsung.com>
6
* SPDX-License-Identifier: GPL-2.0+
10
#include <asm/arch/mipi_dsim.h>
12
#include "exynos_mipi_dsi_lowlevel.h"
13
#include "exynos_mipi_dsi_common.h"
15
static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
17
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
18
int reverse = dsim_dev->dsim_lcd_dev->reverse_panel;
19
static const unsigned char data_to_send[] = {
20
0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
21
0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
22
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
23
0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
27
static const unsigned char data_to_send_reverse[] = {
28
0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
29
0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
30
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
31
0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
36
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
38
ARRAY_SIZE(data_to_send_reverse));
40
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
41
data_to_send, ARRAY_SIZE(data_to_send));
45
static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
47
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
48
static const unsigned char data_to_send[] = {
49
0xf2, 0x80, 0x03, 0x0d
52
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
53
data_to_send, ARRAY_SIZE(data_to_send));
56
static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
58
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
59
/* 7500K 2.2 Set : 30cd */
60
static const unsigned char data_to_send[] = {
61
0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad,
62
0xaf, 0xba, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1,
63
0xdc, 0xc0, 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
66
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
67
data_to_send, ARRAY_SIZE(data_to_send));
70
static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
72
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
73
static const unsigned char data_to_send[] = {
77
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
78
ARRAY_SIZE(data_to_send));
81
static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
83
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
84
static const unsigned char data_to_send[] = {
85
0xf6, 0x00, 0x02, 0x00
88
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
89
data_to_send, ARRAY_SIZE(data_to_send));
92
static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
94
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
95
static const unsigned char data_to_send[] = {
96
0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
100
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
101
data_to_send, ARRAY_SIZE(data_to_send));
104
static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev)
106
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
107
static const unsigned char data_to_send[] = {
108
0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
111
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
112
data_to_send, ARRAY_SIZE(data_to_send));
115
static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev)
117
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
118
static const unsigned char data_to_send[] = {
119
0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
122
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
123
data_to_send, ARRAY_SIZE(data_to_send));
126
static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev)
128
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
129
static const unsigned char data_to_send[] = {
130
0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
133
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
134
data_to_send, ARRAY_SIZE(data_to_send));
137
static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev)
139
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
140
static const unsigned char data_to_send[] = {
144
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
145
ARRAY_SIZE(data_to_send));
148
static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev)
150
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
151
static const unsigned char data_to_send[] = {
152
0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
155
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
156
data_to_send, ARRAY_SIZE(data_to_send));
159
static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev)
161
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
162
static const unsigned char data_to_send[] = {
166
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
167
data_to_send, ARRAY_SIZE(data_to_send));
170
static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev)
172
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
173
static const unsigned char data_to_send[] = {
177
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
178
ARRAY_SIZE(data_to_send));
181
static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev)
183
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
184
static const unsigned char data_to_send[] = {
188
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
189
ARRAY_SIZE(data_to_send));
192
static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev)
194
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
195
static const unsigned char data_to_send[] = {
199
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
200
data_to_send, ARRAY_SIZE(data_to_send));
203
static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev)
205
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
206
static const unsigned char data_to_send[] = {
210
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
211
data_to_send, ARRAY_SIZE(data_to_send));
214
static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev)
217
* in case of setting gamma and panel condition at first,
218
* it shuold be setting like below.
219
* set_gamma() -> set_panel_condition()
222
s6e8ax0_apply_level1_key(dsim_dev);
223
s6e8ax0_apply_mtp_key(dsim_dev);
225
s6e8ax0_sleep_out(dsim_dev);
227
s6e8ax0_panel_cond(dsim_dev);
228
s6e8ax0_display_cond(dsim_dev);
229
s6e8ax0_gamma_cond(dsim_dev);
230
s6e8ax0_gamma_update(dsim_dev);
232
s6e8ax0_etc_source_control(dsim_dev);
233
s6e8ax0_elvss_set(dsim_dev);
234
s6e8ax0_etc_pentile_control(dsim_dev);
235
s6e8ax0_etc_mipi_control1(dsim_dev);
236
s6e8ax0_etc_mipi_control2(dsim_dev);
237
s6e8ax0_etc_power_control(dsim_dev);
238
s6e8ax0_etc_mipi_control3(dsim_dev);
239
s6e8ax0_etc_mipi_control4(dsim_dev);
242
static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev)
244
s6e8ax0_panel_init(dsim_dev);
249
static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev)
251
s6e8ax0_display_on(dsim_dev);
254
static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
258
.mipi_panel_init = s6e8ax0_panel_set,
259
.mipi_display_on = s6e8ax0_display_enable,
262
void s6e8ax0_init(void)
264
exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);