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Viewing changes to roms/openbios/arch/sparc64/lsu.h

  • Committer: Phil Dennis-Jordan
  • Date: 2017-07-21 08:03:43 UTC
  • mfrom: (1.1.1)
  • Revision ID: phil@philjordan.eu-20170721080343-2yr2vdj7713czahv
New upstream release 2.9.0.

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roms/openbios/arch/sparc64/lsu.h
 
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/* $Id: lsu.h,v 1.2 1997/04/04 00:50:22 davem Exp $ */
 
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#ifndef _SPARC64_LSU_H
 
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#define _SPARC64_LSU_H
 
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#include "const.h"
 
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/* LSU Control Register */
 
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#define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/
 
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#define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/
 
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#define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/
 
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#define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/
 
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#define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/
 
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#define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/
 
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#define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables.     */
 
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#define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable.         */
 
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#define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable.  */
 
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#define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable.       */
 
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#define LSU_CONTROL_IC _AC(0x0000000000000001,UL) /* Instruction cache enable.*/
 
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#endif /* !(_SPARC64_LSU_H) */