6
#include <linux/kernel.h>
8
#include <asm/compiler.h>
9
#include <asm/system.h>
10
#include <asm/pgtable.h>
11
#include <asm/machvec.h>
12
#include <asm/hwrpb.h>
14
/* The generic header contains only prototypes. Including it ensures that
15
the implementation we have here matches that interface. */
16
#include <asm-generic/iomap.h>
18
/* We don't use IO slowdowns on the Alpha, but.. */
19
#define __SLOW_DOWN_IO do { } while (0)
20
#define SLOW_DOWN_IO do { } while (0)
23
* Virtual -> physical identity mapping starts at this offset
25
#ifdef USE_48_BIT_KSEG
26
#define IDENT_ADDR 0xffff800000000000UL
28
#define IDENT_ADDR 0xfffffc0000000000UL
32
* We try to avoid hae updates (thus the cache), but when we
33
* do need to update the hae, we need to do it atomically, so
34
* that any interrupts wouldn't get confused with the hae
35
* register not being up-to-date with respect to the hardware
38
extern inline void __set_hae(unsigned long new_hae)
40
unsigned long flags = swpipl(IPL_MAX);
44
alpha_mv.hae_cache = new_hae;
45
*alpha_mv.hae_register = new_hae;
47
/* Re-read to make sure it was written. */
48
new_hae = *alpha_mv.hae_register;
54
extern inline void set_hae(unsigned long new_hae)
56
if (new_hae != alpha_mv.hae_cache)
61
* Change virtual addresses to physical addresses and vv.
63
#ifdef USE_48_BIT_KSEG
64
static inline unsigned long virt_to_phys(void *address)
66
return (unsigned long)address - IDENT_ADDR;
69
static inline void * phys_to_virt(unsigned long address)
71
return (void *) (address + IDENT_ADDR);
74
static inline unsigned long virt_to_phys(void *address)
76
unsigned long phys = (unsigned long)address;
78
/* Sign-extend from bit 41. */
80
phys = (long)phys >> (64 - 41);
82
/* Crop to the physical address width of the processor. */
83
phys &= (1ul << hwrpb->pa_bits) - 1;
88
static inline void * phys_to_virt(unsigned long address)
90
return (void *)(IDENT_ADDR + (address & ((1ul << 41) - 1)));
94
#define page_to_phys(page) page_to_pa(page)
96
static inline dma_addr_t __deprecated isa_page_to_bus(struct page *page)
98
return page_to_phys(page);
101
/* Maximum PIO space address supported? */
102
#define IO_SPACE_LIMIT 0xffff
105
* Change addresses as seen by the kernel (virtual) to addresses as
106
* seen by a device (bus), and vice versa.
108
* Note that this only works for a limited range of kernel addresses,
109
* and very well may not span all memory. Consider this interface
110
* deprecated in favour of the DMA-mapping API.
112
extern unsigned long __direct_map_base;
113
extern unsigned long __direct_map_size;
115
static inline unsigned long __deprecated virt_to_bus(void *address)
117
unsigned long phys = virt_to_phys(address);
118
unsigned long bus = phys + __direct_map_base;
119
return phys <= __direct_map_size ? bus : 0;
121
#define isa_virt_to_bus virt_to_bus
123
static inline void * __deprecated bus_to_virt(unsigned long address)
127
/* This check is a sanity check but also ensures that bus address 0
128
maps to virtual address 0 which is useful to detect null pointers
129
(the NCR driver is much simpler if NULL pointers are preserved). */
130
address -= __direct_map_base;
131
virt = phys_to_virt(address);
132
return (long)address <= 0 ? NULL : virt;
134
#define isa_bus_to_virt bus_to_virt
137
* There are different chipsets to interface the Alpha CPUs to the world.
140
#define IO_CONCAT(a,b) _IO_CONCAT(a,b)
141
#define _IO_CONCAT(a,b) a ## _ ## b
143
#ifdef CONFIG_ALPHA_GENERIC
145
/* In a generic kernel, we always go through the machine vector. */
147
#define REMAP1(TYPE, NAME, QUAL) \
148
static inline TYPE generic_##NAME(QUAL void __iomem *addr) \
150
return alpha_mv.mv_##NAME(addr); \
153
#define REMAP2(TYPE, NAME, QUAL) \
154
static inline void generic_##NAME(TYPE b, QUAL void __iomem *addr) \
156
alpha_mv.mv_##NAME(b, addr); \
159
REMAP1(unsigned int, ioread8, /**/)
160
REMAP1(unsigned int, ioread16, /**/)
161
REMAP1(unsigned int, ioread32, /**/)
162
REMAP1(u8, readb, const volatile)
163
REMAP1(u16, readw, const volatile)
164
REMAP1(u32, readl, const volatile)
165
REMAP1(u64, readq, const volatile)
167
REMAP2(u8, iowrite8, /**/)
168
REMAP2(u16, iowrite16, /**/)
169
REMAP2(u32, iowrite32, /**/)
170
REMAP2(u8, writeb, volatile)
171
REMAP2(u16, writew, volatile)
172
REMAP2(u32, writel, volatile)
173
REMAP2(u64, writeq, volatile)
178
extern inline void __iomem *generic_ioportmap(unsigned long a)
180
return alpha_mv.mv_ioportmap(a);
183
static inline void __iomem *generic_ioremap(unsigned long a, unsigned long s)
185
return alpha_mv.mv_ioremap(a, s);
188
static inline void generic_iounmap(volatile void __iomem *a)
190
return alpha_mv.mv_iounmap(a);
193
static inline int generic_is_ioaddr(unsigned long a)
195
return alpha_mv.mv_is_ioaddr(a);
198
static inline int generic_is_mmio(const volatile void __iomem *a)
200
return alpha_mv.mv_is_mmio(a);
203
#define __IO_PREFIX generic
204
#define generic_trivial_rw_bw 0
205
#define generic_trivial_rw_lq 0
206
#define generic_trivial_io_bw 0
207
#define generic_trivial_io_lq 0
208
#define generic_trivial_iounmap 0
212
#if defined(CONFIG_ALPHA_APECS)
213
# include <asm/core_apecs.h>
214
#elif defined(CONFIG_ALPHA_CIA)
215
# include <asm/core_cia.h>
216
#elif defined(CONFIG_ALPHA_IRONGATE)
217
# include <asm/core_irongate.h>
218
#elif defined(CONFIG_ALPHA_JENSEN)
219
# include <asm/jensen.h>
220
#elif defined(CONFIG_ALPHA_LCA)
221
# include <asm/core_lca.h>
222
#elif defined(CONFIG_ALPHA_MARVEL)
223
# include <asm/core_marvel.h>
224
#elif defined(CONFIG_ALPHA_MCPCIA)
225
# include <asm/core_mcpcia.h>
226
#elif defined(CONFIG_ALPHA_POLARIS)
227
# include <asm/core_polaris.h>
228
#elif defined(CONFIG_ALPHA_T2)
229
# include <asm/core_t2.h>
230
#elif defined(CONFIG_ALPHA_TSUNAMI)
231
# include <asm/core_tsunami.h>
232
#elif defined(CONFIG_ALPHA_TITAN)
233
# include <asm/core_titan.h>
234
#elif defined(CONFIG_ALPHA_WILDFIRE)
235
# include <asm/core_wildfire.h>
237
#error "What system is this?"
243
* We always have external versions of these routines.
245
extern u8 inb(unsigned long port);
246
extern u16 inw(unsigned long port);
247
extern u32 inl(unsigned long port);
248
extern void outb(u8 b, unsigned long port);
249
extern void outw(u16 b, unsigned long port);
250
extern void outl(u32 b, unsigned long port);
252
extern u8 readb(const volatile void __iomem *addr);
253
extern u16 readw(const volatile void __iomem *addr);
254
extern u32 readl(const volatile void __iomem *addr);
255
extern u64 readq(const volatile void __iomem *addr);
256
extern void writeb(u8 b, volatile void __iomem *addr);
257
extern void writew(u16 b, volatile void __iomem *addr);
258
extern void writel(u32 b, volatile void __iomem *addr);
259
extern void writeq(u64 b, volatile void __iomem *addr);
261
extern u8 __raw_readb(const volatile void __iomem *addr);
262
extern u16 __raw_readw(const volatile void __iomem *addr);
263
extern u32 __raw_readl(const volatile void __iomem *addr);
264
extern u64 __raw_readq(const volatile void __iomem *addr);
265
extern void __raw_writeb(u8 b, volatile void __iomem *addr);
266
extern void __raw_writew(u16 b, volatile void __iomem *addr);
267
extern void __raw_writel(u32 b, volatile void __iomem *addr);
268
extern void __raw_writeq(u64 b, volatile void __iomem *addr);
271
* Mapping from port numbers to __iomem space is pretty easy.
274
/* These two have to be extern inline because of the extern prototype from
275
<asm-generic/iomap.h>. It is not legal to mix "extern" and "static" for
276
the same declaration. */
277
extern inline void __iomem *ioport_map(unsigned long port, unsigned int size)
279
return IO_CONCAT(__IO_PREFIX,ioportmap) (port);
282
extern inline void ioport_unmap(void __iomem *addr)
286
static inline void __iomem *ioremap(unsigned long port, unsigned long size)
288
return IO_CONCAT(__IO_PREFIX,ioremap) (port, size);
291
static inline void __iomem *__ioremap(unsigned long port, unsigned long size,
294
return ioremap(port, size);
297
static inline void __iomem * ioremap_nocache(unsigned long offset,
300
return ioremap(offset, size);
303
static inline void iounmap(volatile void __iomem *addr)
305
IO_CONCAT(__IO_PREFIX,iounmap)(addr);
308
static inline int __is_ioaddr(unsigned long addr)
310
return IO_CONCAT(__IO_PREFIX,is_ioaddr)(addr);
312
#define __is_ioaddr(a) __is_ioaddr((unsigned long)(a))
314
static inline int __is_mmio(const volatile void __iomem *addr)
316
return IO_CONCAT(__IO_PREFIX,is_mmio)(addr);
321
* If the actual I/O bits are sufficiently trivial, then expand inline.
324
#if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
325
extern inline unsigned int ioread8(void __iomem *addr)
327
unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread8)(addr);
332
extern inline unsigned int ioread16(void __iomem *addr)
334
unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread16)(addr);
339
extern inline void iowrite8(u8 b, void __iomem *addr)
341
IO_CONCAT(__IO_PREFIX,iowrite8)(b, addr);
345
extern inline void iowrite16(u16 b, void __iomem *addr)
347
IO_CONCAT(__IO_PREFIX,iowrite16)(b, addr);
351
extern inline u8 inb(unsigned long port)
353
return ioread8(ioport_map(port, 1));
356
extern inline u16 inw(unsigned long port)
358
return ioread16(ioport_map(port, 2));
361
extern inline void outb(u8 b, unsigned long port)
363
iowrite8(b, ioport_map(port, 1));
366
extern inline void outw(u16 b, unsigned long port)
368
iowrite16(b, ioport_map(port, 2));
372
#if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
373
extern inline unsigned int ioread32(void __iomem *addr)
375
unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread32)(addr);
380
extern inline void iowrite32(u32 b, void __iomem *addr)
382
IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr);
386
extern inline u32 inl(unsigned long port)
388
return ioread32(ioport_map(port, 4));
391
extern inline void outl(u32 b, unsigned long port)
393
iowrite32(b, ioport_map(port, 4));
397
#if IO_CONCAT(__IO_PREFIX,trivial_rw_bw) == 1
398
extern inline u8 __raw_readb(const volatile void __iomem *addr)
400
return IO_CONCAT(__IO_PREFIX,readb)(addr);
403
extern inline u16 __raw_readw(const volatile void __iomem *addr)
405
return IO_CONCAT(__IO_PREFIX,readw)(addr);
408
extern inline void __raw_writeb(u8 b, volatile void __iomem *addr)
410
IO_CONCAT(__IO_PREFIX,writeb)(b, addr);
413
extern inline void __raw_writew(u16 b, volatile void __iomem *addr)
415
IO_CONCAT(__IO_PREFIX,writew)(b, addr);
418
extern inline u8 readb(const volatile void __iomem *addr)
420
u8 ret = __raw_readb(addr);
425
extern inline u16 readw(const volatile void __iomem *addr)
427
u16 ret = __raw_readw(addr);
432
extern inline void writeb(u8 b, volatile void __iomem *addr)
434
__raw_writeb(b, addr);
438
extern inline void writew(u16 b, volatile void __iomem *addr)
440
__raw_writew(b, addr);
445
#if IO_CONCAT(__IO_PREFIX,trivial_rw_lq) == 1
446
extern inline u32 __raw_readl(const volatile void __iomem *addr)
448
return IO_CONCAT(__IO_PREFIX,readl)(addr);
451
extern inline u64 __raw_readq(const volatile void __iomem *addr)
453
return IO_CONCAT(__IO_PREFIX,readq)(addr);
456
extern inline void __raw_writel(u32 b, volatile void __iomem *addr)
458
IO_CONCAT(__IO_PREFIX,writel)(b, addr);
461
extern inline void __raw_writeq(u64 b, volatile void __iomem *addr)
463
IO_CONCAT(__IO_PREFIX,writeq)(b, addr);
466
extern inline u32 readl(const volatile void __iomem *addr)
468
u32 ret = __raw_readl(addr);
473
extern inline u64 readq(const volatile void __iomem *addr)
475
u64 ret = __raw_readq(addr);
480
extern inline void writel(u32 b, volatile void __iomem *addr)
482
__raw_writel(b, addr);
486
extern inline void writeq(u64 b, volatile void __iomem *addr)
488
__raw_writeq(b, addr);
499
#define readb_relaxed(addr) __raw_readb(addr)
500
#define readw_relaxed(addr) __raw_readw(addr)
501
#define readl_relaxed(addr) __raw_readl(addr)
502
#define readq_relaxed(addr) __raw_readq(addr)
507
* String version of IO memory access ops:
509
extern void memcpy_fromio(void *, const volatile void __iomem *, long);
510
extern void memcpy_toio(volatile void __iomem *, const void *, long);
511
extern void _memset_c_io(volatile void __iomem *, unsigned long, long);
513
static inline void memset_io(volatile void __iomem *addr, u8 c, long len)
515
_memset_c_io(addr, 0x0101010101010101UL * c, len);
518
#define __HAVE_ARCH_MEMSETW_IO
519
static inline void memsetw_io(volatile void __iomem *addr, u16 c, long len)
521
_memset_c_io(addr, 0x0001000100010001UL * c, len);
525
* String versions of in/out ops:
527
extern void insb (unsigned long port, void *dst, unsigned long count);
528
extern void insw (unsigned long port, void *dst, unsigned long count);
529
extern void insl (unsigned long port, void *dst, unsigned long count);
530
extern void outsb (unsigned long port, const void *src, unsigned long count);
531
extern void outsw (unsigned long port, const void *src, unsigned long count);
532
extern void outsl (unsigned long port, const void *src, unsigned long count);
535
* The Alpha Jensen hardware for some rather strange reason puts
536
* the RTC clock at 0x170 instead of 0x70. Probably due to some
537
* misguided idea about using 0x70 for NMI stuff.
539
* These defines will override the defaults when doing RTC queries
542
#ifdef CONFIG_ALPHA_GENERIC
543
# define RTC_PORT(x) ((x) + alpha_mv.rtc_port)
545
# ifdef CONFIG_ALPHA_JENSEN
546
# define RTC_PORT(x) (0x170+(x))
548
# define RTC_PORT(x) (0x70 + (x))
551
#define RTC_ALWAYS_BCD 0
554
* Some mucking forons use if[n]def writeq to check if platform has it.
555
* It's a bloody bad idea and we probably want ARCH_HAS_WRITEQ for them
556
* to play with; for now just use cpp anti-recursion logics and make sure
557
* that damn thing is defined and expands to itself.
560
#define writeq writeq
564
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
567
#define xlate_dev_mem_ptr(p) __va(p)
570
* Convert a virtual cached pointer to an uncached pointer
572
#define xlate_dev_kmem_ptr(p) p
574
#endif /* __KERNEL__ */
576
#endif /* __ALPHA_IO_H */