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* MPC8560 ADS Device Tree Source
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* Copyright 2006, 2008 Freescale Semiconductor Inc.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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compatible = "MPC8560ADS", "MPC85xxADS";
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d-cache-line-size = <32>; // 32 bytes
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i-cache-line-size = <32>; // 32 bytes
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d-cache-size = <0x8000>; // L1, 32K
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i-cache-size = <0x8000>; // L1, 32K
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timebase-frequency = <82500000>;
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bus-frequency = <330000000>;
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clock-frequency = <825000000>;
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device_type = "memory";
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reg = <0x0 0x10000000>;
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compatible = "simple-bus";
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ranges = <0x0 0xe0000000 0x100000>;
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bus-frequency = <330000000>;
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compatible = "fsl,ecm-law";
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compatible = "fsl,mpc8560-ecm", "fsl,ecm";
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reg = <0x1000 0x1000>;
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interrupt-parent = <&mpic>;
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memory-controller@2000 {
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compatible = "fsl,mpc8540-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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L2: l2-cache-controller@20000 {
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compatible = "fsl,mpc8540-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>; // 32 bytes
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cache-size = <0x40000>; // L2, 256K
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interrupt-parent = <&mpic>;
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compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
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ranges = <0x0 0x21100 0x200>;
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compatible = "fsl,mpc8560-dma-channel",
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"fsl,eloplus-dma-channel";
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interrupt-parent = <&mpic>;
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compatible = "fsl,mpc8560-dma-channel",
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"fsl,eloplus-dma-channel";
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interrupt-parent = <&mpic>;
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compatible = "fsl,mpc8560-dma-channel",
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"fsl,eloplus-dma-channel";
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interrupt-parent = <&mpic>;
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compatible = "fsl,mpc8560-dma-channel",
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"fsl,eloplus-dma-channel";
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interrupt-parent = <&mpic>;
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enet0: ethernet@24000 {
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#address-cells = <1>;
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device_type = "network";
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compatible = "gianfar";
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reg = <0x24000 0x1000>;
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ranges = <0x0 0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <29 2 30 2 34 2>;
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interrupt-parent = <&mpic>;
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tbi-handle = <&tbi0>;
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phy-handle = <&phy0>;
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#address-cells = <1>;
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compatible = "fsl,gianfar-mdio";
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phy0: ethernet-phy@0 {
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interrupt-parent = <&mpic>;
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device_type = "ethernet-phy";
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phy1: ethernet-phy@1 {
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interrupt-parent = <&mpic>;
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device_type = "ethernet-phy";
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phy2: ethernet-phy@2 {
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interrupt-parent = <&mpic>;
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device_type = "ethernet-phy";
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phy3: ethernet-phy@3 {
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interrupt-parent = <&mpic>;
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device_type = "ethernet-phy";
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device_type = "tbi-phy";
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enet1: ethernet@25000 {
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#address-cells = <1>;
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device_type = "network";
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compatible = "gianfar";
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reg = <0x25000 0x1000>;
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ranges = <0x0 0x25000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <35 2 36 2 40 2>;
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interrupt-parent = <&mpic>;
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tbi-handle = <&tbi1>;
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phy-handle = <&phy1>;
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#address-cells = <1>;
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compatible = "fsl,gianfar-tbi";
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device_type = "tbi-phy";
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0x40000 0x40000>;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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#address-cells = <1>;
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compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
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reg = <0x919c0 0x30>;
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#address-cells = <1>;
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ranges = <0x0 0x80000 0x10000>;
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compatible = "fsl,cpm-muram-data";
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reg = <0x0 0x4000 0x9000 0x2000>;
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compatible = "fsl,mpc8560-brg",
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reg = <0x919f0 0x10 0x915f0 0x10>;
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clock-frequency = <165000000>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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interrupt-parent = <&mpic>;
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reg = <0x90c00 0x80>;
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compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
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serial0: serial@91a00 {
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device_type = "serial";
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compatible = "fsl,mpc8560-scc-uart",
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reg = <0x91a00 0x20 0x88000 0x100>;
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fsl,cpm-command = <0x800000>;
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current-speed = <115200>;
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interrupt-parent = <&cpmpic>;
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serial1: serial@91a20 {
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device_type = "serial";
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compatible = "fsl,mpc8560-scc-uart",
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reg = <0x91a20 0x20 0x88100 0x100>;
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fsl,cpm-command = <0x4a00000>;
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current-speed = <115200>;
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interrupt-parent = <&cpmpic>;
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enet2: ethernet@91320 {
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device_type = "network";
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compatible = "fsl,mpc8560-fcc-enet",
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reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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fsl,cpm-command = <0x16200300>;
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interrupt-parent = <&cpmpic>;
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phy-handle = <&phy2>;
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enet3: ethernet@91340 {
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device_type = "network";
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compatible = "fsl,mpc8560-fcc-enet",
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reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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fsl,cpm-command = <0x1a400300>;
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interrupt-parent = <&cpmpic>;
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phy-handle = <&phy3>;
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#interrupt-cells = <1>;
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#address-cells = <3>;
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compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
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reg = <0xe0008000 0x1000>;
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clock-frequency = <66666666>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
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0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
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0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
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0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
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0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
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0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
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0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
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0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
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0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
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0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
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0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
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0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
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0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
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0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
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0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
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0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
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0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
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0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
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0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
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0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
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0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
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0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
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0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
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0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
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0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
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0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
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0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
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0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
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0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
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0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
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0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
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0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
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0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
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0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
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0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
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0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
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0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
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0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
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0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
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0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
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0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
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0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
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0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
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0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
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0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
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0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
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0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
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0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
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interrupt-parent = <&mpic>;
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ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;