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* Support for hardware-managed IRQ auto-distribution.
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* Copyright (C) 2010 Paul Mundt
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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#include "internals.h"
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static unsigned long dist_handle[NR_IRQS];
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void intc_balancing_enable(unsigned int irq)
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struct intc_desc_int *d = get_intc_desc(irq);
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unsigned long handle = dist_handle[irq];
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if (irq_balancing_disabled(irq) || !handle)
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addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
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intc_reg_fns[_INTC_FN(handle)](addr, handle, 1);
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void intc_balancing_disable(unsigned int irq)
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struct intc_desc_int *d = get_intc_desc(irq);
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unsigned long handle = dist_handle[irq];
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if (irq_balancing_disabled(irq) || !handle)
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addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
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intc_reg_fns[_INTC_FN(handle)](addr, handle, 0);
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static unsigned int intc_dist_data(struct intc_desc *desc,
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struct intc_desc_int *d,
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struct intc_mask_reg *mr = desc->hw.mask_regs;
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unsigned int i, j, fn, mode;
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unsigned long reg_e, reg_d;
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for (i = 0; mr && enum_id && i < desc->hw.nr_mask_regs; i++) {
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mr = desc->hw.mask_regs + i;
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* Skip this entry if there's no auto-distribution
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* register associated with it.
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for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
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if (mr->enum_ids[j] != enum_id)
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fn = REG_FN_MODIFY_BASE;
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mode = MODE_ENABLE_REG;
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fn += (mr->reg_width >> 3) - 1;
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return _INTC_MK(fn, mode,
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intc_get_reg(d, reg_e),
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intc_get_reg(d, reg_d),
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(mr->reg_width - 1) - j);
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* It's possible we've gotten here with no distribution options
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* available for the IRQ in question, so we just skip over those.
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void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
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struct intc_desc_int *d, intc_enum id)
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* Nothing to do for this IRQ.
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if (!desc->hw.mask_regs)
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raw_spin_lock_irqsave(&intc_big_lock, flags);
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dist_handle[irq] = intc_dist_data(desc, d, id);
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raw_spin_unlock_irqrestore(&intc_big_lock, flags);