2
* Aic94xx SAS/SATA driver access to shared data structures and memory
5
* Copyright (C) 2005 Adaptec, Inc. All rights reserved.
6
* Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
8
* This file is licensed under GPLv2.
10
* This file is part of the aic94xx driver.
12
* The aic94xx driver is free software; you can redistribute it and/or
13
* modify it under the terms of the GNU General Public License as
14
* published by the Free Software Foundation; version 2 of the
17
* The aic94xx driver is distributed in the hope that it will be useful,
18
* but WITHOUT ANY WARRANTY; without even the implied warranty of
19
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20
* General Public License for more details.
22
* You should have received a copy of the GNU General Public License
23
* along with the aic94xx driver; if not, write to the Free Software
24
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28
#include <linux/pci.h>
29
#include <linux/slab.h>
30
#include <linux/delay.h>
33
#include "aic94xx_reg.h"
34
#include "aic94xx_sds.h"
36
/* ---------- OCM stuff ---------- */
38
struct asd_ocm_dir_ent {
43
} __attribute__ ((packed));
52
struct asd_ocm_dir_ent entry[15];
53
} __attribute__ ((packed));
55
#define OCM_DE_OCM_DIR 0x00
56
#define OCM_DE_WIN_DRVR 0x01
57
#define OCM_DE_BIOS_CHIM 0x02
58
#define OCM_DE_RAID_ENGN 0x03
59
#define OCM_DE_BIOS_INTL 0x04
60
#define OCM_DE_BIOS_CHIM_OSM 0x05
61
#define OCM_DE_BIOS_CHIM_DYNAMIC 0x06
62
#define OCM_DE_ADDC2C_RES0 0x07
63
#define OCM_DE_ADDC2C_RES1 0x08
64
#define OCM_DE_ADDC2C_RES2 0x09
65
#define OCM_DE_ADDC2C_RES3 0x0A
67
#define OCM_INIT_DIR_ENTRIES 5
68
/***************************************************************************
69
* OCM directory default
70
***************************************************************************/
71
static struct asd_ocm_dir OCMDirInit =
73
.sig = {0x4D, 0x4F}, /* signature */
74
.num_de = OCM_INIT_DIR_ENTRIES, /* no. of directory entries */
77
/***************************************************************************
78
* OCM directory Entries default
79
***************************************************************************/
80
static struct asd_ocm_dir_ent OCMDirEntriesInit[OCM_INIT_DIR_ENTRIES] =
83
.type = (OCM_DE_ADDC2C_RES0), /* Entry type */
84
.offs = {128}, /* Offset */
85
.size = {0, 4}, /* size */
88
.type = (OCM_DE_ADDC2C_RES1), /* Entry type */
89
.offs = {128, 4}, /* Offset */
90
.size = {0, 4}, /* size */
93
.type = (OCM_DE_ADDC2C_RES2), /* Entry type */
94
.offs = {128, 8}, /* Offset */
95
.size = {0, 4}, /* size */
98
.type = (OCM_DE_ADDC2C_RES3), /* Entry type */
99
.offs = {128, 12}, /* Offset */
100
.size = {0, 4}, /* size */
103
.type = (OCM_DE_WIN_DRVR), /* Entry type */
104
.offs = {128, 16}, /* Offset */
105
.size = {128, 235, 1}, /* size */
109
struct asd_bios_chim_struct {
121
/* The unit element array is right here.
123
} __attribute__ ((packed));
126
* asd_read_ocm_seg - read an on chip memory (OCM) segment
127
* @asd_ha: pointer to the host adapter structure
128
* @buffer: where to write the read data
129
* @offs: offset into OCM where to read from
130
* @size: how many bytes to read
132
* Return the number of bytes not read. Return 0 on success.
134
static int asd_read_ocm_seg(struct asd_ha_struct *asd_ha, void *buffer,
138
if (unlikely(asd_ha->iospace))
139
asd_read_reg_string(asd_ha, buffer, offs+OCM_BASE_ADDR, size);
141
for ( ; size > 0; size--, offs++, p++)
142
*p = asd_read_ocm_byte(asd_ha, offs);
147
static int asd_read_ocm_dir(struct asd_ha_struct *asd_ha,
148
struct asd_ocm_dir *dir, u32 offs)
150
int err = asd_read_ocm_seg(asd_ha, dir, offs, sizeof(*dir));
152
ASD_DPRINTK("couldn't read ocm segment\n");
156
if (dir->sig[0] != 'M' || dir->sig[1] != 'O') {
157
ASD_DPRINTK("no valid dir signature(%c%c) at start of OCM\n",
158
dir->sig[0], dir->sig[1]);
161
if (dir->major != 0) {
162
asd_printk("unsupported major version of ocm dir:0x%x\n",
171
* asd_write_ocm_seg - write an on chip memory (OCM) segment
172
* @asd_ha: pointer to the host adapter structure
173
* @buffer: where to read the write data
174
* @offs: offset into OCM to write to
175
* @size: how many bytes to write
177
* Return the number of bytes not written. Return 0 on success.
179
static void asd_write_ocm_seg(struct asd_ha_struct *asd_ha, void *buffer,
183
if (unlikely(asd_ha->iospace))
184
asd_write_reg_string(asd_ha, buffer, offs+OCM_BASE_ADDR, size);
186
for ( ; size > 0; size--, offs++, p++)
187
asd_write_ocm_byte(asd_ha, offs, *p);
192
#define THREE_TO_NUM(X) ((X)[0] | ((X)[1] << 8) | ((X)[2] << 16))
194
static int asd_find_dir_entry(struct asd_ocm_dir *dir, u8 type,
195
u32 *offs, u32 *size)
198
struct asd_ocm_dir_ent *ent;
200
for (i = 0; i < dir->num_de; i++) {
201
if (dir->entry[i].type == type)
204
if (i >= dir->num_de)
206
ent = &dir->entry[i];
207
*offs = (u32) THREE_TO_NUM(ent->offs);
208
*size = (u32) THREE_TO_NUM(ent->size);
212
#define OCM_BIOS_CHIM_DE 2
213
#define BC_BIOS_PRESENT 1
215
static int asd_get_bios_chim(struct asd_ha_struct *asd_ha,
216
struct asd_ocm_dir *dir)
219
struct asd_bios_chim_struct *bc_struct;
222
err = asd_find_dir_entry(dir, OCM_BIOS_CHIM_DE, &offs, &size);
224
ASD_DPRINTK("couldn't find BIOS_CHIM dir ent\n");
228
bc_struct = kmalloc(sizeof(*bc_struct), GFP_KERNEL);
230
asd_printk("no memory for bios_chim struct\n");
233
err = asd_read_ocm_seg(asd_ha, (void *)bc_struct, offs,
236
ASD_DPRINTK("couldn't read ocm segment\n");
239
if (strncmp(bc_struct->sig, "SOIB", 4)
240
&& strncmp(bc_struct->sig, "IPSA", 4)) {
241
ASD_DPRINTK("BIOS_CHIM entry has no valid sig(%c%c%c%c)\n",
242
bc_struct->sig[0], bc_struct->sig[1],
243
bc_struct->sig[2], bc_struct->sig[3]);
247
if (bc_struct->major != 1) {
248
asd_printk("BIOS_CHIM unsupported major version:0x%x\n",
253
if (bc_struct->flags & BC_BIOS_PRESENT) {
254
asd_ha->hw_prof.bios.present = 1;
255
asd_ha->hw_prof.bios.maj = bc_struct->bios_major;
256
asd_ha->hw_prof.bios.min = bc_struct->bios_minor;
257
asd_ha->hw_prof.bios.bld = le32_to_cpu(bc_struct->bios_build);
258
ASD_DPRINTK("BIOS present (%d,%d), %d\n",
259
asd_ha->hw_prof.bios.maj,
260
asd_ha->hw_prof.bios.min,
261
asd_ha->hw_prof.bios.bld);
263
asd_ha->hw_prof.ue.num = le16_to_cpu(bc_struct->ue_num);
264
asd_ha->hw_prof.ue.size= le16_to_cpu(bc_struct->ue_size);
265
ASD_DPRINTK("ue num:%d, ue size:%d\n", asd_ha->hw_prof.ue.num,
266
asd_ha->hw_prof.ue.size);
267
size = asd_ha->hw_prof.ue.num * asd_ha->hw_prof.ue.size;
270
asd_ha->hw_prof.ue.area = kmalloc(size, GFP_KERNEL);
271
if (!asd_ha->hw_prof.ue.area)
273
err = asd_read_ocm_seg(asd_ha, (void *)asd_ha->hw_prof.ue.area,
274
offs + sizeof(*bc_struct), size);
276
kfree(asd_ha->hw_prof.ue.area);
277
asd_ha->hw_prof.ue.area = NULL;
278
asd_ha->hw_prof.ue.num = 0;
279
asd_ha->hw_prof.ue.size = 0;
280
ASD_DPRINTK("couldn't read ue entries(%d)\n", err);
290
asd_hwi_initialize_ocm_dir (struct asd_ha_struct *asd_ha)
295
for (i = 0; i < OCM_MAX_SIZE; i += 4)
296
asd_write_ocm_dword(asd_ha, i, 0);
299
asd_write_ocm_seg(asd_ha, &OCMDirInit, 0,
300
sizeof(struct asd_ocm_dir));
302
/* Write Dir Entries */
303
for (i = 0; i < OCM_INIT_DIR_ENTRIES; i++)
304
asd_write_ocm_seg(asd_ha, &OCMDirEntriesInit[i],
305
sizeof(struct asd_ocm_dir) +
306
(i * sizeof(struct asd_ocm_dir_ent))
307
, sizeof(struct asd_ocm_dir_ent));
312
asd_hwi_check_ocm_access (struct asd_ha_struct *asd_ha)
314
struct pci_dev *pcidev = asd_ha->pcidev;
319
/* check if OCM has been initialized by BIOS */
320
reg = asd_read_reg_dword(asd_ha, EXSICNFGR);
322
if (!(reg & OCMINITIALIZED)) {
323
err = pci_read_config_dword(pcidev, PCIC_INTRPT_STAT, &v);
325
asd_printk("couldn't access PCIC_INTRPT_STAT of %s\n",
330
printk(KERN_INFO "OCM is not initialized by BIOS,"
331
"reinitialize it and ignore it, current IntrptStatus"
335
err = pci_write_config_dword(pcidev,
336
PCIC_INTRPT_STAT, v);
338
asd_printk("couldn't write PCIC_INTRPT_STAT of %s\n",
343
asd_hwi_initialize_ocm_dir(asd_ha);
351
* asd_read_ocm - read on chip memory (OCM)
352
* @asd_ha: pointer to the host adapter structure
354
int asd_read_ocm(struct asd_ha_struct *asd_ha)
357
struct asd_ocm_dir *dir;
359
if (asd_hwi_check_ocm_access(asd_ha))
362
dir = kmalloc(sizeof(*dir), GFP_KERNEL);
364
asd_printk("no memory for ocm dir\n");
368
err = asd_read_ocm_dir(asd_ha, dir, 0);
372
err = asd_get_bios_chim(asd_ha, dir);
378
/* ---------- FLASH stuff ---------- */
380
#define FLASH_RESET 0xF0
382
#define ASD_FLASH_SIZE 0x200000
383
#define FLASH_DIR_COOKIE "*** ADAPTEC FLASH DIRECTORY *** "
384
#define FLASH_NEXT_ENTRY_OFFS 0x2000
385
#define FLASH_MAX_DIR_ENTRIES 32
387
#define FLASH_DE_TYPE_MASK 0x3FFFFFFF
388
#define FLASH_DE_MS 0x120
389
#define FLASH_DE_CTRL_A_USER 0xE0
391
struct asd_flash_de {
399
} __attribute__ ((packed));
401
struct asd_flash_dir {
405
__le32 chksum_antidote;
407
u8 bld_id[32]; /* build id data */
408
u8 ver_data[32]; /* date and time of build */
413
struct asd_flash_de dir_entry[FLASH_MAX_DIR_ENTRIES];
414
} __attribute__ ((packed));
416
struct asd_manuf_sec {
417
char sig[2]; /* 'S', 'M' */
424
u8 sas_addr[SAS_ADDR_SIZE];
425
u8 pcba_sn[ASD_PCBA_SN_SIZE];
426
/* Here start the other segments */
428
} __attribute__ ((packed));
430
struct asd_manuf_phy_desc {
431
u8 state; /* low 4 bits */
432
#define MS_PHY_STATE_ENABLED 0
433
#define MS_PHY_STATE_REPORTED 1
434
#define MS_PHY_STATE_HIDDEN 2
437
u8 phy_control_0; /* mode 5 reg 0x160 */
438
u8 phy_control_1; /* mode 5 reg 0x161 */
439
u8 phy_control_2; /* mode 5 reg 0x162 */
440
u8 phy_control_3; /* mode 5 reg 0x163 */
441
} __attribute__ ((packed));
443
struct asd_manuf_phy_param {
444
char sig[2]; /* 'P', 'M' */
448
u8 num_phy_desc; /* 8 */
449
u8 phy_desc_size; /* 8 */
453
struct asd_manuf_phy_desc phy_desc[ASD_MAX_PHYS];
454
} __attribute__ ((packed));
457
static const char *asd_sb_type[] = {
460
[2 ... 0x7F] = "unknown",
462
[0x81 ... 0xFF] = "VENDOR_UNIQUExx"
466
struct asd_ms_sb_desc {
471
} __attribute__ ((packed));
474
static const char *asd_conn_type[] = {
475
[0 ... 7] = "unknown",
479
[0x80] = "PCIX_DAUGHTER0",
480
[0x81] = "SAS_DAUGHTER0",
481
[0x82 ... 0xFF] = "VENDOR_UNIQUExx"
484
static const char *asd_conn_location[] = {
492
struct asd_ms_conn_desc {
495
u8 num_sideband_desc;
496
u8 size_sideband_desc;
499
struct asd_ms_sb_desc sb_desc[0];
500
} __attribute__ ((packed));
502
struct asd_nd_phy_desc {
504
u8 attch_specific[0];
505
} __attribute__ ((packed));
508
static const char *asd_node_type[] = {
514
"MULTI_DROP_I2C_BUS",
518
struct asd_ms_node_desc {
524
struct asd_nd_phy_desc phy_desc[0];
525
} __attribute__ ((packed));
527
struct asd_ms_conn_map {
528
char sig[2]; /* 'M', 'C' */
532
__le16 cm_size; /* size of this struct */
538
struct asd_ms_conn_desc conn_desc[0];
539
struct asd_ms_node_desc node_desc[0];
540
} __attribute__ ((packed));
542
struct asd_ctrla_phy_entry {
543
u8 sas_addr[SAS_ADDR_SIZE];
544
u8 sas_link_rates; /* max in hi bits, min in low bits */
548
} __attribute__ ((packed));
550
struct asd_ctrla_phy_settings {
554
u8 num_phys; /* number of PHYs in the PCI function */
556
struct asd_ctrla_phy_entry phy_ent[ASD_MAX_PHYS];
557
} __attribute__ ((packed));
563
u8 something_here[0];
564
} __attribute__ ((packed));
566
static int asd_poll_flash(struct asd_ha_struct *asd_ha)
571
for (c = 5000; c > 0; c--) {
572
d = asd_read_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar);
573
d ^= asd_read_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar);
581
static int asd_reset_flash(struct asd_ha_struct *asd_ha)
585
err = asd_poll_flash(asd_ha);
588
asd_write_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar, FLASH_RESET);
589
err = asd_poll_flash(asd_ha);
594
static int asd_read_flash_seg(struct asd_ha_struct *asd_ha,
595
void *buffer, u32 offs, int size)
597
asd_read_reg_string(asd_ha, buffer, asd_ha->hw_prof.flash.bar+offs,
603
* asd_find_flash_dir - finds and reads the flash directory
604
* @asd_ha: pointer to the host adapter structure
605
* @flash_dir: pointer to flash directory structure
607
* If found, the flash directory segment will be copied to
608
* @flash_dir. Return 1 if found, 0 if not.
610
static int asd_find_flash_dir(struct asd_ha_struct *asd_ha,
611
struct asd_flash_dir *flash_dir)
614
for (v = 0; v < ASD_FLASH_SIZE; v += FLASH_NEXT_ENTRY_OFFS) {
615
asd_read_flash_seg(asd_ha, flash_dir, v,
616
sizeof(FLASH_DIR_COOKIE)-1);
617
if (memcmp(flash_dir->cookie, FLASH_DIR_COOKIE,
618
sizeof(FLASH_DIR_COOKIE)-1) == 0) {
619
asd_ha->hw_prof.flash.dir_offs = v;
620
asd_read_flash_seg(asd_ha, flash_dir, v,
628
static int asd_flash_getid(struct asd_ha_struct *asd_ha)
633
reg = asd_read_reg_dword(asd_ha, EXSICNFGR);
635
if (pci_read_config_dword(asd_ha->pcidev, PCI_CONF_FLSH_BAR,
636
&asd_ha->hw_prof.flash.bar)) {
637
asd_printk("couldn't read PCI_CONF_FLSH_BAR of %s\n",
638
pci_name(asd_ha->pcidev));
641
asd_ha->hw_prof.flash.present = 1;
642
asd_ha->hw_prof.flash.wide = reg & FLASHW ? 1 : 0;
643
err = asd_reset_flash(asd_ha);
645
ASD_DPRINTK("couldn't reset flash(%d)\n", err);
651
static u16 asd_calc_flash_chksum(u16 *p, int size)
662
static int asd_find_flash_de(struct asd_flash_dir *flash_dir, u32 entry_type,
663
u32 *offs, u32 *size)
666
struct asd_flash_de *de;
668
for (i = 0; i < FLASH_MAX_DIR_ENTRIES; i++) {
669
u32 type = le32_to_cpu(flash_dir->dir_entry[i].type);
671
type &= FLASH_DE_TYPE_MASK;
672
if (type == entry_type)
675
if (i >= FLASH_MAX_DIR_ENTRIES)
677
de = &flash_dir->dir_entry[i];
678
*offs = le32_to_cpu(de->offs);
679
*size = le32_to_cpu(de->pad_size);
683
static int asd_validate_ms(struct asd_manuf_sec *ms)
685
if (ms->sig[0] != 'S' || ms->sig[1] != 'M') {
686
ASD_DPRINTK("manuf sec: no valid sig(%c%c)\n",
687
ms->sig[0], ms->sig[1]);
691
asd_printk("unsupported manuf. sector. major version:%x\n",
695
ms->offs_next = le16_to_cpu((__force __le16) ms->offs_next);
696
ms->chksum = le16_to_cpu((__force __le16) ms->chksum);
697
ms->size = le16_to_cpu((__force __le16) ms->size);
699
if (asd_calc_flash_chksum((u16 *)ms, ms->size/2)) {
700
asd_printk("failed manuf sector checksum\n");
706
static int asd_ms_get_sas_addr(struct asd_ha_struct *asd_ha,
707
struct asd_manuf_sec *ms)
709
memcpy(asd_ha->hw_prof.sas_addr, ms->sas_addr, SAS_ADDR_SIZE);
713
static int asd_ms_get_pcba_sn(struct asd_ha_struct *asd_ha,
714
struct asd_manuf_sec *ms)
716
memcpy(asd_ha->hw_prof.pcba_sn, ms->pcba_sn, ASD_PCBA_SN_SIZE);
717
asd_ha->hw_prof.pcba_sn[ASD_PCBA_SN_SIZE] = '\0';
722
* asd_find_ll_by_id - find a linked list entry by its id
723
* @start: void pointer to the first element in the linked list
724
* @id0: the first byte of the id (offs 0)
725
* @id1: the second byte of the id (offs 1)
727
* @start has to be the _base_ element start, since the
728
* linked list entries's offset is from this pointer.
729
* Some linked list entries use only the first id, in which case
730
* you can pass 0xFF for the second.
732
static void *asd_find_ll_by_id(void * const start, const u8 id0, const u8 id1)
734
struct asd_ll_el *el = start;
744
el = start + le16_to_cpu(el->next);
745
} while (el != start);
751
* asd_ms_get_phy_params - get phy parameters from the manufacturing sector
752
* @asd_ha: pointer to the host adapter structure
753
* @manuf_sec: pointer to the manufacturing sector
755
* The manufacturing sector contans also the linked list of sub-segments,
756
* since when it was read, its size was taken from the flash directory,
757
* not from the structure size.
759
* HIDDEN phys do not count in the total count. REPORTED phys cannot
760
* be enabled but are reported and counted towards the total.
761
* ENABLED phys are enabled by default and count towards the total.
762
* The absolute total phy number is ASD_MAX_PHYS. hw_prof->num_phys
763
* merely specifies the number of phys the host adapter decided to
764
* report. E.g., it is possible for phys 0, 1 and 2 to be HIDDEN,
765
* phys 3, 4 and 5 to be REPORTED and phys 6 and 7 to be ENABLED.
766
* In this case ASD_MAX_PHYS is 8, hw_prof->num_phys is 5, and only 2
767
* are actually enabled (enabled by default, max number of phys
768
* enableable in this case).
770
static int asd_ms_get_phy_params(struct asd_ha_struct *asd_ha,
771
struct asd_manuf_sec *manuf_sec)
776
struct asd_manuf_phy_param *phy_param;
777
struct asd_manuf_phy_param dflt_phy_param;
779
phy_param = asd_find_ll_by_id(manuf_sec, 'P', 'M');
781
ASD_DPRINTK("ms: no phy parameters found\n");
782
ASD_DPRINTK("ms: Creating default phy parameters\n");
783
dflt_phy_param.sig[0] = 'P';
784
dflt_phy_param.sig[1] = 'M';
785
dflt_phy_param.maj = 0;
786
dflt_phy_param.min = 2;
787
dflt_phy_param.num_phy_desc = 8;
788
dflt_phy_param.phy_desc_size = sizeof(struct asd_manuf_phy_desc);
789
for (i =0; i < ASD_MAX_PHYS; i++) {
790
dflt_phy_param.phy_desc[i].state = 0;
791
dflt_phy_param.phy_desc[i].phy_id = i;
792
dflt_phy_param.phy_desc[i].phy_control_0 = 0xf6;
793
dflt_phy_param.phy_desc[i].phy_control_1 = 0x10;
794
dflt_phy_param.phy_desc[i].phy_control_2 = 0x43;
795
dflt_phy_param.phy_desc[i].phy_control_3 = 0xeb;
798
phy_param = &dflt_phy_param;
802
if (phy_param->maj != 0) {
803
asd_printk("unsupported manuf. phy param major version:0x%x\n",
808
ASD_DPRINTK("ms: num_phy_desc: %d\n", phy_param->num_phy_desc);
809
asd_ha->hw_prof.enabled_phys = 0;
810
for (i = 0; i < phy_param->num_phy_desc; i++) {
811
struct asd_manuf_phy_desc *pd = &phy_param->phy_desc[i];
812
switch (pd->state & 0xF) {
813
case MS_PHY_STATE_HIDDEN:
814
ASD_DPRINTK("ms: phy%d: HIDDEN\n", i);
816
case MS_PHY_STATE_REPORTED:
817
ASD_DPRINTK("ms: phy%d: REPORTED\n", i);
818
asd_ha->hw_prof.enabled_phys &= ~(1 << i);
821
case MS_PHY_STATE_ENABLED:
822
ASD_DPRINTK("ms: phy%d: ENABLED\n", i);
823
asd_ha->hw_prof.enabled_phys |= (1 << i);
827
asd_ha->hw_prof.phy_desc[i].phy_control_0 = pd->phy_control_0;
828
asd_ha->hw_prof.phy_desc[i].phy_control_1 = pd->phy_control_1;
829
asd_ha->hw_prof.phy_desc[i].phy_control_2 = pd->phy_control_2;
830
asd_ha->hw_prof.phy_desc[i].phy_control_3 = pd->phy_control_3;
832
asd_ha->hw_prof.max_phys = rep_phys + en_phys;
833
asd_ha->hw_prof.num_phys = en_phys;
834
ASD_DPRINTK("ms: max_phys:0x%x, num_phys:0x%x\n",
835
asd_ha->hw_prof.max_phys, asd_ha->hw_prof.num_phys);
836
ASD_DPRINTK("ms: enabled_phys:0x%x\n", asd_ha->hw_prof.enabled_phys);
840
static int asd_ms_get_connector_map(struct asd_ha_struct *asd_ha,
841
struct asd_manuf_sec *manuf_sec)
843
struct asd_ms_conn_map *cm;
845
cm = asd_find_ll_by_id(manuf_sec, 'M', 'C');
847
ASD_DPRINTK("ms: no connector map found\n");
852
ASD_DPRINTK("ms: unsupported: connector map major version 0x%x"
864
* asd_process_ms - find and extract information from the manufacturing sector
865
* @asd_ha: pointer to the host adapter structure
866
* @flash_dir: pointer to the flash directory
868
static int asd_process_ms(struct asd_ha_struct *asd_ha,
869
struct asd_flash_dir *flash_dir)
872
struct asd_manuf_sec *manuf_sec;
875
err = asd_find_flash_de(flash_dir, FLASH_DE_MS, &offs, &size);
877
ASD_DPRINTK("Couldn't find the manuf. sector\n");
885
manuf_sec = kmalloc(size, GFP_KERNEL);
887
ASD_DPRINTK("no mem for manuf sector\n");
891
err = asd_read_flash_seg(asd_ha, (void *)manuf_sec, offs, size);
893
ASD_DPRINTK("couldn't read manuf sector at 0x%x, size 0x%x\n",
898
err = asd_validate_ms(manuf_sec);
900
ASD_DPRINTK("couldn't validate manuf sector\n");
904
err = asd_ms_get_sas_addr(asd_ha, manuf_sec);
906
ASD_DPRINTK("couldn't read the SAS_ADDR\n");
909
ASD_DPRINTK("manuf sect SAS_ADDR %llx\n",
910
SAS_ADDR(asd_ha->hw_prof.sas_addr));
912
err = asd_ms_get_pcba_sn(asd_ha, manuf_sec);
914
ASD_DPRINTK("couldn't read the PCBA SN\n");
917
ASD_DPRINTK("manuf sect PCBA SN %s\n", asd_ha->hw_prof.pcba_sn);
919
err = asd_ms_get_phy_params(asd_ha, manuf_sec);
921
ASD_DPRINTK("ms: couldn't get phy parameters\n");
925
err = asd_ms_get_connector_map(asd_ha, manuf_sec);
927
ASD_DPRINTK("ms: couldn't get connector map\n");
937
static int asd_process_ctrla_phy_settings(struct asd_ha_struct *asd_ha,
938
struct asd_ctrla_phy_settings *ps)
941
for (i = 0; i < ps->num_phys; i++) {
942
struct asd_ctrla_phy_entry *pe = &ps->phy_ent[i];
944
if (!PHY_ENABLED(asd_ha, i))
946
if (*(u64 *)pe->sas_addr == 0) {
947
asd_ha->hw_prof.enabled_phys &= ~(1 << i);
950
/* This is the SAS address which should be sent in IDENTIFY. */
951
memcpy(asd_ha->hw_prof.phy_desc[i].sas_addr, pe->sas_addr,
953
asd_ha->hw_prof.phy_desc[i].max_sas_lrate =
954
(pe->sas_link_rates & 0xF0) >> 4;
955
asd_ha->hw_prof.phy_desc[i].min_sas_lrate =
956
(pe->sas_link_rates & 0x0F);
957
asd_ha->hw_prof.phy_desc[i].max_sata_lrate =
958
(pe->sata_link_rates & 0xF0) >> 4;
959
asd_ha->hw_prof.phy_desc[i].min_sata_lrate =
960
(pe->sata_link_rates & 0x0F);
961
asd_ha->hw_prof.phy_desc[i].flags = pe->flags;
962
ASD_DPRINTK("ctrla: phy%d: sas_addr: %llx, sas rate:0x%x-0x%x,"
963
" sata rate:0x%x-0x%x, flags:0x%x\n",
965
SAS_ADDR(asd_ha->hw_prof.phy_desc[i].sas_addr),
966
asd_ha->hw_prof.phy_desc[i].max_sas_lrate,
967
asd_ha->hw_prof.phy_desc[i].min_sas_lrate,
968
asd_ha->hw_prof.phy_desc[i].max_sata_lrate,
969
asd_ha->hw_prof.phy_desc[i].min_sata_lrate,
970
asd_ha->hw_prof.phy_desc[i].flags);
977
* asd_process_ctrl_a_user - process CTRL-A user settings
978
* @asd_ha: pointer to the host adapter structure
979
* @flash_dir: pointer to the flash directory
981
static int asd_process_ctrl_a_user(struct asd_ha_struct *asd_ha,
982
struct asd_flash_dir *flash_dir)
986
struct asd_ll_el *el;
987
struct asd_ctrla_phy_settings *ps;
988
struct asd_ctrla_phy_settings dflt_ps;
990
err = asd_find_flash_de(flash_dir, FLASH_DE_CTRL_A_USER, &offs, &size);
992
ASD_DPRINTK("couldn't find CTRL-A user settings section\n");
993
ASD_DPRINTK("Creating default CTRL-A user settings section\n");
996
dflt_ps.num_phys = 8;
997
for (i =0; i < ASD_MAX_PHYS; i++) {
998
memcpy(dflt_ps.phy_ent[i].sas_addr,
999
asd_ha->hw_prof.sas_addr, SAS_ADDR_SIZE);
1000
dflt_ps.phy_ent[i].sas_link_rates = 0x98;
1001
dflt_ps.phy_ent[i].flags = 0x0;
1002
dflt_ps.phy_ent[i].sata_link_rates = 0x0;
1005
size = sizeof(struct asd_ctrla_phy_settings);
1013
el = kmalloc(size, GFP_KERNEL);
1015
ASD_DPRINTK("no mem for ctrla user settings section\n");
1019
err = asd_read_flash_seg(asd_ha, (void *)el, offs, size);
1021
ASD_DPRINTK("couldn't read ctrla phy settings section\n");
1026
ps = asd_find_ll_by_id(el, 'h', 0xFF);
1028
ASD_DPRINTK("couldn't find ctrla phy settings struct\n");
1032
err = asd_process_ctrla_phy_settings(asd_ha, ps);
1034
ASD_DPRINTK("couldn't process ctrla phy settings\n");
1044
* asd_read_flash - read flash memory
1045
* @asd_ha: pointer to the host adapter structure
1047
int asd_read_flash(struct asd_ha_struct *asd_ha)
1050
struct asd_flash_dir *flash_dir;
1052
err = asd_flash_getid(asd_ha);
1056
flash_dir = kmalloc(sizeof(*flash_dir), GFP_KERNEL);
1061
if (!asd_find_flash_dir(asd_ha, flash_dir)) {
1062
ASD_DPRINTK("couldn't find flash directory\n");
1066
if (le32_to_cpu(flash_dir->rev) != 2) {
1067
asd_printk("unsupported flash dir version:0x%x\n",
1068
le32_to_cpu(flash_dir->rev));
1072
err = asd_process_ms(asd_ha, flash_dir);
1074
ASD_DPRINTK("couldn't process manuf sector settings\n");
1078
err = asd_process_ctrl_a_user(asd_ha, flash_dir);
1080
ASD_DPRINTK("couldn't process CTRL-A user settings\n");
1090
* asd_verify_flash_seg - verify data with flash memory
1091
* @asd_ha: pointer to the host adapter structure
1092
* @src: pointer to the source data to be verified
1093
* @dest_offset: offset from flash memory
1094
* @bytes_to_verify: total bytes to verify
1096
int asd_verify_flash_seg(struct asd_ha_struct *asd_ha,
1097
const void *src, u32 dest_offset, u32 bytes_to_verify)
1102
u32 nv_offset, reg, i;
1104
reg = asd_ha->hw_prof.flash.bar;
1108
nv_offset = dest_offset;
1109
src_buf = (const u8 *)src;
1110
for (i = 0; i < bytes_to_verify; i++) {
1111
flash_char = asd_read_reg_byte(asd_ha, reg + nv_offset + i);
1112
if (flash_char != src_buf[i]) {
1121
* asd_write_flash_seg - write data into flash memory
1122
* @asd_ha: pointer to the host adapter structure
1123
* @src: pointer to the source data to be written
1124
* @dest_offset: offset from flash memory
1125
* @bytes_to_write: total bytes to write
1127
int asd_write_flash_seg(struct asd_ha_struct *asd_ha,
1128
const void *src, u32 dest_offset, u32 bytes_to_write)
1131
u32 nv_offset, reg, i;
1134
reg = asd_ha->hw_prof.flash.bar;
1137
err = asd_check_flash_type(asd_ha);
1139
ASD_DPRINTK("couldn't find the type of flash. err=%d\n", err);
1143
nv_offset = dest_offset;
1144
err = asd_erase_nv_sector(asd_ha, nv_offset, bytes_to_write);
1146
ASD_DPRINTK("Erase failed at offset:0x%x\n",
1151
err = asd_reset_flash(asd_ha);
1153
ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1157
src_buf = (const u8 *)src;
1158
for (i = 0; i < bytes_to_write; i++) {
1159
/* Setup program command sequence */
1160
switch (asd_ha->hw_prof.flash.method) {
1161
case FLASH_METHOD_A:
1163
asd_write_reg_byte(asd_ha,
1164
(reg + 0xAAA), 0xAA);
1165
asd_write_reg_byte(asd_ha,
1166
(reg + 0x555), 0x55);
1167
asd_write_reg_byte(asd_ha,
1168
(reg + 0xAAA), 0xA0);
1169
asd_write_reg_byte(asd_ha,
1170
(reg + nv_offset + i),
1174
case FLASH_METHOD_B:
1176
asd_write_reg_byte(asd_ha,
1177
(reg + 0x555), 0xAA);
1178
asd_write_reg_byte(asd_ha,
1179
(reg + 0x2AA), 0x55);
1180
asd_write_reg_byte(asd_ha,
1181
(reg + 0x555), 0xA0);
1182
asd_write_reg_byte(asd_ha,
1183
(reg + nv_offset + i),
1190
if (asd_chk_write_status(asd_ha,
1191
(nv_offset + i), 0) != 0) {
1192
ASD_DPRINTK("aicx: Write failed at offset:0x%x\n",
1193
reg + nv_offset + i);
1194
return FAIL_WRITE_FLASH;
1198
err = asd_reset_flash(asd_ha);
1200
ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1206
int asd_chk_write_status(struct asd_ha_struct *asd_ha,
1207
u32 sector_addr, u8 erase_flag)
1211
u8 nv_data1, nv_data2;
1215
* Read from DQ2 requires sector address
1216
* while it's dont care for DQ6
1218
reg = asd_ha->hw_prof.flash.bar;
1220
for (loop_cnt = 0; loop_cnt < 50000; loop_cnt++) {
1221
nv_data1 = asd_read_reg_byte(asd_ha, reg);
1222
nv_data2 = asd_read_reg_byte(asd_ha, reg);
1224
toggle_bit1 = ((nv_data1 & FLASH_STATUS_BIT_MASK_DQ6)
1225
^ (nv_data2 & FLASH_STATUS_BIT_MASK_DQ6));
1227
if (toggle_bit1 == 0) {
1230
if (nv_data2 & FLASH_STATUS_BIT_MASK_DQ5) {
1231
nv_data1 = asd_read_reg_byte(asd_ha,
1233
nv_data2 = asd_read_reg_byte(asd_ha,
1236
((nv_data1 & FLASH_STATUS_BIT_MASK_DQ6)
1237
^ (nv_data2 & FLASH_STATUS_BIT_MASK_DQ6));
1239
if (toggle_bit1 == 0)
1245
* ERASE is a sector-by-sector operation and requires
1246
* more time to finish while WRITE is byte-byte-byte
1247
* operation and takes lesser time to finish.
1249
* For some strange reason a reduced ERASE delay gives different
1250
* behaviour across different spirit boards. Hence we set
1251
* a optimum balance of 50mus for ERASE which works well
1252
* across all boards.
1255
udelay(FLASH_STATUS_ERASE_DELAY_COUNT);
1257
udelay(FLASH_STATUS_WRITE_DELAY_COUNT);
1264
* asd_hwi_erase_nv_sector - Erase the flash memory sectors.
1265
* @asd_ha: pointer to the host adapter structure
1266
* @flash_addr: pointer to offset from flash memory
1267
* @size: total bytes to erase.
1269
int asd_erase_nv_sector(struct asd_ha_struct *asd_ha, u32 flash_addr, u32 size)
1274
reg = asd_ha->hw_prof.flash.bar;
1276
/* sector staring address */
1277
sector_addr = flash_addr & FLASH_SECTOR_SIZE_MASK;
1280
* Erasing an flash sector needs to be done in six consecutive
1283
while (sector_addr < flash_addr+size) {
1284
switch (asd_ha->hw_prof.flash.method) {
1285
case FLASH_METHOD_A:
1286
asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0xAA);
1287
asd_write_reg_byte(asd_ha, (reg + 0x555), 0x55);
1288
asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0x80);
1289
asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0xAA);
1290
asd_write_reg_byte(asd_ha, (reg + 0x555), 0x55);
1291
asd_write_reg_byte(asd_ha, (reg + sector_addr), 0x30);
1293
case FLASH_METHOD_B:
1294
asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA);
1295
asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55);
1296
asd_write_reg_byte(asd_ha, (reg + 0x555), 0x80);
1297
asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA);
1298
asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55);
1299
asd_write_reg_byte(asd_ha, (reg + sector_addr), 0x30);
1305
if (asd_chk_write_status(asd_ha, sector_addr, 1) != 0)
1306
return FAIL_ERASE_FLASH;
1308
sector_addr += FLASH_SECTOR_SIZE;
1314
int asd_check_flash_type(struct asd_ha_struct *asd_ha)
1323
/* get Flash memory base address */
1324
reg = asd_ha->hw_prof.flash.bar;
1326
/* Determine flash info */
1327
err = asd_reset_flash(asd_ha);
1329
ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1333
asd_ha->hw_prof.flash.method = FLASH_METHOD_UNKNOWN;
1334
asd_ha->hw_prof.flash.manuf = FLASH_MANUF_ID_UNKNOWN;
1335
asd_ha->hw_prof.flash.dev_id = FLASH_DEV_ID_UNKNOWN;
1337
/* Get flash info. This would most likely be AMD Am29LV family flash.
1338
* First try the sequence for word mode. It is the same as for
1339
* 008B (byte mode only), 160B (word mode) and 800D (word mode).
1341
inc = asd_ha->hw_prof.flash.wide ? 2 : 1;
1342
asd_write_reg_byte(asd_ha, reg + 0xAAA, 0xAA);
1343
asd_write_reg_byte(asd_ha, reg + 0x555, 0x55);
1344
asd_write_reg_byte(asd_ha, reg + 0xAAA, 0x90);
1345
manuf_id = asd_read_reg_byte(asd_ha, reg);
1346
dev_id = asd_read_reg_byte(asd_ha, reg + inc);
1347
sec_prot = asd_read_reg_byte(asd_ha, reg + inc + inc);
1348
/* Get out of autoselect mode. */
1349
err = asd_reset_flash(asd_ha);
1351
ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1354
ASD_DPRINTK("Flash MethodA manuf_id(0x%x) dev_id(0x%x) "
1355
"sec_prot(0x%x)\n", manuf_id, dev_id, sec_prot);
1356
err = asd_reset_flash(asd_ha);
1361
case FLASH_MANUF_ID_AMD:
1363
case FLASH_DEV_ID_AM29LV800DT:
1364
case FLASH_DEV_ID_AM29LV640MT:
1365
case FLASH_DEV_ID_AM29F800B:
1366
asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1372
case FLASH_MANUF_ID_ST:
1374
case FLASH_DEV_ID_STM29W800DT:
1375
case FLASH_DEV_ID_STM29LV640:
1376
asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1382
case FLASH_MANUF_ID_FUJITSU:
1384
case FLASH_DEV_ID_MBM29LV800TE:
1385
case FLASH_DEV_ID_MBM29DL800TA:
1386
asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1390
case FLASH_MANUF_ID_MACRONIX:
1392
case FLASH_DEV_ID_MX29LV800BT:
1393
asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1399
if (asd_ha->hw_prof.flash.method == FLASH_METHOD_UNKNOWN) {
1400
err = asd_reset_flash(asd_ha);
1402
ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1406
/* Issue Unlock sequence for AM29LV008BT */
1407
asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA);
1408
asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55);
1409
asd_write_reg_byte(asd_ha, (reg + 0x555), 0x90);
1410
manuf_id = asd_read_reg_byte(asd_ha, reg);
1411
dev_id = asd_read_reg_byte(asd_ha, reg + inc);
1412
sec_prot = asd_read_reg_byte(asd_ha, reg + inc + inc);
1414
ASD_DPRINTK("Flash MethodB manuf_id(0x%x) dev_id(0x%x) sec_prot"
1415
"(0x%x)\n", manuf_id, dev_id, sec_prot);
1417
err = asd_reset_flash(asd_ha);
1419
ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1424
case FLASH_MANUF_ID_AMD:
1426
case FLASH_DEV_ID_AM29LV008BT:
1427
asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1433
case FLASH_MANUF_ID_ST:
1435
case FLASH_DEV_ID_STM29008:
1436
asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1442
case FLASH_MANUF_ID_FUJITSU:
1444
case FLASH_DEV_ID_MBM29LV008TA:
1445
asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1449
case FLASH_MANUF_ID_INTEL:
1451
case FLASH_DEV_ID_I28LV00TAT:
1452
asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1456
case FLASH_MANUF_ID_MACRONIX:
1458
case FLASH_DEV_ID_I28LV00TAT:
1459
asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1464
return FAIL_FIND_FLASH_ID;
1468
if (asd_ha->hw_prof.flash.method == FLASH_METHOD_UNKNOWN)
1469
return FAIL_FIND_FLASH_ID;
1471
asd_ha->hw_prof.flash.manuf = manuf_id;
1472
asd_ha->hw_prof.flash.dev_id = dev_id;
1473
asd_ha->hw_prof.flash.sec_prot = sec_prot;