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Viewing changes to arch/sparc/kernel/dtlb_miss.S

  • Committer: Package Import Robot
  • Author(s): Alessio Igor Bogani
  • Date: 2011-10-26 11:13:05 UTC
  • Revision ID: package-import@ubuntu.com-20111026111305-tz023xykf0i6eosh
Tags: upstream-3.2.0
Import upstream version 3.2.0

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Lines of Context:
arch/sparc/kernel/dtlb_miss.S
 
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/* DTLB ** ICACHE line 1: Context 0 check and TSB load  */
 
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        ldxa    [%g0] ASI_DMMU_TSB_8KB_PTR, %g1 ! Get TSB 8K pointer
 
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        ldxa    [%g0] ASI_DMMU, %g6             ! Get TAG TARGET
 
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        srlx    %g6, 48, %g5                    ! Get context
 
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        sllx    %g6, 22, %g6                    ! Zero out context
 
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        brz,pn  %g5, kvmap_dtlb                 ! Context 0 processing
 
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         srlx   %g6, 22, %g6                    ! Delay slot
 
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        TSB_LOAD_QUAD(%g1, %g4)                 ! Load TSB entry
 
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        cmp     %g4, %g6                        ! Compare TAG
 
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/* DTLB ** ICACHE line 2: TSB compare and TLB load      */
 
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        bne,pn  %xcc, tsb_miss_dtlb             ! Miss
 
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         mov    FAULT_CODE_DTLB, %g3
 
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        stxa    %g5, [%g0] ASI_DTLB_DATA_IN     ! Load TLB
 
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        retry                                   ! Trap done
 
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        nop
 
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        nop
 
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        nop
 
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        nop
 
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/* DTLB ** ICACHE line 3:                               */
 
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        nop
 
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        nop
 
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        nop
 
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        nop
 
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        nop
 
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        nop
 
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        nop
 
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        nop
 
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/* DTLB ** ICACHE line 4:                               */
 
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        nop
 
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        nop
 
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        nop
 
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        nop
 
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        nop
 
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        nop
 
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        nop
 
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        nop